[PATCH] drm/amdgpu/si: remove unused interface which caused build issue

[Huang Rui]

From: Huang Rui 

Fix commit (ed22ee2 drm/amdgpu:changes of virtualization cases probe)
regression, remove si_get_virtual_caps because the callback is removed
at amdgpu_asic_funcs.

Signed-off-by: Huang Rui 
Cc: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/si.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index fee76b8..a0b6b7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -952,12 +952,6 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 
reg, u32 v)
spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
 }
 
-static u32 si_get_virtual_caps(struct amdgpu_device *adev)
-{
-   /* SI does not support SR-IOV */
-   return 0;
-}
-
 static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
{GRBM_STATUS, false},
{GB_ADDR_CONFIG, false},
@@ -1133,7 +1127,6 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
.get_xclk = &si_get_xclk,
.set_uvd_clocks = &si_set_uvd_clocks,
.set_vce_clocks = NULL,
-   .get_virtual_caps = &si_get_virtual_caps,
 };
 
 static uint32_t si_get_rev_id(struct amdgpu_device *adev)
-- 
2.7.4

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RE: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue

[Liu, Monk]

You can add my RB 

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Huang 
Rui
Sent: Monday, September 19, 2016 4:12 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander 
; Koenig, Christian 
Cc: Wang, Ken ; Huang, Ray ; Liu, Monk 

Subject: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue

From: Huang Rui 

Fix commit (ed22ee2 drm/amdgpu:changes of virtualization cases probe) 
regression, remove si_get_virtual_caps because the callback is removed at 
amdgpu_asic_funcs.

Signed-off-by: Huang Rui 
Cc: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/si.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c 
index fee76b8..a0b6b7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -952,12 +952,6 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 
reg, u32 v)
spin_unlock_irqrestore(&adev->smc_idx_lock, flags);  }
 
-static u32 si_get_virtual_caps(struct amdgpu_device *adev) -{
-   /* SI does not support SR-IOV */
-   return 0;
-}
-
 static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
{GRBM_STATUS, false},
{GB_ADDR_CONFIG, false},
@@ -1133,7 +1127,6 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
.get_xclk = &si_get_xclk,
.set_uvd_clocks = &si_set_uvd_clocks,
.set_vce_clocks = NULL,
-   .get_virtual_caps = &si_get_virtual_caps,
 };
 
 static uint32_t si_get_rev_id(struct amdgpu_device *adev)
--
2.7.4

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Re: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue

[Huang Rui]

On Mon, Sep 19, 2016 at 04:31:18PM +0800, Koenig, Christian wrote:
> Am 19.09.2016 um 10:11 schrieb Huang Rui:
> > From: Huang Rui 
> >
> > Fix commit (ed22ee2 drm/amdgpu:changes of virtualization cases probe)
> > regression, remove si_get_virtual_caps because the callback is removed
> > at amdgpu_asic_funcs.
> >
> > Signed-off-by: Huang Rui 
> > Cc: Monk Liu 
> 
> Patch is Reviewed-by: Christian K?nig .
> 
> Please always build with all HW generations enabled to catch such errors.
> 

Yep, agree. I guess CONFIG_DRM_AMDGPU_SI might not be set as default, so
some guys didn't find it.

Thanks,
Rui
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Re: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue

[Christian König]

Am 19.09.2016 um 10:11 schrieb Huang Rui:

From: Huang Rui 

Fix commit (ed22ee2 drm/amdgpu:changes of virtualization cases probe)
regression, remove si_get_virtual_caps because the callback is removed
at amdgpu_asic_funcs.

Signed-off-by: Huang Rui 
Cc: Monk Liu 


Patch is Reviewed-by: Christian König .

Please always build with all HW generations enabled to catch such errors.

Christian.


---
  drivers/gpu/drm/amd/amdgpu/si.c | 7 ---
  1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index fee76b8..a0b6b7e 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -952,12 +952,6 @@ static void si_smc_wreg(struct amdgpu_device *adev, u32 
reg, u32 v)
spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
  }
  
-static u32 si_get_virtual_caps(struct amdgpu_device *adev)

-{
-   /* SI does not support SR-IOV */
-   return 0;
-}
-
  static struct amdgpu_allowed_register_entry si_allowed_read_registers[] = {
{GRBM_STATUS, false},
{GB_ADDR_CONFIG, false},
@@ -1133,7 +1127,6 @@ static const struct amdgpu_asic_funcs si_asic_funcs =
.get_xclk = &si_get_xclk,
.set_uvd_clocks = &si_set_uvd_clocks,
.set_vce_clocks = NULL,
-   .get_virtual_caps = &si_get_virtual_caps,
  };
  
  static uint32_t si_get_rev_id(struct amdgpu_device *adev)



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ack/nack on sensors patches please

[StDenis, Tom]

Hi all,


Edward reviewed them but I'd like an AMD'er RB/ACK/NAK as well on the updated 
series I posted last week please.


https://lists.freedesktop.org/archives/amd-gfx/2016-September/002359.html


Thanks,

Tom
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[PATCH] drm/amdgpu:cleanup virt related define

[Monk Liu]

move virtual machine related structure to amdgpu_virt.h
easy for developer to maintain for virualization stuffs

Change-Id: I8cd9904a8ec220345f96214ade7c8030cf6a39f3
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 32 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  9 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   | 57 ++
 3 files changed, 58 insertions(+), 40 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f93c186..72f8cae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -58,6 +58,7 @@
 #include "amd_powerplay.h"
 
 #include "gpu_scheduler.h"
+#include "amdgpu_virt.h"
 
 /*
  * Modules parameters.
@@ -1935,37 +1936,6 @@ struct amdgpu_atcs {
 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
 void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
 
-
-#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
-#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
GPU */
-#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
function */
-#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
through for VM */
-/* GPU virtualization */
-struct amdgpu_virtualization {
-   uint32_t virtual_caps;
-};
-
-#define amdgpu_sriov_enabled(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
-
-#define amdgpu_sriov_vf(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
-
-#define amdgpu_sriov_bios(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
-
-#define amdgpu_passthrough(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
-
-static inline bool is_virtual_machine(void)
-{
-#ifdef CONFIG_X86
-   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
-#else
-   return false;
-#endif
-}
-
 /*
  * Core structure, functions and helpers.
  */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 035ff42..9c7e574 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1527,15 +1527,6 @@ static int amdgpu_resume(struct amdgpu_device *adev)
return 0;
 }
 
-static bool amdgpu_device_is_virtual(void)
-{
-#ifdef CONFIG_X86
-   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
-#else
-   return false;
-#endif
-}
-
 bool amdgpu_device_asic_has_dal_support(enum amd_asic_type asic_type)
 {
switch (asic_type) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
new file mode 100644
index 000..2c37a37
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Author: monk@amd.com
+ */
+#ifndef AMDGPU_VIRT_H
+#define AMDGPU_VIRT_H
+
+#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
+#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
GPU */
+#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
function */
+#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
through for VM */
+/* GPU virtualization */
+struct amdgpu_virtualization {
+   uint32_t virtual_caps;
+};
+
+#define amdgpu_sriov_enabled(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
+
+#define amdgpu_sriov_vf(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
+
+#define amdgpu_sriov_bios(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
+
+#define amdgpu_passthrough(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_PASSTHR

Re: [PATCH] drm/amdgpu:cleanup virt related define

[Christian König]

Am 19.09.2016 um 13:04 schrieb Monk Liu:

move virtual machine related structure to amdgpu_virt.h
easy for developer to maintain for virualization stuffs

Change-Id: I8cd9904a8ec220345f96214ade7c8030cf6a39f3
Signed-off-by: Monk Liu 


Acked-by: Christian König .


---
  drivers/gpu/drm/amd/amdgpu/amdgpu.h| 32 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  9 -
  drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   | 57 ++
  3 files changed, 58 insertions(+), 40 deletions(-)
  create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f93c186..72f8cae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -58,6 +58,7 @@
  #include "amd_powerplay.h"
  
  #include "gpu_scheduler.h"

+#include "amdgpu_virt.h"
  
  /*

   * Modules parameters.
@@ -1935,37 +1936,6 @@ struct amdgpu_atcs {
  struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
  void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
  
-

-#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
-#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
GPU */
-#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
function */
-#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
through for VM */
-/* GPU virtualization */
-struct amdgpu_virtualization {
-   uint32_t virtual_caps;
-};
-
-#define amdgpu_sriov_enabled(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
-
-#define amdgpu_sriov_vf(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
-
-#define amdgpu_sriov_bios(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
-
-#define amdgpu_passthrough(adev) \
-((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
-
-static inline bool is_virtual_machine(void)
-{
-#ifdef CONFIG_X86
-   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
-#else
-   return false;
-#endif
-}
-
  /*
   * Core structure, functions and helpers.
   */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 035ff42..9c7e574 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1527,15 +1527,6 @@ static int amdgpu_resume(struct amdgpu_device *adev)
return 0;
  }
  
-static bool amdgpu_device_is_virtual(void)

-{
-#ifdef CONFIG_X86
-   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
-#else
-   return false;
-#endif
-}
-
  bool amdgpu_device_asic_has_dal_support(enum amd_asic_type asic_type)
  {
switch (asic_type) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
new file mode 100644
index 000..2c37a37
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Author: monk@amd.com
+ */
+#ifndef AMDGPU_VIRT_H
+#define AMDGPU_VIRT_H
+
+#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
+#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
GPU */
+#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
function */
+#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
through for VM */
+/* GPU virtualization */
+struct amdgpu_virtualization {
+   uint32_t virtual_caps;
+};
+
+#define amdgpu_sriov_enabled(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
+
+#define amdgpu_sriov_vf(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
+
+#define amdgpu_sriov_bios(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV

[PATCH] drm/amdgpu: use powerplay module for dgpu of VI.

[Rex Zhu]

delete vi dpm related code and files.

Change-Id: I080de47df12d45be06a72fe229695675cf6648d6
Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/amdgpu/Makefile   |   5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c |  13 +-
 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 186 --
 drivers/gpu/drm/amd/amdgpu/fiji_smc.c | 863 --
 drivers/gpu/drm/amd/amdgpu/fiji_smum.h|  42 --
 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c  | 200 --
 drivers/gpu/drm/amd/amdgpu/iceland_smc.c  | 677 
 drivers/gpu/drm/amd/amdgpu/iceland_smum.h |  41 --
 drivers/gpu/drm/amd/amdgpu/tonga_dpm.c| 186 --
 drivers/gpu/drm/amd/amdgpu/tonga_smc.c| 862 -
 drivers/gpu/drm/amd/amdgpu/tonga_smum.h   |  42 --
 drivers/gpu/drm/amd/amdgpu/vi.c   |   3 +
 12 files changed, 6 insertions(+), 3114 deletions(-)
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smc.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smum.h
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smc.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smum.h
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smc.c
 delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smum.h

diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile 
b/drivers/gpu/drm/amd/amdgpu/Makefile
index f2b97cb..786b28a 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -59,10 +59,7 @@ amdgpu-y += \
 amdgpu-y += \
amdgpu_dpm.o \
amdgpu_powerplay.o \
-   cz_smc.o cz_dpm.o \
-   tonga_smc.o tonga_dpm.o \
-   fiji_smc.o fiji_dpm.o \
-   iceland_smc.o iceland_dpm.o
+   cz_smc.o cz_dpm.o
 
 # add DCE block
 amdgpu-y += \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
index 1e7f160..68ad241 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
@@ -80,15 +80,6 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
amd_pp->ip_funcs = &kv_dpm_ip_funcs;
break;
 #endif
-   case CHIP_TOPAZ:
-   amd_pp->ip_funcs = &iceland_dpm_ip_funcs;
-   break;
-   case CHIP_TONGA:
-   amd_pp->ip_funcs = &tonga_dpm_ip_funcs;
-   break;
-   case CHIP_FIJI:
-   amd_pp->ip_funcs = &fiji_dpm_ip_funcs;
-   break;
case CHIP_CARRIZO:
case CHIP_STONEY:
amd_pp->ip_funcs = &cz_dpm_ip_funcs;
@@ -110,11 +101,11 @@ static int amdgpu_pp_early_init(void *handle)
switch (adev->asic_type) {
case CHIP_POLARIS11:
case CHIP_POLARIS10:
-   adev->pp_enabled = true;
-   break;
case CHIP_TONGA:
case CHIP_FIJI:
case CHIP_TOPAZ:
+   adev->pp_enabled = true;
+   break;
case CHIP_CARRIZO:
case CHIP_STONEY:
adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;
diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c 
b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
deleted file mode 100644
index ed03b75..000
--- a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * Copyright 2014 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- */
-
-#include 
-#include "drmP.h"
-#include "amdgpu.h"
-#include "fiji_smum.h"
-
-MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
-
-static void fiji_dpm_set_funcs(struct amdgpu_device *adev);
-
-static int fiji_dpm_early_init(void *handle)
-{
-   str

Re: [PATCH] drm/amdgpu: use powerplay module for dgpu of VI.

[Edward O'Callaghan]

So now just pure PP paths for Tonga, Fiji & Topaz. Is there any perf or
power usage difference from this change-set across any of these ASIC's?

Acked-by: Edward O'Callaghan 

On 09/19/2016 10:17 PM, Rex Zhu wrote:
> delete vi dpm related code and files.
> 
> Change-Id: I080de47df12d45be06a72fe229695675cf6648d6
> Signed-off-by: Rex Zhu 
> ---
>  drivers/gpu/drm/amd/amdgpu/Makefile   |   5 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c |  13 +-
>  drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 186 --
>  drivers/gpu/drm/amd/amdgpu/fiji_smc.c | 863 
> --
>  drivers/gpu/drm/amd/amdgpu/fiji_smum.h|  42 --
>  drivers/gpu/drm/amd/amdgpu/iceland_dpm.c  | 200 --
>  drivers/gpu/drm/amd/amdgpu/iceland_smc.c  | 677 
>  drivers/gpu/drm/amd/amdgpu/iceland_smum.h |  41 --
>  drivers/gpu/drm/amd/amdgpu/tonga_dpm.c| 186 --
>  drivers/gpu/drm/amd/amdgpu/tonga_smc.c| 862 -
>  drivers/gpu/drm/amd/amdgpu/tonga_smum.h   |  42 --
>  drivers/gpu/drm/amd/amdgpu/vi.c   |   3 +
>  12 files changed, 6 insertions(+), 3114 deletions(-)
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smum.h
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smum.h
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smum.h
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile 
> b/drivers/gpu/drm/amd/amdgpu/Makefile
> index f2b97cb..786b28a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
> @@ -59,10 +59,7 @@ amdgpu-y += \
>  amdgpu-y += \
>   amdgpu_dpm.o \
>   amdgpu_powerplay.o \
> - cz_smc.o cz_dpm.o \
> - tonga_smc.o tonga_dpm.o \
> - fiji_smc.o fiji_dpm.o \
> - iceland_smc.o iceland_dpm.o
> + cz_smc.o cz_dpm.o
>  
>  # add DCE block
>  amdgpu-y += \
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> index 1e7f160..68ad241 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> @@ -80,15 +80,6 @@ static int amdgpu_powerplay_init(struct amdgpu_device 
> *adev)
>   amd_pp->ip_funcs = &kv_dpm_ip_funcs;
>   break;
>  #endif
> - case CHIP_TOPAZ:
> - amd_pp->ip_funcs = &iceland_dpm_ip_funcs;
> - break;
> - case CHIP_TONGA:
> - amd_pp->ip_funcs = &tonga_dpm_ip_funcs;
> - break;
> - case CHIP_FIJI:
> - amd_pp->ip_funcs = &fiji_dpm_ip_funcs;
> - break;
>   case CHIP_CARRIZO:
>   case CHIP_STONEY:
>   amd_pp->ip_funcs = &cz_dpm_ip_funcs;
> @@ -110,11 +101,11 @@ static int amdgpu_pp_early_init(void *handle)
>   switch (adev->asic_type) {
>   case CHIP_POLARIS11:
>   case CHIP_POLARIS10:
> - adev->pp_enabled = true;
> - break;
>   case CHIP_TONGA:
>   case CHIP_FIJI:
>   case CHIP_TOPAZ:
> + adev->pp_enabled = true;
> + break;
>   case CHIP_CARRIZO:
>   case CHIP_STONEY:
>   adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;
> diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c 
> b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> deleted file mode 100644
> index ed03b75..000
> --- a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> +++ /dev/null
> @@ -1,186 +0,0 @@
> -/*
> - * Copyright 2014 Advanced Micro Devices, Inc.
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice shall be included in
> - * all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>

[PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

[Tom St Denis]

Provides standardized interface to read various sensors.
The API is extensible (by adding to the end of the
amd_pp_sensors enumeration list.

Support has been added to Carrizo/smu7

(v2) Squashed the two sensor patches into one.
(v3) Updated to apply to smu7_hwmgr instead

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 +
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 +++
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 36 +
 drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  1 +
 5 files changed, 165 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index b1d19409bf86..ee0368381e82 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
 }
 
+static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
+{
+   struct pp_hwmgr *hwmgr;
+
+   if (!handle)
+   return -EINVAL;
+
+   hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+   PP_CHECK_HW(hwmgr);
+
+   if (hwmgr->hwmgr_func->read_sensor == NULL) {
+   printk(KERN_INFO "%s was not implemented.\n", __func__);
+   return 0;
+   }
+
+   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
+}
+
 const struct amd_powerplay_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
.load_firmware = pp_dpm_load_fw,
@@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
.set_sclk_od = pp_dpm_set_sclk_od,
.get_mclk_od = pp_dpm_get_mclk_od,
.set_mclk_od = pp_dpm_set_mclk_od,
+   .read_sensor = pp_dpm_read_sensor,
 };
 
 static int amd_pp_instance_init(struct amd_pp_init *pp_init,
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 5ecef1732e20..9f3c5a8a903c 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
*hwmgr, struct amd_pp_simple_c
return 0;
 }
 
+static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
+{
+   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
+
+   struct phm_clock_voltage_dependency_table *table =
+   hwmgr->dyn_state.vddc_dependency_on_sclk;
+
+   struct phm_vce_clock_voltage_dependency_table *vce_table =
+   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
+
+   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
+   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
+
+   uint32_t sclk_index = 
PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixTARGET_AND_CURRENT_PROFILE_INDEX),
+   TARGET_AND_CURRENT_PROFILE_INDEX, 
CURR_SCLK_INDEX);
+   uint32_t uvd_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 
CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
+   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
CURR_UVD_INDEX);
+   uint32_t vce_index = PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, 
CGS_IND_REG__SMC, ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
+   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
CURR_VCE_INDEX);
+
+   uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent;
+   uint16_t vddnb, vddgfx;
+   int result;
+
+   switch (idx) {
+   case AMDGPU_PP_SENSOR_GFX_SCLK:
+   if (sclk_index < NUM_SCLK_LEVELS) {
+   sclk = table->entries[sclk_index].clk;
+   *value = sclk;
+   return 0;
+   }
+   return -EINVAL;
+   case AMDGPU_PP_SENSOR_VDDNB:
+   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixSMUSVI_NB_CURRENTVID) &
+   CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT;
+   vddnb = cz_convert_8Bit_index_to_voltage(hwmgr, tmp);
+   *value = vddnb;
+   return 0;
+   case AMDGPU_PP_SENSOR_VDDGFX:
+   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
ixSMUSVI_GFX_CURRENTVID) &
+   CURRENT_GFX_VID_MASK) >> CURRENT_GFX_VID__SHIFT;
+   vddgfx = cz_convert_8Bit_index_to_voltage(hwmgr, (u16)tmp);
+   *value = vddgfx;
+   return 0;
+   case AMDGPU_PP_SENSOR_UVD_VCLK:
+   if (!cz_hwmgr->uvd_power_gated) {
+   if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
+   return -EINVAL;
+ 

powerplay sensors (v3)

[Tom St Denis]

Updated to refactor onto hwmgr changes.  Now only adds to the 
carrizo and smu7 managers.  




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[PATCH 2/2] drm/amd/amdgpu: Hook up read_sensor() to debugfs (v2)

[Tom St Denis]

(v2) Tidy'ed up read function.

Signed-off-by: Tom St Denis 
Reviewed-by: Edward O'Callaghan 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 31 ++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 035ff42e80a3..62c33f76ad1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2882,6 +2882,29 @@ static ssize_t amdgpu_debugfs_gca_config_read(struct 
file *f, char __user *buf,
return result;
 }
 
+static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
+   size_t size, loff_t *pos)
+{
+   struct amdgpu_device *adev = f->f_inode->i_private;
+   int idx, r;
+   int32_t value;
+
+   if (size != 4 || *pos & 0x3)
+   return -EINVAL;
+
+   /* convert offset to sensor number */
+   idx = *pos >> 2;
+
+   if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor)
+   r = 
adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, &value);
+   else
+   return -EINVAL;
+
+   if (!r)
+   r = put_user(value, (int32_t *)buf);
+
+   return !r ? 4 : r;
+}
 
 static const struct file_operations amdgpu_debugfs_regs_fops = {
.owner = THIS_MODULE,
@@ -2914,12 +2937,19 @@ static const struct file_operations 
amdgpu_debugfs_gca_config_fops = {
.llseek = default_llseek
 };
 
+static const struct file_operations amdgpu_debugfs_sensors_fops = {
+   .owner = THIS_MODULE,
+   .read = amdgpu_debugfs_sensor_read,
+   .llseek = default_llseek
+};
+
 static const struct file_operations *debugfs_regs[] = {
&amdgpu_debugfs_regs_fops,
&amdgpu_debugfs_regs_didt_fops,
&amdgpu_debugfs_regs_pcie_fops,
&amdgpu_debugfs_regs_smc_fops,
&amdgpu_debugfs_gca_config_fops,
+   &amdgpu_debugfs_sensors_fops,
 };
 
 static const char *debugfs_regs_names[] = {
@@ -2928,6 +2958,7 @@ static const char *debugfs_regs_names[] = {
"amdgpu_regs_pcie",
"amdgpu_regs_smc",
"amdgpu_gca_config",
+   "amdgpu_sensors",
 };
 
 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev)
-- 
2.10.0

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RE: [PATCH 3/3] drm/amdgpu: set gfx clock gating for tonga/polaris.

[Deucher, Alexander]

> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Sunday, September 18, 2016 5:44 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 3/3] drm/amdgpu: set gfx clock gating for tonga/polaris.
> 
> Change-Id: I65d9858b8ca0789c5d82db2f8893b7c10fc6f471
> Signed-off-by: Rex Zhu 

Series is:
Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 77
> +++
>  1 file changed, 77 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 1902442..9970893 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -5818,6 +5818,76 @@ static int
> gfx_v8_0_update_gfx_clock_gating(struct amdgpu_device *adev,
>   return 0;
>  }
> 
> +static int gfx_v8_0_tonga_update_gfx_clock_gating(struct amdgpu_device
> *adev,
> +   enum amd_clockgating_state state)
> +{
> + uint32_t msg_id, pp_state;
> + void *pp_handle = adev->powerplay.pp_handle;
> +
> + if (state == AMD_CG_STATE_UNGATE)
> + pp_state = 0;
> + else
> + pp_state = PP_STATE_CG | PP_STATE_LS;
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_CG,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_MG,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + return 0;
> +}
> +
> +static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device
> *adev,
> +   enum amd_clockgating_state state)
> +{
> + uint32_t msg_id, pp_state;
> + void *pp_handle = adev->powerplay.pp_handle;
> +
> + if (state == AMD_CG_STATE_UNGATE)
> + pp_state = 0;
> + else
> + pp_state = PP_STATE_CG | PP_STATE_LS;
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_CG,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_3D,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_MG,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_RLC,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + msg_id = PP_CG_MSG_ID(PP_GROUP_GFX,
> + PP_BLOCK_GFX_CP,
> + PP_STATE_SUPPORT_CG | PP_STATE_SUPPORT_LS,
> + pp_state);
> + amd_set_clockgating_by_smu(pp_handle, msg_id);
> +
> + return 0;
> +}
> +
>  static int gfx_v8_0_set_clockgating_state(void *handle,
> enum amd_clockgating_state state)
>  {
> @@ -5830,6 +5900,13 @@ static int gfx_v8_0_set_clockgating_state(void
> *handle,
>   gfx_v8_0_update_gfx_clock_gating(adev,
>state ==
> AMD_CG_STATE_GATE ? true : false);
>   break;
> + case CHIP_TONGA:
> + gfx_v8_0_tonga_update_gfx_clock_gating(adev, state);
> + break;
> + case CHIP_POLARIS10:
> + case CHIP_POLARIS11:
> + gfx_v8_0_polaris_update_gfx_clock_gating(adev, state);
> + break;
>   default:
>   break;
>   }
> --
> 1.9.1
> 
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RE: [PATCH] drm/amdgpu/si: remove unused interface which caused build issue

[Deucher, Alexander]

> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Huang Rui
> Sent: Monday, September 19, 2016 4:12 AM
> To: amd-gfx@lists.freedesktop.org; Deucher, Alexander; Koenig, Christian
> Cc: Wang, Ken; Huang, Ray; Liu, Monk
> Subject: [PATCH] drm/amdgpu/si: remove unused interface which caused
> build issue
> 
> From: Huang Rui 
> 
> Fix commit (ed22ee2 drm/amdgpu:changes of virtualization cases probe)
> regression, remove si_get_virtual_caps because the callback is removed
> at amdgpu_asic_funcs.
> 
> Signed-off-by: Huang Rui 
> Cc: Monk Liu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/si.c | 7 ---
>  1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/si.c
> b/drivers/gpu/drm/amd/amdgpu/si.c
> index fee76b8..a0b6b7e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si.c
> @@ -952,12 +952,6 @@ static void si_smc_wreg(struct amdgpu_device
> *adev, u32 reg, u32 v)
>   spin_unlock_irqrestore(&adev->smc_idx_lock, flags);
>  }
> 
> -static u32 si_get_virtual_caps(struct amdgpu_device *adev)
> -{
> - /* SI does not support SR-IOV */
> - return 0;
> -}
> -
>  static struct amdgpu_allowed_register_entry si_allowed_read_registers[] =
> {
>   {GRBM_STATUS, false},
>   {GB_ADDR_CONFIG, false},
> @@ -1133,7 +1127,6 @@ static const struct amdgpu_asic_funcs si_asic_funcs
> =
>   .get_xclk = &si_get_xclk,
>   .set_uvd_clocks = &si_set_uvd_clocks,
>   .set_vce_clocks = NULL,
> - .get_virtual_caps = &si_get_virtual_caps,
>  };
> 
>  static uint32_t si_get_rev_id(struct amdgpu_device *adev)
> --
> 2.7.4
> 
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RE: [PATCH] drm/amdgpu: use powerplay module for dgpu of VI.

[Deucher, Alexander]

> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Edward O'Callaghan
> Sent: Monday, September 19, 2016 8:33 AM
> To: Zhu, Rex; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: use powerplay module for dgpu of VI.
> 
> So now just pure PP paths for Tonga, Fiji & Topaz. Is there any perf or
> power usage difference from this change-set across any of these ASIC's?

The non-PP code does not support dynamic power management.  It was just a 
temporary solution until we finished PP support.  There is no reason to keep it 
around.

Alex

> 
> Acked-by: Edward O'Callaghan 
> 
> On 09/19/2016 10:17 PM, Rex Zhu wrote:
> > delete vi dpm related code and files.
> >
> > Change-Id: I080de47df12d45be06a72fe229695675cf6648d6
> > Signed-off-by: Rex Zhu 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/Makefile   |   5 +-
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c |  13 +-
> >  drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 186 --
> >  drivers/gpu/drm/amd/amdgpu/fiji_smc.c | 863 
> > --
> >  drivers/gpu/drm/amd/amdgpu/fiji_smum.h|  42 --
> >  drivers/gpu/drm/amd/amdgpu/iceland_dpm.c  | 200 --
> >  drivers/gpu/drm/amd/amdgpu/iceland_smc.c  | 677 
> >  drivers/gpu/drm/amd/amdgpu/iceland_smum.h |  41 --
> >  drivers/gpu/drm/amd/amdgpu/tonga_dpm.c| 186 --
> >  drivers/gpu/drm/amd/amdgpu/tonga_smc.c| 862 
> > 
> -
> >  drivers/gpu/drm/amd/amdgpu/tonga_smum.h   |  42 --
> >  drivers/gpu/drm/amd/amdgpu/vi.c   |   3 +
> >  12 files changed, 6 insertions(+), 3114 deletions(-)
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smc.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smum.h
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smc.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smum.h
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smc.c
> >  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smum.h
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile
> b/drivers/gpu/drm/amd/amdgpu/Makefile
> > index f2b97cb..786b28a 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/Makefile
> > +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
> > @@ -59,10 +59,7 @@ amdgpu-y += \
> >  amdgpu-y += \
> > amdgpu_dpm.o \
> > amdgpu_powerplay.o \
> > -   cz_smc.o cz_dpm.o \
> > -   tonga_smc.o tonga_dpm.o \
> > -   fiji_smc.o fiji_dpm.o \
> > -   iceland_smc.o iceland_dpm.o
> > +   cz_smc.o cz_dpm.o
> >
> >  # add DCE block
> >  amdgpu-y += \
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> > index 1e7f160..68ad241 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
> > @@ -80,15 +80,6 @@ static int amdgpu_powerplay_init(struct
> amdgpu_device *adev)
> > amd_pp->ip_funcs = &kv_dpm_ip_funcs;
> > break;
> >  #endif
> > -   case CHIP_TOPAZ:
> > -   amd_pp->ip_funcs = &iceland_dpm_ip_funcs;
> > -   break;
> > -   case CHIP_TONGA:
> > -   amd_pp->ip_funcs = &tonga_dpm_ip_funcs;
> > -   break;
> > -   case CHIP_FIJI:
> > -   amd_pp->ip_funcs = &fiji_dpm_ip_funcs;
> > -   break;
> > case CHIP_CARRIZO:
> > case CHIP_STONEY:
> > amd_pp->ip_funcs = &cz_dpm_ip_funcs;
> > @@ -110,11 +101,11 @@ static int amdgpu_pp_early_init(void *handle)
> > switch (adev->asic_type) {
> > case CHIP_POLARIS11:
> > case CHIP_POLARIS10:
> > -   adev->pp_enabled = true;
> > -   break;
> > case CHIP_TONGA:
> > case CHIP_FIJI:
> > case CHIP_TOPAZ:
> > +   adev->pp_enabled = true;
> > +   break;
> > case CHIP_CARRIZO:
> > case CHIP_STONEY:
> > adev->pp_enabled = (amdgpu_powerplay == 0) ? false :
> true;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> b/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> > deleted file mode 100644
> > index ed03b75..000
> > --- a/drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
> > +++ /dev/null
> > @@ -1,186 +0,0 @@
> > -/*
> > - * Copyright 2014 Advanced Micro Devices, Inc.
> > - *
> > - * Permission is hereby granted, free of charge, to any person obtaining a
> > - * copy of this software and associated documentation files (the
> "Software"),
> > - * to deal in the Software without restriction, including without 
> > limitation
> > - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > - * and/or sell copies of the Software, and to permit persons to whom the
> > - * Software is 

Re: [PATCH] drm/amd/powerplay/smumgr: mark symbols static where possible

[Huang Rui]

Hi Baoyou,

On Mon, Sep 19, 2016 at 03:28:39PM +0800, Baoyou Xie wrote:
> We get a few warnings when building kernel with W=1:
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/tonga_smumgr.c:146:5: warning: 
> no previous prototype for 'tonga_program_jump_on_start' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:816:5: warning: 
> no previous prototype for 'fiji_save_vft_table' [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:743:5: 
> warning: no previous prototype for 'polaris10_avfs_event_mgr' 
> [-Wmissing-prototypes]
> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/iceland_smumgr.c:167:5: 
> warning: no previous prototype for 'iceland_program_jump_on_start' 
> [-Wmissing-prototypes]
> 
> 
> In fact, these functions are only used in the file in which they are
> declared and don't need a declaration, but can be made static.
> So this patch marks these functions with 'static'.
> 

+ amd-gfx mail list.

Thanks to your patch. But powerplay part is refactored recently below, some
functions are already updated. So you might need rebase them. :-)

https://lists.freedesktop.org/archives/amd-gfx/2016-September/002118.html

Thanks,
Rui
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Re: [PATCH] drm/amdgpu: use powerplay module for dgpu of VI.

[Alex Deucher]

On Mon, Sep 19, 2016 at 8:17 AM, Rex Zhu  wrote:
> delete vi dpm related code and files.
>
> Change-Id: I080de47df12d45be06a72fe229695675cf6648d6
> Signed-off-by: Rex Zhu 
> ---
>  drivers/gpu/drm/amd/amdgpu/Makefile   |   5 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c |  13 +-
>  drivers/gpu/drm/amd/amdgpu/fiji_dpm.c | 186 --
>  drivers/gpu/drm/amd/amdgpu/fiji_smc.c | 863 
> --
>  drivers/gpu/drm/amd/amdgpu/fiji_smum.h|  42 --
>  drivers/gpu/drm/amd/amdgpu/iceland_dpm.c  | 200 --
>  drivers/gpu/drm/amd/amdgpu/iceland_smc.c  | 677 
>  drivers/gpu/drm/amd/amdgpu/iceland_smum.h |  41 --
>  drivers/gpu/drm/amd/amdgpu/tonga_dpm.c| 186 --
>  drivers/gpu/drm/amd/amdgpu/tonga_smc.c| 862 -
>  drivers/gpu/drm/amd/amdgpu/tonga_smum.h   |  42 --
>  drivers/gpu/drm/amd/amdgpu/vi.c   |   3 +
>  12 files changed, 6 insertions(+), 3114 deletions(-)
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/fiji_smum.h
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/iceland_smum.h
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_dpm.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smc.c
>  delete mode 100644 drivers/gpu/drm/amd/amdgpu/tonga_smum.h


Reviewed-by: Alex Deucher 
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Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

[Alex Deucher]

On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis  wrote:
> Provides standardized interface to read various sensors.
> The API is extensible (by adding to the end of the
> amd_pp_sensors enumeration list.
>
> Support has been added to Carrizo/smu7
>
> (v2) Squashed the two sensor patches into one.
> (v3) Updated to apply to smu7_hwmgr instead
>
> Signed-off-by: Tom St Denis 
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 +
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 
> +++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 36 +
>  drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  1 +
>  5 files changed, 165 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index b1d19409bf86..ee0368381e82 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t 
> value)
> return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
>  }
>
> +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
> +{
> +   struct pp_hwmgr *hwmgr;
> +
> +   if (!handle)
> +   return -EINVAL;
> +
> +   hwmgr = ((struct pp_instance *)handle)->hwmgr;
> +
> +   PP_CHECK_HW(hwmgr);
> +
> +   if (hwmgr->hwmgr_func->read_sensor == NULL) {
> +   printk(KERN_INFO "%s was not implemented.\n", __func__);
> +   return 0;
> +   }
> +
> +   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
> +}
> +
>  const struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_temperature = pp_dpm_get_temperature,
> .load_firmware = pp_dpm_load_fw,
> @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
> .set_sclk_od = pp_dpm_set_sclk_od,
> .get_mclk_od = pp_dpm_get_mclk_od,
> .set_mclk_od = pp_dpm_set_mclk_od,
> +   .read_sensor = pp_dpm_read_sensor,

As a future patch it would be nice to hook up this sensor interface to
the existing amdgpu_pm_info code and make that asic indpendent.

Series is:
Reviewed-by: Alex Deucher 

Alex


>  };
>
>  static int amd_pp_instance_init(struct amd_pp_init *pp_init,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 5ecef1732e20..9f3c5a8a903c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
> *hwmgr, struct amd_pp_simple_c
> return 0;
>  }
>
> +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
> +{
> +   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> +
> +   struct phm_clock_voltage_dependency_table *table =
> +   hwmgr->dyn_state.vddc_dependency_on_sclk;
> +
> +   struct phm_vce_clock_voltage_dependency_table *vce_table =
> +   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
> +
> +   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
> +   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
> +
> +   uint32_t sclk_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX),
> +   TARGET_AND_CURRENT_PROFILE_INDEX, 
> CURR_SCLK_INDEX);
> +   uint32_t uvd_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_UVD_INDEX);
> +   uint32_t vce_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_VCE_INDEX);
> +
> +   uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent;
> +   uint16_t vddnb, vddgfx;
> +   int result;
> +
> +   switch (idx) {
> +   case AMDGPU_PP_SENSOR_GFX_SCLK:
> +   if (sclk_index < NUM_SCLK_LEVELS) {
> +   sclk = table->entries[sclk_index].clk;
> +   *value = sclk;
> +   return 0;
> +   }
> +   return -EINVAL;
> +   case AMDGPU_PP_SENSOR_VDDNB:
> +   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixSMUSVI_NB_CURRENTVID) &
> +   CURRENT_NB_VID_MASK) >> CURRENT_NB_VID__SHIFT;
> +   vddnb = cz_convert_8Bit_index_to_voltage(hwmgr, tmp);
> +   *value = vddnb;
> +   return 0;
> +   case AMDGPU_PP_SENSOR_VDDGFX:
> +   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC,

Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

[StDenis, Tom]

Hi Alex,


Would you prefer I re-write #1 to avoid churn in the tree?


Cheers,

Tom



From: Alex Deucher 
Sent: Monday, September 19, 2016 11:53
To: Tom St Denis
Cc: amd-gfx list; StDenis, Tom
Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)

On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis  wrote:
> Provides standardized interface to read various sensors.
> The API is extensible (by adding to the end of the
> amd_pp_sensors enumeration list.
>
> Support has been added to Carrizo/smu7
>
> (v2) Squashed the two sensor patches into one.
> (v3) Updated to apply to smu7_hwmgr instead
>
> Signed-off-by: Tom St Denis 
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 +
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 
> +++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 36 +
>  drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  1 +
>  5 files changed, 165 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index b1d19409bf86..ee0368381e82 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t 
> value)
> return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
>  }
>
> +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
> +{
> +   struct pp_hwmgr *hwmgr;
> +
> +   if (!handle)
> +   return -EINVAL;
> +
> +   hwmgr = ((struct pp_instance *)handle)->hwmgr;
> +
> +   PP_CHECK_HW(hwmgr);
> +
> +   if (hwmgr->hwmgr_func->read_sensor == NULL) {
> +   printk(KERN_INFO "%s was not implemented.\n", __func__);
> +   return 0;
> +   }
> +
> +   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
> +}
> +
>  const struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_temperature = pp_dpm_get_temperature,
> .load_firmware = pp_dpm_load_fw,
> @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
> .set_sclk_od = pp_dpm_set_sclk_od,
> .get_mclk_od = pp_dpm_get_mclk_od,
> .set_mclk_od = pp_dpm_set_mclk_od,
> +   .read_sensor = pp_dpm_read_sensor,

As a future patch it would be nice to hook up this sensor interface to
the existing amdgpu_pm_info code and make that asic indpendent.

Series is:
Reviewed-by: Alex Deucher 

Alex


>  };
>
>  static int amd_pp_instance_init(struct amd_pp_init *pp_init,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 5ecef1732e20..9f3c5a8a903c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
> *hwmgr, struct amd_pp_simple_c
> return 0;
>  }
>
> +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
> +{
> +   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> +
> +   struct phm_clock_voltage_dependency_table *table =
> +   hwmgr->dyn_state.vddc_dependency_on_sclk;
> +
> +   struct phm_vce_clock_voltage_dependency_table *vce_table =
> +   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
> +
> +   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
> +   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
> +
> +   uint32_t sclk_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX),
> +   TARGET_AND_CURRENT_PROFILE_INDEX, 
> CURR_SCLK_INDEX);
> +   uint32_t uvd_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_UVD_INDEX);
> +   uint32_t vce_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_VCE_INDEX);
> +
> +   uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent;
> +   uint16_t vddnb, vddgfx;
> +   int result;
> +
> +   switch (idx) {
> +   case AMDGPU_PP_SENSOR_GFX_SCLK:
> +   if (sclk_index < NUM_SCLK_LEVELS) {
> +   sclk = table->entries[sclk_index].clk;
> +   *value = sclk;
> +   return 0;
> +   }
> +   return -EINVAL;
> +   case AMDGPU_PP_SENSOR_VDDNB:
> +   tmp = (cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixSMUSVI_NB_CURRENTVID) &
> + 

RE: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

[Deucher, Alexander]

No need.  The additional cleanups can come later.

Alex

From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of 
StDenis, Tom
Sent: Monday, September 19, 2016 11:55 AM
To: Alex Deucher
Cc: amd-gfx list
Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)


Hi Alex,



Would you prefer I re-write #1 to avoid churn in the tree?



Cheers,

Tom


From: Alex Deucher mailto:alexdeuc...@gmail.com>>
Sent: Monday, September 19, 2016 11:53
To: Tom St Denis
Cc: amd-gfx list; StDenis, Tom
Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)

On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis 
mailto:tstdeni...@gmail.com>> wrote:
> Provides standardized interface to read various sensors.
> The API is extensible (by adding to the end of the
> amd_pp_sensors enumeration list.
>
> Support has been added to Carrizo/smu7
>
> (v2) Squashed the two sensor patches into one.
> (v3) Updated to apply to smu7_hwmgr instead
>
> Signed-off-by: Tom St Denis mailto:tom.stde...@amd.com>>
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 +
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 
> +++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 36 +
>  drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  1 +
>  5 files changed, 165 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index b1d19409bf86..ee0368381e82 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t 
> value)
> return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
>  }
>
> +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
> +{
> +   struct pp_hwmgr *hwmgr;
> +
> +   if (!handle)
> +   return -EINVAL;
> +
> +   hwmgr = ((struct pp_instance *)handle)->hwmgr;
> +
> +   PP_CHECK_HW(hwmgr);
> +
> +   if (hwmgr->hwmgr_func->read_sensor == NULL) {
> +   printk(KERN_INFO "%s was not implemented.\n", __func__);
> +   return 0;
> +   }
> +
> +   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
> +}
> +
>  const struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_temperature = pp_dpm_get_temperature,
> .load_firmware = pp_dpm_load_fw,
> @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
> .set_sclk_od = pp_dpm_set_sclk_od,
> .get_mclk_od = pp_dpm_get_mclk_od,
> .set_mclk_od = pp_dpm_set_mclk_od,
> +   .read_sensor = pp_dpm_read_sensor,

As a future patch it would be nice to hook up this sensor interface to
the existing amdgpu_pm_info code and make that asic indpendent.

Series is:
Reviewed-by: Alex Deucher 
mailto:alexander.deuc...@amd.com>>

Alex


>  };
>
>  static int amd_pp_instance_init(struct amd_pp_init *pp_init,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 5ecef1732e20..9f3c5a8a903c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
> *hwmgr, struct amd_pp_simple_c
> return 0;
>  }
>
> +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
> +{
> +   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> +
> +   struct phm_clock_voltage_dependency_table *table =
> +   hwmgr->dyn_state.vddc_dependency_on_sclk;
> +
> +   struct phm_vce_clock_voltage_dependency_table *vce_table =
> +   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
> +
> +   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
> +   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
> +
> +   uint32_t sclk_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX),
> +   TARGET_AND_CURRENT_PROFILE_INDEX, 
> CURR_SCLK_INDEX);
> +   uint32_t uvd_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_UVD_INDEX);
> +   uint32_t vce_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_VCE_INDEX);
> +
> +   uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent;
> +   uint16_t vddnb, vddgfx;
> +   int result;
> +
> +   switch (idx) {
> +   case AMDG

Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr (v3)

[StDenis, Tom]

Yup.  I misread your comment thinking there was another datastructure you'd 
rather I put the callback in.


Cheers,

Tom



From: Deucher, Alexander
Sent: Monday, September 19, 2016 11:55
To: StDenis, Tom; Alex Deucher
Cc: amd-gfx list
Subject: RE: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)


No need.  The additional cleanups can come later.



Alex



From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of 
StDenis, Tom
Sent: Monday, September 19, 2016 11:55 AM
To: Alex Deucher
Cc: amd-gfx list
Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)



Hi Alex,



Would you prefer I re-write #1 to avoid churn in the tree?



Cheers,

Tom





From: Alex Deucher mailto:alexdeuc...@gmail.com>>
Sent: Monday, September 19, 2016 11:53
To: Tom St Denis
Cc: amd-gfx list; StDenis, Tom
Subject: Re: [PATCH 1/2] drm/amd/powerplay: Add read_sensor() callback to hwmgr 
(v3)



On Mon, Sep 19, 2016 at 9:10 AM, Tom St Denis 
mailto:tstdeni...@gmail.com>> wrote:
> Provides standardized interface to read various sensors.
> The API is extensible (by adding to the end of the
> amd_pp_sensors enumeration list.
>
> Support has been added to Carrizo/smu7
>
> (v2) Squashed the two sensor patches into one.
> (v3) Updated to apply to smu7_hwmgr instead
>
> Signed-off-by: Tom St Denis mailto:tom.stde...@amd.com>>
> ---
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 20 +
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 96 
> +++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 36 +
>  drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 12 +++
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  1 +
>  5 files changed, 165 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index b1d19409bf86..ee0368381e82 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -894,6 +894,25 @@ static int pp_dpm_set_mclk_od(void *handle, uint32_t 
> value)
> return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
>  }
>
> +static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
> +{
> +   struct pp_hwmgr *hwmgr;
> +
> +   if (!handle)
> +   return -EINVAL;
> +
> +   hwmgr = ((struct pp_instance *)handle)->hwmgr;
> +
> +   PP_CHECK_HW(hwmgr);
> +
> +   if (hwmgr->hwmgr_func->read_sensor == NULL) {
> +   printk(KERN_INFO "%s was not implemented.\n", __func__);
> +   return 0;
> +   }
> +
> +   return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
> +}
> +
>  const struct amd_powerplay_funcs pp_dpm_funcs = {
> .get_temperature = pp_dpm_get_temperature,
> .load_firmware = pp_dpm_load_fw,
> @@ -920,6 +939,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
> .set_sclk_od = pp_dpm_set_sclk_od,
> .get_mclk_od = pp_dpm_get_mclk_od,
> .set_mclk_od = pp_dpm_set_mclk_od,
> +   .read_sensor = pp_dpm_read_sensor,

As a future patch it would be nice to hook up this sensor interface to
the existing amdgpu_pm_info code and make that asic indpendent.

Series is:
Reviewed-by: Alex Deucher 
mailto:alexander.deuc...@amd.com>>

Alex


>  };
>
>  static int amd_pp_instance_init(struct amd_pp_init *pp_init,
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 5ecef1732e20..9f3c5a8a903c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -1857,6 +1857,101 @@ static int cz_get_max_high_clocks(struct pp_hwmgr 
> *hwmgr, struct amd_pp_simple_c
> return 0;
>  }
>
> +static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx, int32_t *value)
> +{
> +   struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
> +
> +   struct phm_clock_voltage_dependency_table *table =
> +   hwmgr->dyn_state.vddc_dependency_on_sclk;
> +
> +   struct phm_vce_clock_voltage_dependency_table *vce_table =
> +   hwmgr->dyn_state.vce_clock_voltage_dependency_table;
> +
> +   struct phm_uvd_clock_voltage_dependency_table *uvd_table =
> +   hwmgr->dyn_state.uvd_clock_voltage_dependency_table;
> +
> +   uint32_t sclk_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX),
> +   TARGET_AND_CURRENT_PROFILE_INDEX, 
> CURR_SCLK_INDEX);
> +   uint32_t uvd_index = 
> PHM_GET_FIELD(cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, 
> ixTARGET_AND_CURRENT_PROFILE_INDEX_2),
> +   TARGET_AND_CURRENT_PROFILE_INDEX_2, 
> CURR_UVD_INDEX);
> +   uint32_t vce_index = 
> PHM_GET_FIELD(cgs

Re: [PATCH 1/4] drm/amdgpu/atpx: check for ATIF dGPU wake for display events support

[Alex Deucher]

On Wed, Sep 14, 2016 at 2:49 PM, Alex Deucher  wrote:
> Some ATPX laptops implement special circuitry to generate
> display hotplug events via ACPI when the dGPU is powered off.
> Check if this is supported.
>
> Signed-off-by: Alex Deucher 

Ping on this series?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h  | 2 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 9 +
>  2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 588baaf..681e920 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -2463,11 +2463,13 @@ void amdgpu_register_atpx_handler(void);
>  void amdgpu_unregister_atpx_handler(void);
>  bool amdgpu_has_atpx_dgpu_power_cntl(void);
>  bool amdgpu_is_atpx_hybrid(void);
> +bool amdgpu_atpx_dgpu_req_power_for_displays(void);
>  #else
>  static inline void amdgpu_register_atpx_handler(void) {}
>  static inline void amdgpu_unregister_atpx_handler(void) {}
>  static inline bool amdgpu_has_atpx_dgpu_power_cntl(void) { return false; }
>  static inline bool amdgpu_is_atpx_hybrid(void) { return false; }
> +static inline bool amdgpu_atpx_dgpu_req_power_for_displays(void) { return 
> false; }
>  #endif
>
>  /*
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> index 49de926..550c5ee 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c
> @@ -29,6 +29,7 @@ struct amdgpu_atpx {
> acpi_handle handle;
> struct amdgpu_atpx_functions functions;
> bool is_hybrid;
> +   bool dgpu_req_power_for_displays;
>  };
>
>  static struct amdgpu_atpx_priv {
> @@ -73,6 +74,10 @@ bool amdgpu_is_atpx_hybrid(void) {
> return amdgpu_atpx_priv.atpx.is_hybrid;
>  }
>
> +bool amdgpu_atpx_dgpu_req_power_for_displays(void) {
> +   return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;
> +}
> +
>  /**
>   * amdgpu_atpx_call - call an ATPX method
>   *
> @@ -213,6 +218,10 @@ static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
> atpx->is_hybrid = true;
> }
>
> +   atpx->dgpu_req_power_for_displays = false;
> +   if (valid_bits & ATPX_DGPU_REQ_POWER_FOR_DISPLAYS)
> +   atpx->dgpu_req_power_for_displays = true;
> +
> return 0;
>  }
>
> --
> 2.5.5
>
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[PATCH] drm/amdgpu/dce6: fix off by one in interrupt setup

[Alex Deucher]

Reported-by: Christian Inci 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index fb6dafd..c535f43 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -185,7 +185,7 @@ static void dce_v6_0_pageflip_interrupt_init(struct 
amdgpu_device *adev)
unsigned i;
 
/* Enable pflip interrupts */
-   for (i = 0; i <= adev->mode_info.num_crtc; i++)
+   for (i = 0; i < adev->mode_info.num_crtc; i++)
amdgpu_irq_get(adev, &adev->pageflip_irq, i);
 }
 
@@ -194,7 +194,7 @@ static void dce_v6_0_pageflip_interrupt_fini(struct 
amdgpu_device *adev)
unsigned i;
 
/* Disable pflip interrupts */
-   for (i = 0; i <= adev->mode_info.num_crtc; i++)
+   for (i = 0; i < adev->mode_info.num_crtc; i++)
amdgpu_irq_put(adev, &adev->pageflip_irq, i);
 }
 
-- 
2.5.5

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Re: [pull] radeon and amdgpu drm-next-4.9

[Alex Deucher]

On Sat, Sep 17, 2016 at 6:23 AM, Lukas Wunner  wrote:
> On Fri, Sep 16, 2016 at 06:07:36PM -0400, Alex Deucher wrote:
>> On Fri, Sep 16, 2016 at 5:38 PM, Lukas Wunner  wrote:
>> > On Fri, Sep 16, 2016 at 04:42:43PM -0400, Alex Deucher wrote:
>> >>   drm/amdgpu: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
>> >>   drm/radeon: skip suspend/resume on DRM_SWITCH_POWER_DYNAMIC_OFF
>> >
>> > Those two are unnecessary, it can't happen that the ->suspend hook
>> > is executed with the device runtime suspended.
>> >
>> > Since commit d14d2a8453d6 ("drm: Remove dev_pm_ops from drm_class"),
>> > DRM devices are afforded direct_complete, i.e. if the GPU is runtime
>> > suspended upon system sleep, it is left in this state.  The only
>> > callbacks that are executed are the ->prepare and the ->complete hook.
>> > All the callbacks in-between, like ->suspend, are skipped.
>> >
>> > Even if direct_complete is not afforded for some reason, the PM core
>> > will automatically runtime resume the device before executing ->suspend.
>> >
>> > That ->suspend is skipped in the DRM_SWITCH_POWER_OFF case was done
>> > because the device is suspended behind the PM core's back if runpm=0
>> > is set.  (And it doesn't work properly because the PCI core will
>> > invalidate the saved_state during ->resume_noirq.  That could be
>> > solved by returning 1 from the ->prepare hook in the DRM_SWITCH_POWER_OFF
>> > case, but that's a different story.)
>> >
>> > (Sorry for not raising this earlier, I'm not subscribed to amd-gfx.)
>>
>> Thanks for the heads up.  They shouldn't hurt anything and it matches
>> what other drivers do.  If you feel strongly about it, I can revert
>> them later.
>
> Well, superfluous code shouldn't be included just because it doesn't hurt
> or because others didn't know better either, or removed because of
> someone else's feelings. ;-)

I've reverted the patches.  They'll be in my next pull request.

Alex

>
> You can find the runtime resume before execution of the driver ->suspend
> callback in drivers/pci/pci-driver.c:pci_pm_suspend():
>
> const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
> ...
> pm_runtime_resume(dev);
> ...
> if (pm->suspend) {
> ...
> error = pm->suspend(dev);
>
> The device is prevented from auto-suspending because of a runtime PM ref
> acquired beforehand in drivers/base/power/main.c:device_prepare().
>
> Best regards,
>
> Lukas
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[PATCH] drm/amd/powerplay: fix mclk not switching back after multi-head was disabled

[Alex Deucher]

From: Rex Zhu 

Signed-off-by: Rex Zhu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c | 2 ++
 drivers/gpu/drm/amd/powerplay/eventmgr/psm.c   | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c 
b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
index 635fc4b..92b1178 100644
--- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
+++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventactionchains.c
@@ -262,6 +262,8 @@ static const pem_event_action * const 
display_config_change_event[] = {
unblock_adjust_power_state_tasks,
set_cpu_power_state,
notify_hw_power_source_tasks,
+   get_2d_performance_state_tasks,
+   set_performance_state_tasks,
/* updateDALConfigurationTasks,
variBrightDisplayConfigurationChangeTasks, */
adjust_power_state_tasks,
diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c 
b/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
index 1d1875a..4899088 100644
--- a/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
+++ b/drivers/gpu/drm/amd/powerplay/eventmgr/psm.c
@@ -101,11 +101,12 @@ int psm_adjust_power_state_dynamic(struct pp_eventmgr 
*eventmgr, bool skip)
if (requested == NULL)
return 0;
 
+   phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
+
if (pcurrent == NULL || (0 != phm_check_states_equal(hwmgr, 
&pcurrent->hardware, &requested->hardware, &equal)))
equal = false;
 
if (!equal || 
phm_check_smc_update_required_for_display_configuration(hwmgr)) {
-   phm_apply_state_adjust_rules(hwmgr, requested, pcurrent);
phm_set_power_state(hwmgr, &pcurrent->hardware, 
&requested->hardware);
memcpy(hwmgr->current_ps, hwmgr->request_ps, hwmgr->ps_size);
}
-- 
2.5.5

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Re: [PATCH] drm/amdgpu/dce6: fix off by one in interrupt setup

[StDenis, Tom]

Looks correct and consistent with the other DCE drivers.


Reviewed-by: Tom St Denis 



From: amd-gfx  on behalf of Alex Deucher 

Sent: Monday, September 19, 2016 12:15
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/dce6: fix off by one in interrupt setup

Reported-by: Christian Inci 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index fb6dafd..c535f43 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -185,7 +185,7 @@ static void dce_v6_0_pageflip_interrupt_init(struct 
amdgpu_device *adev)
 unsigned i;

 /* Enable pflip interrupts */
-   for (i = 0; i <= adev->mode_info.num_crtc; i++)
+   for (i = 0; i < adev->mode_info.num_crtc; i++)
 amdgpu_irq_get(adev, &adev->pageflip_irq, i);
 }

@@ -194,7 +194,7 @@ static void dce_v6_0_pageflip_interrupt_fini(struct 
amdgpu_device *adev)
 unsigned i;

 /* Disable pflip interrupts */
-   for (i = 0; i <= adev->mode_info.num_crtc; i++)
+   for (i = 0; i < adev->mode_info.num_crtc; i++)
 amdgpu_irq_put(adev, &adev->pageflip_irq, i);
 }

--
2.5.5

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[PATCH 2/5] drm/amdgpu:correct smc fw version error

[Alex Deucher]

From: Monk Liu 

original method get wrong smc fw version.

Signed-off-by: Monk Liu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index f1c53a2..f6dbdf8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -743,12 +743,13 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device 
*cgs_device,
info->version = 
(uint16_t)le32_to_cpu(header->header.ucode_version);
info->feature_version = 
(uint16_t)le32_to_cpu(header->ucode_feature_version);
} else {
+   uint32_t fw_ver;
char fw_name[30] = {0};
int err = 0;
uint32_t ucode_size;
uint32_t ucode_start_address;
const uint8_t *src;
-   const struct smc_firmware_header_v1_0 *hdr;
+   struct smc_firmware_header_v1_0 *hdr;
 
if (!adev->pm.fw) {
switch (adev->asic_type) {
@@ -793,12 +794,15 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device 
*cgs_device,
}
}
 
-   hdr = (const struct smc_firmware_header_v1_0 *) 
adev->pm.fw->data;
+   hdr = (struct smc_firmware_header_v1_0 *)adev->pm.fw->data;
+   /* firmware version is located at 69 dw from begining */
+   fw_ver = *((uint32_t *)adev->pm.fw->data + 69);
+   hdr->header.ucode_version = fw_ver;
amdgpu_ucode_print_smc_hdr(&hdr->header);
adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);
ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);
-   src = (const uint8_t *)(adev->pm.fw->data +
+   src = (uint8_t *)(adev->pm.fw->data +
   le32_to_cpu(hdr->header.ucode_array_offset_bytes));
 
info->version = adev->pm.fw_version;
-- 
2.5.5

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[PATCH 1/5] drm/amdgpu:changes of virtualization cases probe (v2)

[Alex Deucher]

From: Monk Liu 

1,Changes on virtualization detections
2,Don't load smu & mc firmware if using sr-iov bios
3,skip vPost for sriov & force vPost if dev pass-through

v2: agd: fix missed SI case

Signed-off-by: Monk Liu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 38 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 25 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/cik.c   |  7 --
 drivers/gpu/drm/amd/amdgpu/fiji_smc.c  |  2 +-
 drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  |  4 +++-
 drivers/gpu/drm/amd/amdgpu/iceland_smc.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/si.c|  7 --
 drivers/gpu/drm/amd/amdgpu/tonga_smc.c |  2 +-
 drivers/gpu/drm/amd/amdgpu/vi.c| 36 ++--
 10 files changed, 74 insertions(+), 51 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ee45d9f..ff6e683 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1827,6 +1827,8 @@ struct amdgpu_asic_funcs {
bool (*read_disabled_bios)(struct amdgpu_device *adev);
bool (*read_bios_from_rom)(struct amdgpu_device *adev,
   u8 *bios, u32 length_bytes);
+   void (*detect_hw_virtualization) (struct amdgpu_device *adev);
+   void (*detect_sriov_bios)(struct amdgpu_device *adev);
int (*read_register)(struct amdgpu_device *adev, u32 se_num,
 u32 sh_num, u32 reg_offset, u32 *value);
void (*set_vga_state)(struct amdgpu_device *adev, bool state);
@@ -1836,8 +1838,6 @@ struct amdgpu_asic_funcs {
/* MM block clocks */
int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
-   /* query virtual capabilities */
-   u32 (*get_virtual_caps)(struct amdgpu_device *adev);
/* static power management */
int (*get_pcie_lanes)(struct amdgpu_device *adev);
void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
@@ -1934,15 +1934,36 @@ struct cgs_device *amdgpu_cgs_create_device(struct 
amdgpu_device *adev);
 void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
 
 
+#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
+#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
GPU */
+#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
function */
+#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
through for VM */
 /* GPU virtualization */
-#define AMDGPU_VIRT_CAPS_SRIOV_EN   (1 << 0)
-#define AMDGPU_VIRT_CAPS_IS_VF  (1 << 1)
 struct amdgpu_virtualization {
-   bool supports_sr_iov;
-   bool is_virtual;
-   u32 caps;
+   uint32_t virtual_caps;
 };
 
+#define amdgpu_sriov_enabled(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
+
+#define amdgpu_sriov_vf(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
+
+#define amdgpu_sriov_bios(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
+
+#define amdgpu_passthrough(adev) \
+((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
+
+static inline bool is_virtual_machine(void)
+{
+#ifdef CONFIG_X86
+   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
+#else
+   return false;
+#endif
+}
+
 /*
  * Core structure, functions and helpers.
  */
@@ -2260,12 +2281,13 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
 #define amdgpu_asic_set_uvd_clocks(adev, v, d) 
(adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
 #define amdgpu_asic_set_vce_clocks(adev, ev, ec) 
(adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))
-#define amdgpu_asic_get_virtual_caps(adev) 
((adev)->asic_funcs->get_virtual_caps((adev)))
 #define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs->get_pcie_lanes((adev))
 #define amdgpu_set_pcie_lanes(adev, l) 
(adev)->asic_funcs->set_pcie_lanes((adev), (l))
 #define amdgpu_asic_get_gpu_clock_counter(adev) 
(adev)->asic_funcs->get_gpu_clock_counter((adev))
 #define amdgpu_asic_read_disabled_bios(adev) 
(adev)->asic_funcs->read_disabled_bios((adev))
 #define amdgpu_asic_read_bios_from_rom(adev, b, l) 
(adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
+#define amdgpu_asic_detect_hw_virtualization(adev) 
(adev)->asic_funcs->detect_hw_virtualization((adev))
+#define amdgpu_asic_detect_sriov_bios(adev) 
(adev)->asic_funcs->detect_sriov_bios((adev))
 #define amdgpu_asic_read_register(adev, se, sh, offset, 
v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
 #define amdgpu_gart_flush_gpu_tlb(adev, vmid) 
(adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
 #d

[PATCH 4/5] drm/amdgpu:add fw version entry to info

[Alex Deucher]

From: Frank Min 

Signed-off-by: Frank Min 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c| 42 ++
 drivers/gpu/drm/amd/include/cgs_common.h   |  1 +
 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c |  0
 3 files changed, 43 insertions(+)
 mode change 100644 => 100755 drivers/gpu/drm/amd/include/cgs_common.h
 mode change 100644 => 100755 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index f6dbdf8..ab2d7fb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -711,6 +711,47 @@ static int amdgpu_cgs_rel_firmware(struct cgs_device 
*cgs_device, enum cgs_ucode
return -EINVAL;
 }
 
+static uint16_t amdgpu_get_firmware_version(struct cgs_device *cgs_device,
+   enum cgs_ucode_id type)
+{
+   CGS_FUNC_ADEV;
+   uint16_t fw_version;
+
+   switch (type) {
+   case CGS_UCODE_ID_SDMA0:
+   fw_version = adev->sdma.instance[0].fw_version;
+   break;
+   case CGS_UCODE_ID_SDMA1:
+   fw_version = adev->sdma.instance[1].fw_version;
+   break;
+   case CGS_UCODE_ID_CP_CE:
+   fw_version = adev->gfx.ce_fw_version;
+   break;
+   case CGS_UCODE_ID_CP_PFP:
+   fw_version = adev->gfx.pfp_fw_version;
+   break;
+   case CGS_UCODE_ID_CP_ME:
+   fw_version = adev->gfx.me_fw_version;
+   break;
+   case CGS_UCODE_ID_CP_MEC:
+   fw_version = adev->gfx.mec_fw_version;
+   break;
+   case CGS_UCODE_ID_CP_MEC_JT1:
+   fw_version = adev->gfx.mec_fw_version;
+   break;
+   case CGS_UCODE_ID_CP_MEC_JT2:
+   fw_version = adev->gfx.mec_fw_version;
+   break;
+   case CGS_UCODE_ID_RLC_G:
+   fw_version = adev->gfx.rlc_fw_version;
+   break;
+   default:
+   DRM_ERROR("firmware type %d do not have version\n", 
type);
+   fw_version = 0;
+   }
+   return fw_version;
+}
+
 static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
enum cgs_ucode_id type,
struct cgs_firmware_info *info)
@@ -741,6 +782,7 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device 
*cgs_device,
info->mc_addr = gpu_addr;
info->image_size = data_size;
info->version = 
(uint16_t)le32_to_cpu(header->header.ucode_version);
+   info->fw_version = amdgpu_get_firmware_version(cgs_device, 
type);
info->feature_version = 
(uint16_t)le32_to_cpu(header->ucode_feature_version);
} else {
uint32_t fw_ver;
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h 
b/drivers/gpu/drm/amd/include/cgs_common.h
old mode 100644
new mode 100755
index 6aa8938..df7c18b
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -161,6 +161,7 @@ struct cgs_clock_limits {
  */
 struct cgs_firmware_info {
uint16_tversion;
+   uint16_tfw_version;
uint16_tfeature_version;
uint32_timage_size;
uint64_tmc_addr;
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
old mode 100644
new mode 100755
-- 
2.5.5

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[PATCH 3/5] drm/amdgpu:determine if vPost is needed indeed

[Alex Deucher]

From: Monk Liu 

Signed-off-by: Monk Liu 
Reviewed-by: Alex Deucher 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 48 +++---
 1 file changed, 44 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 2df5f00..e9b29ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -50,6 +50,7 @@
 #include "vi.h"
 #include "bif/bif_4_1_d.h"
 #include 
+#include 
 
 static int amdgpu_debugfs_regs_init(struct amdgpu_device *adev);
 static void amdgpu_debugfs_regs_cleanup(struct amdgpu_device *adev);
@@ -651,6 +652,46 @@ bool amdgpu_card_posted(struct amdgpu_device *adev)
 
 }
 
+static bool amdgpu_vpost_needed(struct amdgpu_device *adev)
+{
+   if (amdgpu_sriov_vf(adev))
+   return false;
+
+   if (amdgpu_passthrough(adev)) {
+   /* for FIJI: In whole GPU pass-through virtualization case
+* old smc fw won't clear some registers (e.g. MEM_SIZE, 
BIOS_SCRATCH)
+* so amdgpu_card_posted return false and driver will 
incorrectly skip vPost.
+* but if we force vPost do in pass-through case, the driver 
reload will hang.
+* whether doing vPost depends on amdgpu_card_posted if smc 
version is above
+* 00160e00 for FIJI.
+*/
+   if (adev->asic_type == CHIP_FIJI) {
+   int err;
+   uint32_t fw_ver;
+   err = request_firmware(&adev->pm.fw, 
"amdgpu/fiji_smc.bin", adev->dev);
+   /* force vPost if error occured */
+   if (err)
+   return true;
+
+   fw_ver = *((uint32_t *)adev->pm.fw->data + 69);
+   if (fw_ver >= 0x00160e00)
+   return !amdgpu_card_posted(adev);
+   }
+   } else {
+   /* in bare-metal case, amdgpu_card_posted return false
+* after system reboot/boot, and return true if driver
+* reloaded.
+* we shouldn't do vPost after driver reload otherwise GPU
+* could hang.
+*/
+   if (amdgpu_card_posted(adev))
+   return false;
+   }
+
+   /* we assume vPost is neede for all other cases */
+   return true;
+}
+
 /**
  * amdgpu_dummy_page_init - init dummy page used by the driver
  *
@@ -1653,14 +1694,13 @@ int amdgpu_device_init(struct amdgpu_device *adev,
amdgpu_asic_detect_sriov_bios(adev);
 
/* Post card if necessary */
-   if (!amdgpu_sriov_vf(adev) &&
-   (!amdgpu_card_posted(adev) || amdgpu_passthrough(adev))) {
+   if (amdgpu_vpost_needed(adev)) {
if (!adev->bios) {
-   dev_err(adev->dev, "Card not posted and no BIOS - 
ignoring\n");
+   dev_err(adev->dev, "no vBIOS found\n");
r = -EINVAL;
goto failed;
}
-   DRM_INFO("GPU not posted. posting now...\n");
+   DRM_INFO("GPU posting now...\n");
r = amdgpu_atom_asic_init(adev->mode_info.atom_context);
if (r) {
dev_err(adev->dev, "gpu post error!\n");
-- 
2.5.5

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[PATCH 5/5] drm/radeon: narrow asic_init for virtualization

[Alex Deucher]

Only needed on CIK+ due to the way pci reset is handled
by the GPU.

Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/radeon/radeon_device.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_device.c 
b/drivers/gpu/drm/radeon/radeon_device.c
index bbc8958..eb92aef4 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -661,8 +661,9 @@ bool radeon_card_posted(struct radeon_device *rdev)
 {
uint32_t reg;
 
-   /* for pass through, always force asic_init */
-   if (radeon_device_is_virtual())
+   /* for pass through, always force asic_init for CI */
+   if (rdev->family >= CHIP_BONAIRE &&
+   radeon_device_is_virtual())
return false;
 
/* required for EFI mode on macbook2,1 which uses an r5xx asic */
-- 
2.5.5

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[PATCH] drm/amd/powerplay: Replace per-asic print_performance with generic

[Tom St Denis]

Replace per-asic print_current_performance() functions with generic
that calls read_sensor.  Tested on Tonga and Carrizo for aesthetics
and accuracy.

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h   | 10 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 62 +-
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 23 ---
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 79 ++-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 39 ++-
 drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h |  4 +-
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  2 -
 7 files changed, 79 insertions(+), 140 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f93c1868d31d..d39fb1ac0c0a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -2352,6 +2352,11 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_gfx_get_gpu_clock_counter(adev) 
(adev)->gfx.funcs->get_gpu_clock_counter((adev))
 #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) 
(adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance))
 
+#define amdgpu_dpm_read_sensor(adev, idx, value) \
+   ((adev)->pp_enabled ? \
+   
(adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), 
(value)) : \
+   -EINVAL)
+
 #define amdgpu_dpm_get_temperature(adev) \
((adev)->pp_enabled ?   \
  
(adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
@@ -2403,11 +2408,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
  
(adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \
  (adev)->pm.funcs->powergate_vce((adev), (g)))
 
-#define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) \
-   ((adev)->pp_enabled ?   \
- 
(adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle,
 (m)) : \
- (adev)->pm.funcs->debugfs_print_current_performance_level((adev), 
(m)))
-
 #define amdgpu_dpm_get_current_power_state(adev) \

(adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index cded0820dc59..5307107d76ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1321,6 +1321,64 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev)
  */
 #if defined(CONFIG_DEBUG_FS)
 
+static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device 
*adev)
+{
+   int32_t value;
+
+   /* sanity check PP is enabled */
+   if (!(adev->powerplay.pp_funcs &&
+ adev->powerplay.pp_funcs->read_sensor))
+ return -EINVAL;
+
+   /* GPU Clocks */
+   seq_printf(m, "GFX Clocks and Power:\n");
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, &value))
+   seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, &value))
+   seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, &value))
+   seq_printf(m, "\t%u mV (VDDGFX)\n", value);
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, &value))
+   seq_printf(m, "\t%u mV (VDDNB)\n", value);
+   seq_printf(m, "\n");
+
+   /* GPU Temp */
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, &value))
+   seq_printf(m, "GPU Temperature: %u C\n", value/1000);
+
+   /* GPU Load */
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, &value))
+   seq_printf(m, "GPU Load: %u %%\n", value);
+   seq_printf(m, "\n");
+
+   /* UVD clocks */
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, &value)) {
+   if (!value) {
+   seq_printf(m, "UVD: Disabled\n");
+   } else {
+   seq_printf(m, "UVD: Enabled\n");
+   if (!amdgpu_dpm_read_sensor(adev, 
AMDGPU_PP_SENSOR_UVD_DCLK, &value))
+   seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
+   if (!amdgpu_dpm_read_sensor(adev, 
AMDGPU_PP_SENSOR_UVD_VCLK, &value))
+   seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
+   }
+   }
+   seq_printf(m, "\n");
+
+   /* VCE clocks */
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, &value)) {
+   if (!value) {
+   seq_printf(m, "VCE: Disabled\n");
+   } else {
+   seq_printf(m, "VCE: Enabled\n");
+   if (!amdg

Re: [PATCH] drm/amd/powerplay: Replace per-asic print_performance with generic

[Alex Deucher]

On Mon, Sep 19, 2016 at 1:45 PM, Tom St Denis  wrote:
> Replace per-asic print_current_performance() functions with generic
> that calls read_sensor.  Tested on Tonga and Carrizo for aesthetics
> and accuracy.
>
> Signed-off-by: Tom St Denis 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h   | 10 +--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 62 +-
>  drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 23 ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c| 79 
> ++-
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 39 ++-
>  drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h |  4 +-
>  drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  2 -
>  7 files changed, 79 insertions(+), 140 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index f93c1868d31d..d39fb1ac0c0a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -2352,6 +2352,11 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>  #define amdgpu_gfx_get_gpu_clock_counter(adev) 
> (adev)->gfx.funcs->get_gpu_clock_counter((adev))
>  #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) 
> (adev)->gfx.funcs->select_se_sh((adev), (se), (sh), (instance))
>
> +#define amdgpu_dpm_read_sensor(adev, idx, value) \
> +   ((adev)->pp_enabled ? \
> +   
> (adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), 
> (value)) : \
> +   -EINVAL)
> +
>  #define amdgpu_dpm_get_temperature(adev) \
> ((adev)->pp_enabled ?   \
>   
> (adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
> @@ -2403,11 +2408,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>   
> (adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : 
> \
>   (adev)->pm.funcs->powergate_vce((adev), (g)))
>
> -#define amdgpu_dpm_debugfs_print_current_performance_level(adev, m) \
> -   ((adev)->pp_enabled ?   \
> - 
> (adev)->powerplay.pp_funcs->print_current_performance_level((adev)->powerplay.pp_handle,
>  (m)) : \
> - 
> (adev)->pm.funcs->debugfs_print_current_performance_level((adev), (m)))
> -
>  #define amdgpu_dpm_get_current_power_state(adev) \
> 
> (adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index cded0820dc59..5307107d76ea 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -1321,6 +1321,64 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device 
> *adev)
>   */
>  #if defined(CONFIG_DEBUG_FS)
>
> +static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct 
> amdgpu_device *adev)
> +{
> +   int32_t value;
> +
> +   /* sanity check PP is enabled */
> +   if (!(adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs->read_sensor))
> + return -EINVAL;
> +
> +   /* GPU Clocks */
> +   seq_printf(m, "GFX Clocks and Power:\n");
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, &value))
> +   seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, &value))
> +   seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, &value))
> +   seq_printf(m, "\t%u mV (VDDGFX)\n", value);
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, &value))
> +   seq_printf(m, "\t%u mV (VDDNB)\n", value);
> +   seq_printf(m, "\n");
> +
> +   /* GPU Temp */
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, &value))
> +   seq_printf(m, "GPU Temperature: %u C\n", value/1000);
> +
> +   /* GPU Load */
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, &value))
> +   seq_printf(m, "GPU Load: %u %%\n", value);
> +   seq_printf(m, "\n");
> +
> +   /* UVD clocks */
> +   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, 
> &value)) {
> +   if (!value) {
> +   seq_printf(m, "UVD: Disabled\n");
> +   } else {
> +   seq_printf(m, "UVD: Enabled\n");
> +   if (!amdgpu_dpm_read_sensor(adev, 
> AMDGPU_PP_SENSOR_UVD_DCLK, &value))
> +   seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
> +   if (!amdgpu_dpm_read_sensor(adev, 
> AMDGPU_PP_SENSOR_UVD_VCLK, &value))
> +   seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
> +   }
> +   }
> +   seq_printf(m, "\n");
> +
> + 

[PATCH 5/5] drm/amdgpu/si: add detect_hw_virtualization asic callback

[Alex Deucher]

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/si.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index a0b6b7e..dc9511c 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1118,9 +1118,16 @@ static int si_set_uvd_clocks(struct amdgpu_device *adev, 
u32 vclk, u32 dclk)
return 0;
 }
 
+static void si_detect_hw_virtualization(struct amdgpu_device *adev)
+{
+   if (is_virtual_machine()) /* passthrough mode */
+   adev->virtualization.virtual_caps |= AMDGPU_PASSTHROUGH_MODE;
+}
+
 static const struct amdgpu_asic_funcs si_asic_funcs =
 {
.read_disabled_bios = &si_read_disabled_bios,
+   .detect_hw_virtualization = si_detect_hw_virtualization,
.read_register = &si_read_register,
.reset = &si_asic_reset,
.set_vga_state = &si_vga_set_state,
-- 
2.5.5

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[PATCH 4/5] drm/amdgpu/cik: add detect_hw_virtualization asic callback

[Alex Deucher]

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/cik.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index e61fdee..a845b6a 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1635,6 +1635,12 @@ static uint32_t cik_get_rev_id(struct amdgpu_device 
*adev)
>> CC_DRM_ID_STRAPS__ATI_REV_ID__SHIFT;
 }
 
+static void cik_detect_hw_virtualization(struct amdgpu_device *adev)
+{
+   if (is_virtual_machine()) /* passthrough mode */
+   adev->virtualization.virtual_caps |= AMDGPU_PASSTHROUGH_MODE;
+}
+
 static const struct amdgpu_ip_block_version bonaire_ip_blocks[] =
 {
/* ORDER MATTERS! */
@@ -2378,6 +2384,7 @@ static const struct amdgpu_asic_funcs cik_asic_funcs =
 {
.read_disabled_bios = &cik_read_disabled_bios,
.read_bios_from_rom = &cik_read_bios_from_rom,
+   .detect_hw_virtualization = cik_detect_hw_virtualization,
.read_register = &cik_read_register,
.reset = &cik_asic_reset,
.set_vga_state = &cik_vga_set_state,
-- 
2.5.5

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[PATCH 3/5] drm/amdgpu: drop unused function

[Alex Deucher]

Not used after Monk's rework.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 -
 1 file changed, 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 76f8298..75f490f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1526,15 +1526,6 @@ static int amdgpu_resume(struct amdgpu_device *adev)
return 0;
 }
 
-static bool amdgpu_device_is_virtual(void)
-{
-#ifdef CONFIG_X86
-   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
-#else
-   return false;
-#endif
-}
-
 static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
 {
if (amdgpu_atombios_has_gpu_virtualization_table(adev))
-- 
2.5.5

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[PATCH 2/5] drm/amdgpu: make sriov bios detection generic

[Alex Deucher]

It's not asic specific.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++--
 drivers/gpu/drm/amd/amdgpu/vi.c| 7 ---
 3 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ff6e683..f3d4bf6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1828,7 +1828,6 @@ struct amdgpu_asic_funcs {
bool (*read_bios_from_rom)(struct amdgpu_device *adev,
   u8 *bios, u32 length_bytes);
void (*detect_hw_virtualization) (struct amdgpu_device *adev);
-   void (*detect_sriov_bios)(struct amdgpu_device *adev);
int (*read_register)(struct amdgpu_device *adev, u32 se_num,
 u32 sh_num, u32 reg_offset, u32 *value);
void (*set_vga_state)(struct amdgpu_device *adev, bool state);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ca161e9..76f8298 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1535,6 +1535,12 @@ static bool amdgpu_device_is_virtual(void)
 #endif
 }
 
+static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
+{
+   if (amdgpu_atombios_has_gpu_virtualization_table(adev))
+   adev->virtualization.virtual_caps |= 
AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
+}
+
 /**
  * amdgpu_device_init - initialize the driver
  *
@@ -1690,8 +1696,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
}
 
/* detect if we are with an SRIOV vbios */
-   if (adev->asic_funcs->detect_sriov_bios)
-   amdgpu_asic_detect_sriov_bios(adev);
+   amdgpu_device_detect_sriov_bios(adev);
 
/* Post card if necessary */
if (amdgpu_vpost_needed(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 81780f1..a8154d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -462,12 +462,6 @@ static void vi_detect_hw_virtualization(struct 
amdgpu_device *adev)
}
 }
 
-static void vi_detect_sriov_bios(struct amdgpu_device *adev)
-{
-   if (amdgpu_atombios_has_gpu_virtualization_table(adev))
-   adev->virtualization.virtual_caps |= 
AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
-}
-
 static const struct amdgpu_allowed_register_entry 
tonga_allowed_read_registers[] = {
{mmGB_MACROTILE_MODE7, true},
 };
@@ -1531,7 +1525,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.read_disabled_bios = &vi_read_disabled_bios,
.read_bios_from_rom = &vi_read_bios_from_rom,
.detect_hw_virtualization = vi_detect_hw_virtualization,
-   .detect_sriov_bios = vi_detect_sriov_bios,
.read_register = &vi_read_register,
.reset = &vi_asic_reset,
.set_vga_state = &vi_vga_set_state,
-- 
2.5.5

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[PATCH 1/5] drm/amdgpu/vi: whitespace fixes

[Alex Deucher]

function declaration parens should be a new line.

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 5141393..81780f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -445,7 +445,8 @@ static bool vi_read_bios_from_rom(struct amdgpu_device 
*adev,
return true;
 }
 
-static void vi_detect_hw_virtualization(struct amdgpu_device *adev) {
+static void vi_detect_hw_virtualization(struct amdgpu_device *adev)
+{
uint32_t reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
/* bit0: 0 means pf and 1 means vf */
/* bit31: 0 means disable IOV and 1 means enable */
@@ -461,7 +462,8 @@ static void vi_detect_hw_virtualization(struct 
amdgpu_device *adev) {
}
 }
 
-static void vi_detect_sriov_bios(struct amdgpu_device *adev) {
+static void vi_detect_sriov_bios(struct amdgpu_device *adev)
+{
if (amdgpu_atombios_has_gpu_virtualization_table(adev))
adev->virtualization.virtual_caps |= 
AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
 }
-- 
2.5.5

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[PATCH 2/5] drm/amdgpu: make sriov bios detection generic (v2)

[Alex Deucher]

It's not asic specific.

v2: drop asic macro

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++--
 drivers/gpu/drm/amd/amdgpu/vi.c| 7 ---
 3 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ff6e683..fb8d603 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1828,7 +1828,6 @@ struct amdgpu_asic_funcs {
bool (*read_bios_from_rom)(struct amdgpu_device *adev,
   u8 *bios, u32 length_bytes);
void (*detect_hw_virtualization) (struct amdgpu_device *adev);
-   void (*detect_sriov_bios)(struct amdgpu_device *adev);
int (*read_register)(struct amdgpu_device *adev, u32 se_num,
 u32 sh_num, u32 reg_offset, u32 *value);
void (*set_vga_state)(struct amdgpu_device *adev, bool state);
@@ -2287,7 +2286,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_asic_read_disabled_bios(adev) 
(adev)->asic_funcs->read_disabled_bios((adev))
 #define amdgpu_asic_read_bios_from_rom(adev, b, l) 
(adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
 #define amdgpu_asic_detect_hw_virtualization(adev) 
(adev)->asic_funcs->detect_hw_virtualization((adev))
-#define amdgpu_asic_detect_sriov_bios(adev) 
(adev)->asic_funcs->detect_sriov_bios((adev))
 #define amdgpu_asic_read_register(adev, se, sh, offset, 
v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
 #define amdgpu_gart_flush_gpu_tlb(adev, vmid) 
(adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
 #define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) 
(adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ca161e9..76f8298 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1535,6 +1535,12 @@ static bool amdgpu_device_is_virtual(void)
 #endif
 }
 
+static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
+{
+   if (amdgpu_atombios_has_gpu_virtualization_table(adev))
+   adev->virtualization.virtual_caps |= 
AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
+}
+
 /**
  * amdgpu_device_init - initialize the driver
  *
@@ -1690,8 +1696,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
}
 
/* detect if we are with an SRIOV vbios */
-   if (adev->asic_funcs->detect_sriov_bios)
-   amdgpu_asic_detect_sriov_bios(adev);
+   amdgpu_device_detect_sriov_bios(adev);
 
/* Post card if necessary */
if (amdgpu_vpost_needed(adev)) {
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 81780f1..a8154d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -462,12 +462,6 @@ static void vi_detect_hw_virtualization(struct 
amdgpu_device *adev)
}
 }
 
-static void vi_detect_sriov_bios(struct amdgpu_device *adev)
-{
-   if (amdgpu_atombios_has_gpu_virtualization_table(adev))
-   adev->virtualization.virtual_caps |= 
AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
-}
-
 static const struct amdgpu_allowed_register_entry 
tonga_allowed_read_registers[] = {
{mmGB_MACROTILE_MODE7, true},
 };
@@ -1531,7 +1525,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
.read_disabled_bios = &vi_read_disabled_bios,
.read_bios_from_rom = &vi_read_bios_from_rom,
.detect_hw_virtualization = vi_detect_hw_virtualization,
-   .detect_sriov_bios = vi_detect_sriov_bios,
.read_register = &vi_read_register,
.reset = &vi_asic_reset,
.set_vga_state = &vi_vga_set_state,
-- 
2.5.5

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Re: [PATCH 1/5] drm/amdgpu/vi: whitespace fixes

[Edward O'Callaghan]

Series is,
Reviewed-by: Edward O'Callaghan 

On 09/20/2016 04:35 AM, Alex Deucher wrote:
> function declaration parens should be a new line.
> 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/vi.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
> index 5141393..81780f1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -445,7 +445,8 @@ static bool vi_read_bios_from_rom(struct amdgpu_device 
> *adev,
>   return true;
>  }
>  
> -static void vi_detect_hw_virtualization(struct amdgpu_device *adev) {
> +static void vi_detect_hw_virtualization(struct amdgpu_device *adev)
> +{
>   uint32_t reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
>   /* bit0: 0 means pf and 1 means vf */
>   /* bit31: 0 means disable IOV and 1 means enable */
> @@ -461,7 +462,8 @@ static void vi_detect_hw_virtualization(struct 
> amdgpu_device *adev) {
>   }
>  }
>  
> -static void vi_detect_sriov_bios(struct amdgpu_device *adev) {
> +static void vi_detect_sriov_bios(struct amdgpu_device *adev)
> +{
>   if (amdgpu_atombios_has_gpu_virtualization_table(adev))
>   adev->virtualization.virtual_caps |= 
> AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
>  }
> 



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Re: [PATCH 2/5] drm/amdgpu: make sriov bios detection generic (v2)

[Edward O'Callaghan]

Reviewed-by: Edward O'Callaghan 

as with the rest of the respective series.

On 09/20/2016 04:44 AM, Alex Deucher wrote:
> It's not asic specific.
> 
> v2: drop asic macro
> 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 --
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +++--
>  drivers/gpu/drm/amd/amdgpu/vi.c| 7 ---
>  3 files changed, 7 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ff6e683..fb8d603 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1828,7 +1828,6 @@ struct amdgpu_asic_funcs {
>   bool (*read_bios_from_rom)(struct amdgpu_device *adev,
>  u8 *bios, u32 length_bytes);
>   void (*detect_hw_virtualization) (struct amdgpu_device *adev);
> - void (*detect_sriov_bios)(struct amdgpu_device *adev);
>   int (*read_register)(struct amdgpu_device *adev, u32 se_num,
>u32 sh_num, u32 reg_offset, u32 *value);
>   void (*set_vga_state)(struct amdgpu_device *adev, bool state);
> @@ -2287,7 +2286,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>  #define amdgpu_asic_read_disabled_bios(adev) 
> (adev)->asic_funcs->read_disabled_bios((adev))
>  #define amdgpu_asic_read_bios_from_rom(adev, b, l) 
> (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
>  #define amdgpu_asic_detect_hw_virtualization(adev) 
> (adev)->asic_funcs->detect_hw_virtualization((adev))
> -#define amdgpu_asic_detect_sriov_bios(adev) 
> (adev)->asic_funcs->detect_sriov_bios((adev))
>  #define amdgpu_asic_read_register(adev, se, sh, offset, 
> v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
>  #define amdgpu_gart_flush_gpu_tlb(adev, vmid) 
> (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
>  #define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) 
> (adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index ca161e9..76f8298 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1535,6 +1535,12 @@ static bool amdgpu_device_is_virtual(void)
>  #endif
>  }
>  
> +static void amdgpu_device_detect_sriov_bios(struct amdgpu_device *adev)
> +{
> + if (amdgpu_atombios_has_gpu_virtualization_table(adev))
> + adev->virtualization.virtual_caps |= 
> AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
> +}
> +
>  /**
>   * amdgpu_device_init - initialize the driver
>   *
> @@ -1690,8 +1696,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
>   }
>  
>   /* detect if we are with an SRIOV vbios */
> - if (adev->asic_funcs->detect_sriov_bios)
> - amdgpu_asic_detect_sriov_bios(adev);
> + amdgpu_device_detect_sriov_bios(adev);
>  
>   /* Post card if necessary */
>   if (amdgpu_vpost_needed(adev)) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
> index 81780f1..a8154d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> @@ -462,12 +462,6 @@ static void vi_detect_hw_virtualization(struct 
> amdgpu_device *adev)
>   }
>  }
>  
> -static void vi_detect_sriov_bios(struct amdgpu_device *adev)
> -{
> - if (amdgpu_atombios_has_gpu_virtualization_table(adev))
> - adev->virtualization.virtual_caps |= 
> AMDGPU_SRIOV_CAPS_SRIOV_VBIOS;
> -}
> -
>  static const struct amdgpu_allowed_register_entry 
> tonga_allowed_read_registers[] = {
>   {mmGB_MACROTILE_MODE7, true},
>  };
> @@ -1531,7 +1525,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
>   .read_disabled_bios = &vi_read_disabled_bios,
>   .read_bios_from_rom = &vi_read_bios_from_rom,
>   .detect_hw_virtualization = vi_detect_hw_virtualization,
> - .detect_sriov_bios = vi_detect_sriov_bios,
>   .read_register = &vi_read_register,
>   .reset = &vi_asic_reset,
>   .set_vga_state = &vi_vga_set_state,
> 



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Re: [PATCH 1/5] drm/amdgpu:changes of virtualization cases probe (v2)

[Edward O'Callaghan]

On 09/20/2016 03:12 AM, Alex Deucher wrote:
> From: Monk Liu 
> 
> 1,Changes on virtualization detections
> 2,Don't load smu & mc firmware if using sr-iov bios
> 3,skip vPost for sriov & force vPost if dev pass-through
> 
> v2: agd: fix missed SI case
> 
> Signed-off-by: Monk Liu 
> Reviewed-by: Alex Deucher 
> Signed-off-by: Alex Deucher 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h| 38 
> +++---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 25 ++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|  2 +-
>  drivers/gpu/drm/amd/amdgpu/cik.c   |  7 --
>  drivers/gpu/drm/amd/amdgpu/fiji_smc.c  |  2 +-
>  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  |  4 +++-
>  drivers/gpu/drm/amd/amdgpu/iceland_smc.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/si.c|  7 --
>  drivers/gpu/drm/amd/amdgpu/tonga_smc.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/vi.c| 36 ++--
>  10 files changed, 74 insertions(+), 51 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index ee45d9f..ff6e683 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1827,6 +1827,8 @@ struct amdgpu_asic_funcs {
>   bool (*read_disabled_bios)(struct amdgpu_device *adev);
>   bool (*read_bios_from_rom)(struct amdgpu_device *adev,
>  u8 *bios, u32 length_bytes);
> + void (*detect_hw_virtualization) (struct amdgpu_device *adev);
> + void (*detect_sriov_bios)(struct amdgpu_device *adev);
>   int (*read_register)(struct amdgpu_device *adev, u32 se_num,
>u32 sh_num, u32 reg_offset, u32 *value);
>   void (*set_vga_state)(struct amdgpu_device *adev, bool state);
> @@ -1836,8 +1838,6 @@ struct amdgpu_asic_funcs {
>   /* MM block clocks */
>   int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
>   int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
> - /* query virtual capabilities */
> - u32 (*get_virtual_caps)(struct amdgpu_device *adev);
>   /* static power management */
>   int (*get_pcie_lanes)(struct amdgpu_device *adev);
>   void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
> @@ -1934,15 +1934,36 @@ struct cgs_device *amdgpu_cgs_create_device(struct 
> amdgpu_device *adev);
>  void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
>  
>  
> +#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov ready */
> +#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is enabled on this 
> GPU */
> +#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual 
> function */
> +#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU is pass 
> through for VM */
>  /* GPU virtualization */
> -#define AMDGPU_VIRT_CAPS_SRIOV_EN   (1 << 0)
> -#define AMDGPU_VIRT_CAPS_IS_VF  (1 << 1)
>  struct amdgpu_virtualization {
> - bool supports_sr_iov;
> - bool is_virtual;
> - u32 caps;
> + uint32_t virtual_caps;
>  };
>  
> +#define amdgpu_sriov_enabled(adev) \
> +((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_ENABLE_IOV)
> +
> +#define amdgpu_sriov_vf(adev) \
> +((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
> +
> +#define amdgpu_sriov_bios(adev) \
> +((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
> +
> +#define amdgpu_passthrough(adev) \
> +((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
> +
> +static inline bool is_virtual_machine(void)
> +{
> +#ifdef CONFIG_X86
> + return boot_cpu_has(X86_FEATURE_HYPERVISOR);
> +#else
> + return false;
> +#endif
> +}
> +
>  /*
>   * Core structure, functions and helpers.
>   */
> @@ -2260,12 +2281,13 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>  #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
>  #define amdgpu_asic_set_uvd_clocks(adev, v, d) 
> (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
>  #define amdgpu_asic_set_vce_clocks(adev, ev, ec) 
> (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))
> -#define amdgpu_asic_get_virtual_caps(adev) 
> ((adev)->asic_funcs->get_virtual_caps((adev)))
>  #define amdgpu_get_pcie_lanes(adev) 
> (adev)->asic_funcs->get_pcie_lanes((adev))
>  #define amdgpu_set_pcie_lanes(adev, l) 
> (adev)->asic_funcs->set_pcie_lanes((adev), (l))
>  #define amdgpu_asic_get_gpu_clock_counter(adev) 
> (adev)->asic_funcs->get_gpu_clock_counter((adev))
>  #define amdgpu_asic_read_disabled_bios(adev) 
> (adev)->asic_funcs->read_disabled_bios((adev))
>  #define amdgpu_asic_read_bios_from_rom(adev, b, l) 
> (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))
> +#define amdgpu_asic_detect_hw_virtualization(adev) 
> (adev)->asic_funcs->detect_hw_virtualization((adev))
> +#define amdgpu_asic_detect_sriov_bios(adev) 
> (adev)->asic_funcs->detect_sriov_bios((adev))
>

Re: [PATCH 0/3] drm/amdgpu: implement raster configuration

[Michel Dänzer]

On 18/09/16 11:36 AM, Huang Rui wrote:
> Hi all,
> 
> This patch set is to introduce the raster configuration for all gfx
> generations.

What's the motivation for doing this in the kernel? Mesa will write its
own values to these registers anyway.


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Libre software enthusiast | Mesa and X developer
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Re: [PATCH 4/6] drm/radeon: Provide page_flip_target hook

[Michel Dänzer]

On 17/09/16 09:41 PM, Mario Kleiner wrote:
> Hi Michel,
> 
> all your patches, both the already merged kernel bits in radeon/amdgpu
> and also all the userspace bits in libdrm/ati-ddx/amdgpu-ddx are all
> 
> Reviewed-and-tested-by: Mario Kleiner 
> 
> I successfully tested with old/current userspace and the new userspace
> patches from your own libdrm/ati-ddx/amdgpu-ddx repos, under radeon-kms
> with HD-5770 and amdgpu-kms with R9 380, under DRI2 and DRI3/Present
> with the new userspace and at least DRI3/Present with the old/current
> userspace (can't quite remember if i also tested with DRI2 on
> old/current userspace, but probably). Hardware measured timing tests all
> work fine.
> 
> So all is good, except for pre-DCE4 without pflip irqs, but for that see
> the patchset i just sent out, which should make those old asics work
> well as well.

Thanks for the testing and patches!


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RE: [PATCH 5/5] drm/amdgpu/si: add detect_hw_virtualization asic callback

[Liu, Monk]

All those 5 patches are :
Reviewed-by: Monk Liu 

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex 
Deucher
Sent: Tuesday, September 20, 2016 2:36 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander 
Subject: [PATCH 5/5] drm/amdgpu/si: add detect_hw_virtualization asic callback

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/si.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c 
index a0b6b7e..dc9511c 100644
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1118,9 +1118,16 @@ static int si_set_uvd_clocks(struct amdgpu_device *adev, 
u32 vclk, u32 dclk)
return 0;
 }
 
+static void si_detect_hw_virtualization(struct amdgpu_device *adev) {
+   if (is_virtual_machine()) /* passthrough mode */
+   adev->virtualization.virtual_caps |= AMDGPU_PASSTHROUGH_MODE; }
+
 static const struct amdgpu_asic_funcs si_asic_funcs =  {
.read_disabled_bios = &si_read_disabled_bios,
+   .detect_hw_virtualization = si_detect_hw_virtualization,
.read_register = &si_read_register,
.reset = &si_asic_reset,
.set_vga_state = &si_vga_set_state,
--
2.5.5

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RE: [PATCH 1/5] drm/amdgpu:changes of virtualization cases probe (v2)

[Deucher, Alexander]

> -Original Message-
> From: Edward O'Callaghan [mailto:funfunc...@folklore1984.net]
> Sent: Monday, September 19, 2016 7:38 PM
> To: Alex Deucher; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander; Liu, Monk
> Subject: Re: [PATCH 1/5] drm/amdgpu:changes of virtualization cases probe
> (v2)
> 
> 
> 
> On 09/20/2016 03:12 AM, Alex Deucher wrote:
> > From: Monk Liu 
> >
> > 1,Changes on virtualization detections
> > 2,Don't load smu & mc firmware if using sr-iov bios
> > 3,skip vPost for sriov & force vPost if dev pass-through
> >
> > v2: agd: fix missed SI case
> >
> > Signed-off-by: Monk Liu 
> > Reviewed-by: Alex Deucher 
> > Signed-off-by: Alex Deucher 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h| 38
> +++---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 25 ++
> --
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|  2 +-
> >  drivers/gpu/drm/amd/amdgpu/cik.c   |  7 --
> >  drivers/gpu/drm/amd/amdgpu/fiji_smc.c  |  2 +-
> >  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c  |  4 +++-
> >  drivers/gpu/drm/amd/amdgpu/iceland_smc.c   |  2 +-
> >  drivers/gpu/drm/amd/amdgpu/si.c|  7 --
> >  drivers/gpu/drm/amd/amdgpu/tonga_smc.c |  2 +-
> >  drivers/gpu/drm/amd/amdgpu/vi.c| 36 ++--
> 
> >  10 files changed, 74 insertions(+), 51 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index ee45d9f..ff6e683 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -1827,6 +1827,8 @@ struct amdgpu_asic_funcs {
> > bool (*read_disabled_bios)(struct amdgpu_device *adev);
> > bool (*read_bios_from_rom)(struct amdgpu_device *adev,
> >u8 *bios, u32 length_bytes);
> > +   void (*detect_hw_virtualization) (struct amdgpu_device *adev);
> > +   void (*detect_sriov_bios)(struct amdgpu_device *adev);
> > int (*read_register)(struct amdgpu_device *adev, u32 se_num,
> >  u32 sh_num, u32 reg_offset, u32 *value);
> > void (*set_vga_state)(struct amdgpu_device *adev, bool state);
> > @@ -1836,8 +1838,6 @@ struct amdgpu_asic_funcs {
> > /* MM block clocks */
> > int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32
> dclk);
> > int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32
> ecclk);
> > -   /* query virtual capabilities */
> > -   u32 (*get_virtual_caps)(struct amdgpu_device *adev);
> > /* static power management */
> > int (*get_pcie_lanes)(struct amdgpu_device *adev);
> > void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
> > @@ -1934,15 +1934,36 @@ struct cgs_device
> *amdgpu_cgs_create_device(struct amdgpu_device *adev);
> >  void amdgpu_cgs_destroy_device(struct cgs_device *cgs_device);
> >
> >
> > +#define AMDGPU_SRIOV_CAPS_SRIOV_VBIOS  (1 << 0) /* vBIOS is sr-iov
> ready */
> > +#define AMDGPU_SRIOV_CAPS_ENABLE_IOV   (1 << 1) /* sr-iov is
> enabled on this GPU */
> > +#define AMDGPU_SRIOV_CAPS_IS_VF(1 << 2) /* this GPU is a virtual
> function */
> > +#define AMDGPU_PASSTHROUGH_MODE(1 << 3) /* thw whole GPU
> is pass through for VM */
> >  /* GPU virtualization */
> > -#define AMDGPU_VIRT_CAPS_SRIOV_EN   (1 << 0)
> > -#define AMDGPU_VIRT_CAPS_IS_VF  (1 << 1)
> >  struct amdgpu_virtualization {
> > -   bool supports_sr_iov;
> > -   bool is_virtual;
> > -   u32 caps;
> > +   uint32_t virtual_caps;
> >  };
> >
> > +#define amdgpu_sriov_enabled(adev) \
> > +((adev)->virtualization.virtual_caps &
> AMDGPU_SRIOV_CAPS_ENABLE_IOV)
> > +
> > +#define amdgpu_sriov_vf(adev) \
> > +((adev)->virtualization.virtual_caps & AMDGPU_SRIOV_CAPS_IS_VF)
> > +
> > +#define amdgpu_sriov_bios(adev) \
> > +((adev)->virtualization.virtual_caps &
> AMDGPU_SRIOV_CAPS_SRIOV_VBIOS)
> > +
> > +#define amdgpu_passthrough(adev) \
> > +((adev)->virtualization.virtual_caps & AMDGPU_PASSTHROUGH_MODE)
> > +
> > +static inline bool is_virtual_machine(void)
> > +{
> > +#ifdef CONFIG_X86
> > +   return boot_cpu_has(X86_FEATURE_HYPERVISOR);
> > +#else
> > +   return false;
> > +#endif
> > +}
> > +
> >  /*
> >   * Core structure, functions and helpers.
> >   */
> > @@ -2260,12 +2281,13 @@ amdgpu_get_sdma_instance(struct
> amdgpu_ring *ring)
> >  #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs-
> >get_xclk((adev))
> >  #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs-
> >set_uvd_clocks((adev), (v), (d))
> >  #define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs-
> >set_vce_clocks((adev), (ev), (ec))
> > -#define amdgpu_asic_get_virtual_caps(adev) ((adev)->asic_funcs-
> >get_virtual_caps((adev)))
> >  #define amdgpu_get_pcie_lanes(adev) (adev)->asic_funcs-
> >get_pcie_lanes((adev))
> >  #define amdgpu_set_pcie_lanes(adev, l) (adev)->asic_funcs-
> >set_pcie_lanes((adev), (l))
> >  #define amdgpu_asic_get_gpu_clock_counter(adev) (adev

RE: [PATCH 0/3] drm/amdgpu: implement raster configuration

[Deucher, Alexander]

> -Original Message-
> From: Michel Dänzer [mailto:mic...@daenzer.net]
> Sent: Monday, September 19, 2016 10:37 PM
> To: Huang, Ray; Deucher, Alexander
> Cc: amd-gfx@lists.freedesktop.org; Wang, Ken; Huan, Alvin
> Subject: Re: [PATCH 0/3] drm/amdgpu: implement raster configuration
> 
> On 18/09/16 11:36 AM, Huang Rui wrote:
> > Hi all,
> >
> > This patch set is to introduce the raster configuration for all gfx
> > generations.
> 
> What's the motivation for doing this in the kernel? Mesa will write its
> own values to these registers anyway.

It's to fix the read register ioctl interface.  The raster config registers can 
be read back by the UMDs, but if the KMD hasn't programmed them, they may have 
bogus values.  It's mainly for the pro drivers which read the raster config 
registers to get the baseline before programming them.  Mesa hardcodes the 
default raster config settings before harvesting.  We arguably should have done 
it in the kernel as well for mesa (my bad).  At least this way both sides are 
doing the right thing.

Alex
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