Re: [PATCH linux] drm/radeon: define RADEON_TILING_R600_NO_SCANOUT

2017-01-13 Thread Emil Velikov 
On 9 January 2017 at 18:34, Andres Rodriguez  wrote:
> Add the missing definition of RADEON_TILING_R600_NO_SCANOUT.
>
> This define currently exists in the libdrm radeon_drm.h, but missing
> from from the kernel radeon_drm.h. This makes the header update process
> inconvenient.
>
> To solve the problem, add the define on the kernel side.
>
> RADEON_TILING_R600_NO_SCANOUT is consumed by the radeon Mesa/Gallium
> driver.
>
It may look a bit iffy to have it here, but it's a bit late to change it now.

Fwiw
Reviewed-by: Emil Velikov 

Thanks !
Emil
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Re: [PATCH libdrm] headers: Sync {amdgpu,radeon}_drm.h with the kernel v2

2017-01-13 Thread Emil Velikov 
On 9 January 2017 at 18:34, Andres Rodriguez  wrote:
> Generated using make headers_install from:
> airlied/drm-next 3806a27 Merge tag 'drm-misc-next-2016-12-30' ...
> +
> drm/radeon: define RADEON_TILING_R600_NO_SCANOUT
>
> By adding RADEON_TILING_R600_NO_SCANOUT to the kernel tree we no longer
> need to maintain this define on radeon_drm.h manually.
>
> v2: Add RADEON_TILING_R600_NO_SCANOUT to the kernel tree instead of
> manually re-adding it.
>
Please hold this off for a bit until the fix lands in airlied/drm-next.

Thanks!
Emil
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Re: [PATCH 2/2] drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}

2017-01-13 Thread StDenis, Tom 
It'd be nicer to move these into the PP_SENSORS framework and then print them 
from pm_info.


But other than that I don't have any strong objections to these patches.


Tom



From: amd-gfx  on behalf of Donny Yang 

Sent: Friday, January 13, 2017 03:58
To: amd-gfx@lists.freedesktop.org
Cc: Donny Yang
Subject: [PATCH 2/2] drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}

Signed-off-by: Donny Yang 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 103e1330..4dd27c28 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4065,6 +4065,8 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
 struct smu7_single_dpm_table *sclk_table = 
&(data->dpm_table.sclk_table);
 struct smu7_single_dpm_table *mclk_table = 
&(data->dpm_table.mclk_table);
 struct smu7_single_dpm_table *pcie_table = 
&(data->dpm_table.pcie_speed_table);
+   struct smu7_single_dpm_table *vddc_table = 
&(data->dpm_table.vddc_table);
+   struct smu7_single_dpm_table *mvdd_table = 
&(data->dpm_table.mvdd_table);
 int i, now, size = 0;
 uint32_t clock, pcie_speed;

@@ -4081,8 +4083,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
 now = i;

 for (i = 0; i < sclk_table->count; i++)
-   size += sprintf(buf + size, "%d: %uMhz %s\n",
+   size += sprintf(buf + size, "%d: %uMhz %umV %s\n",
 i, sclk_table->dpm_levels[i].value / 
100,
+   vddc_table->dpm_levels[i].value,
 (i == now) ? "*" : "");
 break;
 case PP_MCLK:
@@ -4097,8 +4100,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
 now = i;

 for (i = 0; i < mclk_table->count; i++)
-   size += sprintf(buf + size, "%d: %uMhz %s\n",
+   size += sprintf(buf + size, "%d: %uMhz %umV %s\n",
 i, mclk_table->dpm_levels[i].value / 
100,
+   mvdd_table->dpm_levels[i].value,
 (i == now) ? "*" : "");
 break;
 case PP_PCIE:
--
2.11.0

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[PATCH 1/2] drm/amdgpu: Switch error code when bo pin fails. (v3)

2017-01-13 Thread Alex Deucher 
From: Andrey Grodzovsky 

Switching to -ENOMEM resolves a hang in case the driver
uses this function in atomic code path.

v2: Update commit message.
v3:
Remove forcing -EINVAL in case of amdgpu_bo_pin fail
since there is no apparent reason for not just passing
through the the return value.

Signed-off-by: Andrey Grodzovsky 
Reviewed-by: Alex Deucher 
Reviewed-by Harry Wentland 

Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 48a3f67..4986340 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -189,7 +189,6 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
 
r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
if (unlikely(r != 0)) {
-   r = -EINVAL;
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
}
-- 
2.5.5

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[PATCH 2/2] drm/amdgpu: Refactor flip into prepare submit and submit. (v2)

2017-01-13 Thread Alex Deucher 
From: Andrey Grodzovsky 

Make pflip atomic friendly. Split the fuinction into
whatever can fail part and the actual flip submit part.
Call the pre-submit function before atomic states
are swapped so in case of error we can fail the
IOCTL.

v2:
Update due to  target_vblank code change.
Fix identetation.
Change return type for amdgpu_crtc_submit_flip to void

Signed-off-by: Andrey Grodzovsky 
Reviewed-by Harry Wentland 
Signed-off-by: Alex Deucher 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 147 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h|  17 
 2 files changed, 135 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 4986340..d0ad619 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -138,10 +138,56 @@ static void amdgpu_unpin_work_func(struct work_struct 
*__work)
kfree(work);
 }
 
-int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
-struct drm_framebuffer *fb,
-struct drm_pending_vblank_event *event,
-uint32_t page_flip_flags, uint32_t target)
+
+static void amdgpu_flip_work_cleanup(struct amdgpu_flip_work *work)
+{
+   int i;
+
+   amdgpu_bo_unref(>old_abo);
+   dma_fence_put(work->excl);
+   for (i = 0; i < work->shared_count; ++i)
+   dma_fence_put(work->shared[i]);
+   kfree(work->shared);
+   kfree(work);
+}
+
+static void amdgpu_flip_cleanup_unreserve(
+   struct amdgpu_flip_work *work,
+   struct amdgpu_bo *new_abo)
+{
+   amdgpu_bo_unreserve(new_abo);
+   amdgpu_flip_work_cleanup(work);
+}
+
+static void amdgpu_flip_cleanup_unpin(
+   struct amdgpu_flip_work *work,
+   struct amdgpu_bo *new_abo)
+{
+   if (unlikely(amdgpu_bo_unpin(new_abo) != 0))
+   DRM_ERROR("failed to unpin new abo in error path\n");
+   amdgpu_flip_cleanup_unreserve(work, new_abo);
+}
+
+void amdgpu_crtc_cleanup_flip_ctx(
+   struct amdgpu_flip_work *work,
+   struct amdgpu_bo *new_abo)
+{
+   if (unlikely(amdgpu_bo_reserve(new_abo, false) != 0)) {
+   DRM_ERROR("failed to reserve new abo in error path\n");
+   amdgpu_flip_work_cleanup(work);
+   return;
+   }
+   amdgpu_flip_cleanup_unpin(work, new_abo);
+}
+
+int amdgpu_crtc_prepare_flip(
+   struct drm_crtc *crtc,
+   struct drm_framebuffer *fb,
+   struct drm_pending_vblank_event *event,
+   uint32_t page_flip_flags,
+   uint32_t target,
+   struct amdgpu_flip_work **work_p,
+   struct amdgpu_bo **new_abo_p)
 {
struct drm_device *dev = crtc->dev;
struct amdgpu_device *adev = dev->dev_private;
@@ -154,7 +200,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
unsigned long flags;
u64 tiling_flags;
u64 base;
-   int i, r;
+   int r;
 
work = kzalloc(sizeof *work, GFP_KERNEL);
if (work == NULL)
@@ -215,41 +261,84 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
spin_unlock_irqrestore(>dev->event_lock, flags);
r = -EBUSY;
goto pflip_cleanup;
-   }
 
-   amdgpu_crtc->pflip_status = AMDGPU_FLIP_PENDING;
-   amdgpu_crtc->pflip_works = work;
+   }
+   spin_unlock_irqrestore(>dev->event_lock, flags);
 
+   *work_p = work;
+   *new_abo_p = new_abo;
 
-   DRM_DEBUG_DRIVER("crtc:%d[%p], pflip_stat:AMDGPU_FLIP_PENDING, work: 
%p,\n",
-amdgpu_crtc->crtc_id, amdgpu_crtc, 
work);
-   /* update crtc fb */
-   crtc->primary->fb = fb;
-   spin_unlock_irqrestore(>dev->event_lock, flags);
-   amdgpu_flip_work_func(>flip_work.work);
return 0;
 
 pflip_cleanup:
-   if (unlikely(amdgpu_bo_reserve(new_abo, false) != 0)) {
-   DRM_ERROR("failed to reserve new abo in error path\n");
-   goto cleanup;
-   }
+   amdgpu_crtc_cleanup_flip_ctx(work, new_abo);
+   return r;
+
 unpin:
-   if (unlikely(amdgpu_bo_unpin(new_abo) != 0)) {
-   DRM_ERROR("failed to unpin new abo in error path\n");
-   }
+   amdgpu_flip_cleanup_unpin(work, new_abo);
+   return r;
+
 unreserve:
-   amdgpu_bo_unreserve(new_abo);
+   amdgpu_flip_cleanup_unreserve(work, new_abo);
+   return r;
 
 cleanup:
-   amdgpu_bo_unref(>old_abo);
-   dma_fence_put(work->excl);
-   for (i = 0; i < work->shared_count; ++i)
-

Re: [PATCH 2/3] drm/amdgpu:implement META-DATA write routines

2017-01-13 Thread Alex Deucher 
On Thu, Jan 12, 2017 at 2:41 AM, Monk Liu  wrote:
> Change-Id: I66007a7f7e4e27fb129121f36143dce3cfb43738
> Signed-off-by: Monk Liu 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h   | 31 ++
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 
> +++
>  2 files changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index e9983fb..2039da7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1599,6 +1599,37 @@ static inline void amdgpu_ring_write(struct 
> amdgpu_ring *ring, uint32_t v)
> ring->count_dw--;
>  }
>
> +static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void 
> *src, int count_dw)
> +{
> +   unsigned occupied, chunk1, chunk2;
> +   void *dst;
> +
> +   if (ring->count_dw < count_dw)
> +   DRM_ERROR("amdgpu: writing more dwords to the ring than 
> expected!\n");
> +   else {

Parens coding style as noted by Christian.  Also, this behavior
differs from amdgpu_ring_write() which completes the writes anyway.

> +   occupied = ring->wptr & ring->ptr_mask;
> +   dst = (void *)>ring[occupied];
> +   chunk1 = ring->ptr_mask + 1 - occupied;
> +   chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> +   chunk2 = count_dw - chunk1;
> +   chunk1 <<= 2;
> +   chunk2 <<= 2;
> +   if (chunk1) {
> +   memcpy(dst, src, chunk1);
> +   }
> +
> +   if (chunk2) {
> +   src += chunk1;
> +   dst = (void *)ring->ring;
> +   memcpy(dst, src, chunk2);
> +   }
> +
> +   ring->wptr += count_dw;
> +   ring->wptr &= ring->ptr_mask;
> +   ring->count_dw -= count_dw;
> +   }
> +}
> +

This hunk should be a separate patch.


>  static inline struct amdgpu_sdma_instance *
>  amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>  {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 375784d..3e8cff3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -657,6 +657,8 @@ static void gfx_v8_0_set_gds_init(struct amdgpu_device 
> *adev);
>  static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev);
>  static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev);
>  static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev);
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, 
> uint64_t addr);
> +static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, 
> uint64_t addr);
>
>  static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
>  {
> @@ -7212,3 +7214,62 @@ const struct amdgpu_ip_block_version gfx_v8_1_ip_block 
> =
> .rev = 0,
> .funcs = _v8_0_ip_funcs,
>  };
> +
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, 
> uint64_t csa_addr)
> +{
> +   uint64_t ce_payload_addr;
> +   int cnt_ce;
> +   static union {
> +   struct amdgpu_ce_ib_state regular;
> +   struct amdgpu_ce_ib_state_chained_ib chained;
> +   } ce_payload = {0};
> +
> +   if (ring->adev->virt.chained_ib_support) {
> +   ce_payload_addr = csa_addr + offsetof(struct 
> amdgpu_gfx_meta_data_chained_ib, ce_payload);
> +   cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
> +   } else {
> +   ce_payload_addr = csa_addr + offsetof(struct 
> amdgpu_gfx_meta_data, ce_payload);
> +   cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
> +   }
> +
> +   amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));
> +   amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
> +   WRITE_DATA_DST_SEL(8) |
> +   WR_CONFIRM) |
> +   WRITE_DATA_CACHE_POLICY(0));
> +   amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));
> +   amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));
> +   amdgpu_ring_write_multiple(ring, (void *)_payload, cnt_ce - 2);
> +}
> +
> +static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, 
> uint64_t csa_addr)
> +{
> +   uint64_t de_payload_addr, gds_addr;
> +   int cnt_de;
> +   static union {
> +   struct amdgpu_de_ib_state regular;
> +   struct amdgpu_de_ib_state_chained_ib chained;
> +   } de_payload = {0};
> +
> +   gds_addr = csa_addr + 4096;
> +   if (ring->adev->virt.chained_ib_support) {
> +   de_payload.chained.gds_backup_addrlo = 
> lower_32_bits(gds_addr);
> +   de_payload.chained.gds_backup_addrhi = 
> upper_32_bits(gds_addr);
> +   de_payload_addr = csa_addr +

Re: [PATCH 3/3] drm/amdgpu:invoke meta-data write around cntx_cntl

2017-01-13 Thread Alex Deucher 
On Thu, Jan 12, 2017 at 2:41 AM, Monk Liu  wrote:
> ce's META-DATA write need prior to cntx_cntrl package
> and de's should following.
>
> Change-Id: I2bf436d8a16bae38ce484f846f0b399e16cfe80a
> Signed-off-by: Monk Liu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 +++
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 8 
>  3 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 2039da7..b7f7679 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -953,6 +953,7 @@ struct amdgpu_cs_parser {
>  #define AMDGPU_PREAMBLE_IB_PRESENT  (1 << 0) /* bit set means 
> command submit involves a preamble IB */
>  #define AMDGPU_PREAMBLE_IB_PRESENT_FIRST(1 << 1) /* bit set means 
> preamble IB is first presented in belonging context */
>  #define AMDGPU_HAVE_CTX_SWITCH  (1 << 2) /* bit set means 
> context switch occured */
> +#define AMDGPU_VM_DOMAIN(1 << 3) /* bit set means in 
> virtual memory context */
>
>  struct amdgpu_job {
> struct amd_sched_jobbase;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index 16308eb..6939822 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -184,6 +184,9 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
> num_ibs,
> if (need_ctx_switch)
> status |= AMDGPU_HAVE_CTX_SWITCH;
> status |= job->preamble_status;
> +
> +   if (vm)
> +   status |= AMDGPU_VM_DOMAIN;
> amdgpu_ring_emit_cntxcntl(ring, status);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 3e8cff3..8a5c818 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -6704,6 +6704,10 @@ static void gfx_v8_ring_emit_cntxcntl(struct 
> amdgpu_ring *ring, uint32_t flags)
>  {
> uint32_t dw2 = 0;
>
> +   if (amdgpu_sriov_vf(ring->adev))
> +   gfx_v8_0_ring_emit_ce_meta_init(ring,
> +   (flags & AMDGPU_VM_DOMAIN) ? AMDGPU_CSA_VADDR : 
> ring->adev->virt.csa_vmid0_addr);
> +
> dw2 |= 0x8000; /* set load_enable otherwise this package is just 
> NOPs */
> if (flags & AMDGPU_HAVE_CTX_SWITCH) {
> gfx_v8_0_ring_emit_vgt_flush(ring);
> @@ -6728,6 +6732,10 @@ static void gfx_v8_ring_emit_cntxcntl(struct 
> amdgpu_ring *ring, uint32_t flags)
> amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
> amdgpu_ring_write(ring, dw2);
> amdgpu_ring_write(ring, 0);
> +
> +   if (amdgpu_sriov_vf(ring->adev))
> +   gfx_v8_0_ring_emit_de_meta_init(ring,
> +   (flags & AMDGPU_VM_DOMAIN) ? AMDGPU_CSA_VADDR : 
> ring->adev->virt.csa_vmid0_addr);
>  }
>
>  static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
> --
> 2.7.4
>
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Re: [PATCH 1/2] drm/amdgpu: Switch error code when bo pin fails. (v3)

2017-01-13 Thread Christian König 

Am 13.01.2017 um 19:26 schrieb Alex Deucher:

From: Andrey Grodzovsky 

Switching to -ENOMEM resolves a hang in case the driver
uses this function in atomic code path.

v2: Update commit message.
v3:
Remove forcing -EINVAL in case of amdgpu_bo_pin fail
since there is no apparent reason for not just passing
through the the return value.

Signed-off-by: Andrey Grodzovsky 
Reviewed-by: Alex Deucher 
Reviewed-by Harry Wentland 


Reviewed-by: Christian König .



Signed-off-by: Alex Deucher 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 -
  1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 48a3f67..4986340 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -189,7 +189,6 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
  
  	r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );

if (unlikely(r != 0)) {
-   r = -EINVAL;
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
}



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Re: [PATCH 2/2] drm/amdgpu: Refactor flip into prepare submit and submit. (v2)

2017-01-13 Thread Christian König 

Am 13.01.2017 um 19:26 schrieb Alex Deucher:

From: Andrey Grodzovsky 

Make pflip atomic friendly. Split the fuinction into
whatever can fail part and the actual flip submit part.
Call the pre-submit function before atomic states
are swapped so in case of error we can fail the
IOCTL.

v2:
Update due to  target_vblank code change.
Fix identetation.
Change return type for amdgpu_crtc_submit_flip to void

Signed-off-by: Andrey Grodzovsky 
Reviewed-by Harry Wentland 
Signed-off-by: Alex Deucher 


The coding style on a couple of functions headers is incorrect, here for 
example:

void amdgpu_crtc_cleanup_flip_ctx(
struct amdgpu_flip_work *work,
struct amdgpu_bo *new_abo)


That should look like:

void amdgpu_crtc_cleanup_flip_ctx(struct amdgpu_flip_work *work,
  struct amdgpu_bo *new_abo)


Regards,
Christian.
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[PATCH] drm/amdgpu: Use signed arithmetic for overdrive clock calculations

2017-01-13 Thread Donny Yang 
Signed-off-by: Donny Yang 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 70 +++-
 1 file changed, 21 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index a74f60a5..f6c01e19 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -3349,7 +3349,8 @@ static int smu7_populate_and_upload_sclk_mclk_dpm_levels(
struct smu7_dpm_table *dpm_table = >dpm_table;
 
struct smu7_dpm_table *golden_dpm_table = >golden_dpm_table;
-   uint32_t dpm_count, clock_percent;
+   uint32_t dpm_count;
+   int32_t clock_percent;
uint32_t i;
 
if (0 == data->need_update_smu7_dpm_table)
@@ -3371,32 +3372,16 @@ static int 
smu7_populate_and_upload_sclk_mclk_dpm_levels(
return -EINVAL);
dpm_count = dpm_table->sclk_table.count < 2 ? 0 : 
dpm_table->sclk_table.count - 2;
 
+   clock_percent =
+   ((sclk
+   - 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value
+   ) * 100)
+   / 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value;
for (i = dpm_count; i > 1; i--) {
-   if (sclk > 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value)
 {
-   clock_percent =
- ((sclk
-   - 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value
-   ) * 100)
-   / 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value;
-
-   
dpm_table->sclk_table.dpm_levels[i].value =
-   
golden_dpm_table->sclk_table.dpm_levels[i].value +
-   
(golden_dpm_table->sclk_table.dpm_levels[i].value *
-   
clock_percent)/100;
-
-   } else if 
(golden_dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value > 
sclk) {
-   clock_percent =
-   
((golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count - 
1].value
-   - sclk) * 100)
-   / 
golden_dpm_table->sclk_table.dpm_levels[golden_dpm_table->sclk_table.count-1].value;
-
-   
dpm_table->sclk_table.dpm_levels[i].value =
-   
golden_dpm_table->sclk_table.dpm_levels[i].value -
-   
(golden_dpm_table->sclk_table.dpm_levels[i].value *
-   
clock_percent) / 100;
-   } else
-   
dpm_table->sclk_table.dpm_levels[i].value =
-   
golden_dpm_table->sclk_table.dpm_levels[i].value;
+   dpm_table->sclk_table.dpm_levels[i].value =
+   
golden_dpm_table->sclk_table.dpm_levels[i].value +
+   
(golden_dpm_table->sclk_table.dpm_levels[i].value *
+   clock_percent) 
/ 100;
}
}
}
@@ -3414,30 +3399,17 @@ static int 
smu7_populate_and_upload_sclk_mclk_dpm_levels(
"Divide by 0!",
return -EINVAL);
dpm_count = dpm_table->mclk_table.count < 2 ? 0 : 
dpm_table->mclk_table.count - 2;
+
+   clock_percent =
+   ((mclk
+   - 
golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value
+   ) * 100)
+   / 
golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value;
for (i = dpm_count; i > 1; i--) {
-   if 
(golden_dpm_table->mclk_table.dpm_levels[golden_dpm_table->mclk_table.count-1].value
 < mclk) {
-   clock_percent = ((mclk -
-

[PATCH 0/2] Report VDDC and MVDD over pp_dpm{sclk,mclk}

2017-01-13 Thread Donny Yang 
Tested on a RX480.

I'm not sure whether to report VDDCI or MVDD for memory. MVDD felt "more"
correct, so that's what I've done.

Donny Yang (2):
  drm/amdgpu: Populate DPMv1 voltage tables
  drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}

 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 54 +---
 1 file changed, 39 insertions(+), 15 deletions(-)

-- 
2.11.0

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[PATCH 1/2] drm/amdgpu: Populate DPMv1 voltage tables

2017-01-13 Thread Donny Yang 
Signed-off-by: Donny Yang 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 46 +---
 1 file changed, 33 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index f6c01e19..103e1330 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -705,7 +705,7 @@ static int smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr)
 
/* Initialize Vddc DPM table based on allow Vddc values.  And populate 
corresponding std values. */
for (i = 0; i < allowed_vdd_sclk_table->count; i++) {
-   data->dpm_table.vddc_table.dpm_levels[i].value = 
allowed_vdd_mclk_table->entries[i].v;
+   data->dpm_table.vddc_table.dpm_levels[i].value = 
allowed_vdd_sclk_table->entries[i].v;
data->dpm_table.vddc_table.dpm_levels[i].param1 = 
std_voltage_table->entries[i].Leakage;
/* param1 is for corresponding std voltage */
data->dpm_table.vddc_table.dpm_levels[i].enabled = 1;
@@ -749,12 +749,19 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr 
*hwmgr)
 
struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table;
struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
+   struct smu7_single_dpm_table *sclk_table, *mclk_table,
+   *vddc_table, *mvdd_table, *vddci_table;
 
if (table_info == NULL)
return -EINVAL;
 
dep_sclk_table = table_info->vdd_dep_on_sclk;
dep_mclk_table = table_info->vdd_dep_on_mclk;
+   sclk_table = >dpm_table.sclk_table;
+   mclk_table = >dpm_table.mclk_table;
+   vddc_table = >dpm_table.vddc_table;
+   mvdd_table = >dpm_table.mvdd_table;
+   vddci_table = >dpm_table.vddci_table;
 
PP_ASSERT_WITH_CODE(dep_sclk_table != NULL,
"SCLK dependency table is missing.",
@@ -770,32 +777,45 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr 
*hwmgr)
"MCLK dependency table count is 0",
return -EINVAL);
 
-   /* Initialize Sclk DPM table based on allow Sclk values */
+   /* Initialize Sclk and VDDC DPM table based on allow Sclk values */
data->dpm_table.sclk_table.count = 0;
+   data->dpm_table.vddc_table.count = 0;
for (i = 0; i < dep_sclk_table->count; i++) {
if (i == 0 || 
data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count - 
1].value !=
dep_sclk_table->entries[i].clk) 
{
+   phm_ppt_v1_clock_voltage_dependency_record *entry = 
_sclk_table->entries[i];
 
-   
data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value =
-   dep_sclk_table->entries[i].clk;
+   sclk_table->dpm_levels[sclk_table->count].value = 
entry->clk;
+   sclk_table->dpm_levels[sclk_table->count].enabled = i 
== 0;
+   sclk_table->count++;
 
-   
data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled 
=
-   (i == 0) ? true : false;
-   data->dpm_table.sclk_table.count++;
+   vddc_table->dpm_levels[vddc_table->count].value = 
entry->vddc;
+   vddc_table->dpm_levels[vddc_table->count].enabled = i 
== 0;
+   vddc_table->count++;
}
}
 
-   /* Initialize Mclk DPM table based on allow Mclk values */
+   /* Initialize Mclk, VDDCI and MVDD DPM table based on allow Mclk values 
*/
data->dpm_table.mclk_table.count = 0;
+   data->dpm_table.mvdd_table.count = 0;
+   data->dpm_table.vddci_table.count = 0;
for (i = 0; i < dep_mclk_table->count; i++) {
if (i == 0 || data->dpm_table.mclk_table.dpm_levels
[data->dpm_table.mclk_table.count - 1].value !=
dep_mclk_table->entries[i].clk) 
{
-   
data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value =
-   
dep_mclk_table->entries[i].clk;
-   
data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled 
=
-   (i == 0) ? true : false;
-   data->dpm_table.mclk_table.count++;
+   phm_ppt_v1_clock_voltage_dependency_record *entry = 
_mclk_table->entries[i];
+
+   mclk_table->dpm_levels[mclk_table->count].value = 
entry->clk;
+   mclk_table->dpm_levels[mclk_table->count].enabled = i 
== 0;
+   mclk_table->count++;
+
+

[PATCH 2/2] drm/amdgpu: Report VDDC and MVDD over pp_dpm{sclk,mclk}

2017-01-13 Thread Donny Yang 
Signed-off-by: Donny Yang 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 103e1330..4dd27c28 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4065,6 +4065,8 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
struct smu7_single_dpm_table *sclk_table = 
&(data->dpm_table.sclk_table);
struct smu7_single_dpm_table *mclk_table = 
&(data->dpm_table.mclk_table);
struct smu7_single_dpm_table *pcie_table = 
&(data->dpm_table.pcie_speed_table);
+   struct smu7_single_dpm_table *vddc_table = 
&(data->dpm_table.vddc_table);
+   struct smu7_single_dpm_table *mvdd_table = 
&(data->dpm_table.mvdd_table);
int i, now, size = 0;
uint32_t clock, pcie_speed;
 
@@ -4081,8 +4083,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
now = i;
 
for (i = 0; i < sclk_table->count; i++)
-   size += sprintf(buf + size, "%d: %uMhz %s\n",
+   size += sprintf(buf + size, "%d: %uMhz %umV %s\n",
i, sclk_table->dpm_levels[i].value / 
100,
+   vddc_table->dpm_levels[i].value,
(i == now) ? "*" : "");
break;
case PP_MCLK:
@@ -4097,8 +4100,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
now = i;
 
for (i = 0; i < mclk_table->count; i++)
-   size += sprintf(buf + size, "%d: %uMhz %s\n",
+   size += sprintf(buf + size, "%d: %uMhz %umV %s\n",
i, mclk_table->dpm_levels[i].value / 
100,
+   mvdd_table->dpm_levels[i].value,
(i == now) ? "*" : "");
break;
case PP_PCIE:
-- 
2.11.0

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Re: 答复: [PATCH] drm/amdgpu:put CSA unmap after sched_entity_fini

2017-01-13 Thread Christian König 
Ah, in this case please separate the amdgpu_vm_bo_rmv() from setting 
csa_addr to NULL.


Cause amdgpu_vm_bo_rmv() should come before amdgpu_vm_fini() and that in 
turn should become before waiting for the scheduler so that the MM knows 
that the memory is about to be freed.


Regards,
Christian.

Am 13.01.2017 um 10:56 schrieb Liu, Monk:


only with amdgpu_vm_bo_rmv() won't has such bug, but in another branch 
for sriov, we not only call vm_bo_rmv(), and we also set csa_addr to 
NULL after it, so the NULL address is inserted in RB, and when 
preemption occured, CP backup snapshot to NULL address.



although in staging-4.9 we didn't set csa_addr to NULL (because as you 
suggested we always use HARDCODE/MACRO for CSA address), but logically 
we'd better put CSA unmapping stuffs behind "sched_entity_fini", which 
is more reasonable ...



BR Monk


*发件人:* amd-gfx  代表 Christian 
König 

*发送时间:* 2017年1月13日 17:25:09
*收件人:* Liu, Monk; amd-gfx@lists.freedesktop.org
*主题:* Re: [PATCH] drm/amdgpu:put CSA unmap after sched_entity_fini
Am 13.01.2017 um 05:11 schrieb Monk Liu:
> otherwise CSA may unmapped before gpu_scheduler scheduling
> jobs and trigger VM fault on CSA address
>
> Change-Id: Ib2e25ededf89bca44c764477dd2f9127024ca78c
> Signed-off-by: Monk Liu 

Did you really run into an issue because of that?

Calling amdgpu_vm_bo_rmv() shouldn't affect the page tables nor already
submitted command submissions in any way.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 8 
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 8 
>   2 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

> index 45484c0..e13cdde 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -694,14 +694,6 @@ void amdgpu_driver_postclose_kms(struct 
drm_device *dev,

>amdgpu_uvd_free_handles(adev, file_priv);
>amdgpu_vce_free_handles(adev, file_priv);
>
> - if (amdgpu_sriov_vf(adev)) {
> - /* TODO: how to handle reserve failure */
> - BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, false));
> - amdgpu_vm_bo_rmv(adev, fpriv->vm.csa_bo_va);
> - fpriv->vm.csa_bo_va = NULL;
> - amdgpu_bo_unreserve(adev->virt.csa_obj);
> - }
> -
>amdgpu_vm_fini(adev, >vm);
>
> idr_for_each_entry(>bo_list_handles, list, handle)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

> index d05546e..94098bc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1608,6 +1608,14 @@ void amdgpu_vm_fini(struct amdgpu_device 
*adev, struct amdgpu_vm *vm)

>
>amd_sched_entity_fini(vm->entity.sched, >entity);
>
> + if (amdgpu_sriov_vf(adev)) {
> + /* TODO: how to handle reserve failure */
> + BUG_ON(amdgpu_bo_reserve(adev->virt.csa_obj, false));
> + amdgpu_vm_bo_rmv(adev, vm->csa_bo_va);
> + vm->csa_bo_va = NULL;
> + amdgpu_bo_unreserve(adev->virt.csa_obj);
> + }
> +
>if (!RB_EMPTY_ROOT(>va)) {
>dev_err(adev->dev, "still active bo inside vm\n");
>}


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[PATCH 5/6] drm/ttm: revert "implement LRU add callbacks v2"

2017-01-13 Thread Christian König 
From: Christian König 

The additional housekeeping had to much CPU overhead,
let's use the BO priorities instead.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  2 --
 drivers/gpu/drm/ast/ast_ttm.c   |  2 --
 drivers/gpu/drm/bochs/bochs_mm.c|  2 --
 drivers/gpu/drm/cirrus/cirrus_ttm.c |  2 --
 drivers/gpu/drm/mgag200/mgag200_ttm.c   |  2 --
 drivers/gpu/drm/nouveau/nouveau_bo.c|  2 --
 drivers/gpu/drm/qxl/qxl_ttm.c   |  2 --
 drivers/gpu/drm/radeon/radeon_ttm.c |  2 --
 drivers/gpu/drm/ttm/ttm_bo.c| 19 +--
 drivers/gpu/drm/virtio/virtgpu_ttm.c|  2 --
 drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c  |  2 --
 include/drm/ttm/ttm_bo_driver.h |  9 -
 12 files changed, 5 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index dd086d8..0402a11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1086,8 +1086,6 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
.fault_reserve_notify = _bo_fault_reserve_notify,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int amdgpu_ttm_init(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c
index 2a1368f..50c910e 100644
--- a/drivers/gpu/drm/ast/ast_ttm.c
+++ b/drivers/gpu/drm/ast/ast_ttm.c
@@ -236,8 +236,6 @@ struct ttm_bo_driver ast_bo_driver = {
.verify_access = ast_bo_verify_access,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int ast_mm_init(struct ast_private *ast)
diff --git a/drivers/gpu/drm/bochs/bochs_mm.c b/drivers/gpu/drm/bochs/bochs_mm.c
index 099a3c6..e4c1125 100644
--- a/drivers/gpu/drm/bochs/bochs_mm.c
+++ b/drivers/gpu/drm/bochs/bochs_mm.c
@@ -205,8 +205,6 @@ struct ttm_bo_driver bochs_bo_driver = {
.verify_access = bochs_bo_verify_access,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int bochs_mm_init(struct bochs_device *bochs)
diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c 
b/drivers/gpu/drm/cirrus/cirrus_ttm.c
index d6da848..f53aa8f 100644
--- a/drivers/gpu/drm/cirrus/cirrus_ttm.c
+++ b/drivers/gpu/drm/cirrus/cirrus_ttm.c
@@ -236,8 +236,6 @@ struct ttm_bo_driver cirrus_bo_driver = {
.verify_access = cirrus_bo_verify_access,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int cirrus_mm_init(struct cirrus_device *cirrus)
diff --git a/drivers/gpu/drm/mgag200/mgag200_ttm.c 
b/drivers/gpu/drm/mgag200/mgag200_ttm.c
index 5e20220..657598b 100644
--- a/drivers/gpu/drm/mgag200/mgag200_ttm.c
+++ b/drivers/gpu/drm/mgag200/mgag200_ttm.c
@@ -236,8 +236,6 @@ struct ttm_bo_driver mgag200_bo_driver = {
.verify_access = mgag200_bo_verify_access,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int mgag200_mm_init(struct mga_device *mdev)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c 
b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 5b0a28b..3949a74 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1570,8 +1570,6 @@ struct ttm_bo_driver nouveau_bo_driver = {
.fault_reserve_notify = _ttm_fault_reserve_notify,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 struct nvkm_vma *
diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c
index f3939a9..2955f91 100644
--- a/drivers/gpu/drm/qxl/qxl_ttm.c
+++ b/drivers/gpu/drm/qxl/qxl_ttm.c
@@ -395,8 +395,6 @@ static struct ttm_bo_driver qxl_bo_driver = {
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
.move_notify = _bo_move_notify,
-   .lru_tail = _bo_default_lru_tail,
-   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int qxl_ttm_init(struct qxl_device *qdev)
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c 
b/drivers/gpu/drm/radeon/radeon_ttm.c
index 0cf03cc..d610481 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -871,8 +871,6 @@ static struct ttm_bo_driver radeon_bo_driver = {
.fault_reserve_notify = _bo_fault_reserve_notify,

[PATCH 3/6] drm/amdgpu: user BO priority instead of self coding it

2017-01-13 Thread Christian König 
From: Christian König 

Keeping groups of BOs on the LRU is to time consuming on command submission.

Instead use the newly added BO priority to give a certain eviction order.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  3 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 69 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h| 12 --
 3 files changed, 5 insertions(+), 79 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 5076bc2..f399d98 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -386,6 +386,9 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
if (unlikely(r != 0))
return r;
 
+   bo->tbo.priority = ilog2(bo->tbo.num_pages);
+   bo->tbo.priority = min(bo->tbo.priority, TTM_MAX_BO_PRIORITY - 1);
+
if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
struct fence *fence;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 0a61930..dd086d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1048,56 +1048,6 @@ uint32_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device 
*adev, struct ttm_tt *ttm,
return flags;
 }
 
-static void amdgpu_ttm_lru_removal(struct ttm_buffer_object *tbo)
-{
-   struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev);
-   unsigned i, j;
-
-   for (i = 0; i < AMDGPU_TTM_LRU_SIZE; ++i) {
-   struct amdgpu_mman_lru *lru = >mman.log2_size[i];
-
-   for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
-   if (>lru == lru->lru[j])
-   lru->lru[j] = tbo->lru.prev;
-
-   if (>swap == lru->swap_lru)
-   lru->swap_lru = tbo->swap.prev;
-   }
-}
-
-static struct amdgpu_mman_lru *amdgpu_ttm_lru(struct ttm_buffer_object *tbo)
-{
-   struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev);
-   unsigned log2_size = min(ilog2(tbo->num_pages),
-AMDGPU_TTM_LRU_SIZE - 1);
-
-   return >mman.log2_size[log2_size];
-}
-
-static struct list_head *amdgpu_ttm_lru_tail(struct ttm_buffer_object *tbo)
-{
-   struct amdgpu_mman_lru *lru = amdgpu_ttm_lru(tbo);
-   struct list_head *res = lru->lru[tbo->mem.mem_type];
-
-   lru->lru[tbo->mem.mem_type] = >lru;
-   while ((++lru)->lru[tbo->mem.mem_type] == res)
-   lru->lru[tbo->mem.mem_type] = >lru;
-
-   return res;
-}
-
-static struct list_head *amdgpu_ttm_swap_lru_tail(struct ttm_buffer_object 
*tbo)
-{
-   struct amdgpu_mman_lru *lru = amdgpu_ttm_lru(tbo);
-   struct list_head *res = lru->swap_lru;
-
-   lru->swap_lru = >swap;
-   while ((++lru)->swap_lru == res)
-   lru->swap_lru = >swap;
-
-   return res;
-}
-
 static bool amdgpu_ttm_bo_eviction_valuable(struct ttm_buffer_object *bo,
const struct ttm_place *place)
 {
@@ -1136,14 +1086,12 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
.fault_reserve_notify = _bo_fault_reserve_notify,
.io_mem_reserve = _ttm_io_mem_reserve,
.io_mem_free = _ttm_io_mem_free,
-   .lru_removal = _ttm_lru_removal,
-   .lru_tail = _ttm_lru_tail,
-   .swap_lru_tail = _ttm_swap_lru_tail,
+   .lru_tail = _bo_default_lru_tail,
+   .swap_lru_tail = _bo_default_swap_lru_tail,
 };
 
 int amdgpu_ttm_init(struct amdgpu_device *adev)
 {
-   unsigned i, j;
int r;
 
r = amdgpu_ttm_global_init(adev);
@@ -1161,19 +1109,6 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
return r;
}
-
-   for (i = 0; i < AMDGPU_TTM_LRU_SIZE; ++i) {
-   struct amdgpu_mman_lru *lru = >mman.log2_size[i];
-
-   for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
-   lru->lru[j] = >mman.bdev.man[j].lru[0];
-   lru->swap_lru = >mman.bdev.glob->swap_lru[0];
-   }
-
-   for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
-   adev->mman.guard.lru[j] = NULL;
-   adev->mman.guard.swap_lru = NULL;
-
adev->mman.initialized = true;
r = ttm_bo_init_mm(>mman.bdev, TTM_PL_VRAM,
adev->mc.real_vram_size >> PAGE_SHIFT);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index d1c00c0..0eabbb2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -34,13 +34,6 @@
 #define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
 #define AMDGPU_PL_FLAG_OA  (TTM_PL_FLAG_PRIV << 2)
 
-#define

amdgpu: fix performance drop

2017-01-13 Thread Christian König 
Hi Roger,

as promised the proper fix for the performance drop during command submission.

Please test the attached set of patches with your OpenCL test case.

Regards,
Christian.

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[PATCH 2/6] drm/ttm: add BO priorities for the LRUs

2017-01-13 Thread Christian König 
From: Christian König 

This way the driver can specify a priority for a BO which has the effect that
a BO is only evicted when all other BOs with a lower priority are evicted
first.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c |  4 +-
 drivers/gpu/drm/ttm/ttm_bo.c| 67 ++---
 include/drm/ttm/ttm_bo_api.h|  2 +
 include/drm/ttm/ttm_bo_driver.h |  6 ++-
 4 files changed, 52 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 0717dd1..0a61930 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1166,8 +1166,8 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
struct amdgpu_mman_lru *lru = >mman.log2_size[i];
 
for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
-   lru->lru[j] = >mman.bdev.man[j].lru;
-   lru->swap_lru = >mman.bdev.glob->swap_lru;
+   lru->lru[j] = >mman.bdev.man[j].lru[0];
+   lru->swap_lru = >mman.bdev.glob->swap_lru[0];
}
 
for (j = 0; j < TTM_NUM_MEM_TYPES; ++j)
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 6683399..f078b43 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -242,13 +242,13 @@ EXPORT_SYMBOL(ttm_bo_move_to_lru_tail);
 
 struct list_head *ttm_bo_default_lru_tail(struct ttm_buffer_object *bo)
 {
-   return bo->bdev->man[bo->mem.mem_type].lru.prev;
+   return bo->bdev->man[bo->mem.mem_type].lru[bo->priority].prev;
 }
 EXPORT_SYMBOL(ttm_bo_default_lru_tail);
 
 struct list_head *ttm_bo_default_swap_lru_tail(struct ttm_buffer_object *bo)
 {
-   return bo->glob->swap_lru.prev;
+   return bo->glob->swap_lru[bo->priority].prev;
 }
 EXPORT_SYMBOL(ttm_bo_default_swap_lru_tail);
 
@@ -741,20 +741,27 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
struct ttm_mem_type_manager *man = >man[mem_type];
struct ttm_buffer_object *bo;
int ret = -EBUSY, put_count;
+   unsigned i;
 
spin_lock(>lru_lock);
-   list_for_each_entry(bo, >lru, lru) {
-   ret = __ttm_bo_reserve(bo, false, true, NULL);
-   if (ret)
-   continue;
+   for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
+   list_for_each_entry(bo, >lru[i], lru) {
+   ret = __ttm_bo_reserve(bo, false, true, NULL);
+   if (ret)
+   continue;
 
-   if (place && !bdev->driver->eviction_valuable(bo, place)) {
-   __ttm_bo_unreserve(bo);
-   ret = -EBUSY;
-   continue;
+   if (place && !bdev->driver->eviction_valuable(bo,
+ place)) {
+   __ttm_bo_unreserve(bo);
+   ret = -EBUSY;
+   continue;
+   }
+
+   break;
}
 
-   break;
+   if (!ret)
+   break;
}
 
if (ret) {
@@ -1197,6 +1204,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,
}
atomic_inc(>glob->bo_count);
drm_vma_node_reset(>vma_node);
+   bo->priority = 0;
 
/*
 * For ttm_bo_type_device buffers, allocate
@@ -1297,18 +1305,21 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device 
*bdev,
struct ttm_bo_global *glob = bdev->glob;
struct fence *fence;
int ret;
+   unsigned i;
 
/*
 * Can't use standard list traversal since we're unlocking.
 */
 
spin_lock(>lru_lock);
-   while (!list_empty(>lru)) {
-   spin_unlock(>lru_lock);
-   ret = ttm_mem_evict_first(bdev, mem_type, NULL, false, false);
-   if (ret)
-   return ret;
-   spin_lock(>lru_lock);
+   for (i = 0; i < TTM_MAX_BO_PRIORITY; ++i) {
+   while (!list_empty(>lru[i])) {
+   spin_unlock(>lru_lock);
+   ret = ttm_mem_evict_first(bdev, mem_type, NULL, false, 
false);
+   if (ret)
+   return ret;
+   spin_lock(>lru_lock);
+   }
}
spin_unlock(>lru_lock);
 
@@ -1385,6 +1396,7 @@ int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned 
type,
 {
int ret = -EINVAL;
struct ttm_mem_type_manager *man;
+   unsigned i;
 
BUG_ON(type >= TTM_NUM_MEM_TYPES);
man = >man[type];
@@ -1410,7 +1422,8 @@ int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned 
type,
man->use_type = true;
man->size = p_size;
 
-

[PATCH 6/6] drm/ttm: revert "add optional LRU removal callback v2"

2017-01-13 Thread Christian König 
From: Christian König 

Without the custom LRU management the callback is not used any more.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/ttm/ttm_bo.c| 12 +---
 include/drm/ttm/ttm_bo_driver.h |  6 --
 2 files changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 59fac2f..dfaeac4 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -186,12 +186,8 @@ EXPORT_SYMBOL(ttm_bo_add_to_lru);
 
 int ttm_bo_del_from_lru(struct ttm_buffer_object *bo)
 {
-   struct ttm_bo_device *bdev = bo->bdev;
int put_count = 0;
 
-   if (bdev->driver->lru_removal)
-   bdev->driver->lru_removal(bo);
-
if (!list_empty(>swap)) {
list_del_init(>swap);
++put_count;
@@ -201,6 +197,11 @@ int ttm_bo_del_from_lru(struct ttm_buffer_object *bo)
++put_count;
}
 
+   /*
+* TODO: Add a driver hook to delete from
+* driver-specific LRU's here.
+*/
+
return put_count;
 }
 
@@ -234,9 +235,6 @@ void ttm_bo_move_to_lru_tail(struct ttm_buffer_object *bo)
 
lockdep_assert_held(>resv->lock.base);
 
-   if (bdev->driver->lru_removal)
-   bdev->driver->lru_removal(bo);
-
put_count = ttm_bo_del_from_lru(bo);
ttm_bo_list_ref_sub(bo, put_count, true);
ttm_bo_add_to_lru(bo);
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index a1235fa..4395db1 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -462,12 +462,6 @@ struct ttm_bo_driver {
  struct ttm_mem_reg *mem);
void (*io_mem_free)(struct ttm_bo_device *bdev,
struct ttm_mem_reg *mem);
-
-   /**
-* Optional driver callback for when BO is removed from the LRU.
-* Called with LRU lock held immediately before the removal.
-*/
-   void (*lru_removal)(struct ttm_buffer_object *bo);
 };
 
 /**
-- 
2.7.4

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[PATCH 4/6] drm/amdgpu: double the priority of kernel allocations

2017-01-13 Thread Christian König 
From: Christian König 

Give kernel allocations a higher priority cause it is often
more work to swap them back in.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f399d98..2de1dda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -387,6 +387,8 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
return r;
 
bo->tbo.priority = ilog2(bo->tbo.num_pages);
+   if (kernel)
+   bo->tbo.priority *= 2;
bo->tbo.priority = min(bo->tbo.priority, TTM_MAX_BO_PRIORITY - 1);
 
if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
-- 
2.7.4

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Re: [PATCH libdrm] amdgpu: Provide more specific error message if non-privileged user runs amdgpu_test

2017-01-13 Thread Alex Deucher 
On Fri, Jan 13, 2017 at 4:20 AM, Christian König
 wrote:
> Am 12.01.2017 um 22:14 schrieb Alex Xie:
>>
>> Before this change, the error message is:
>> "WARNING - Suite initialization failed..."
>> People might think this is a driver problem.
>>
>> Tested with non-privileged user. Now the error message is like:
>> ...
>> Error:Permission denied. Hint:Try to run this test program as root.
>> WARNING - Suite initialization failed for 'Basic Tests'.
>> ...
>>
>> Tested as root with no regression.
>>
>> amdgpu_test uses CUnit. CUnit outputs warning message to stdout.
>> To be consistent, this commit outputs error message to stdout.
>>
>> v2: Use strerror instead of %m. %m is a GNU C Library extension.
>> v3: Limit code and commit message within 80 characters per line.
>>  Update commit message.
>>  Remove a space before starting parenthesis in function call.
>>
>> Change-Id: Ib891c40ec812053f49ce5a99909455ac3137e32c
>> Signed-off-by: Alex Xie 
>
>
> Works for me, patch is Reviewed-by: Christian König
> .
>
> IIRC I still don't have commit access to libdrm either, so Michel or Alex
> can anybody push this?

Done.  Thanks!

Alex

>
> Regards,
> Christian.
>
>
>> ---
>>   tests/amdgpu/basic_tests.c | 7 ++-
>>   tests/amdgpu/bo_tests.c| 8 +++-
>>   tests/amdgpu/cs_tests.c| 8 +++-
>>   tests/amdgpu/vce_tests.c   | 8 +++-
>>   4 files changed, 27 insertions(+), 4 deletions(-)
>>
>> diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
>> index 11f6a63..bfda21b 100644
>> --- a/tests/amdgpu/basic_tests.c
>> +++ b/tests/amdgpu/basic_tests.c
>> @@ -206,8 +206,13 @@ int suite_basic_tests_init(void)
>> if (r == 0)
>> return CUE_SUCCESS;
>> -   else
>> +   else {
>> +   if ((r == -EACCES) && (errno == EACCES))
>> +   printf("\n\nError:%s. "
>> +   "Hint:Try to run this test program as
>> root.",
>> +   strerror(errno));
>> return CUE_SINIT_FAILED;
>> +   }
>>   }
>> int suite_basic_tests_clean(void)
>> diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
>> index 993895d..25df767 100644
>> --- a/tests/amdgpu/bo_tests.c
>> +++ b/tests/amdgpu/bo_tests.c
>> @@ -65,8 +65,14 @@ int suite_bo_tests_init(void)
>> r = amdgpu_device_initialize(drm_amdgpu[0], _version,
>>   _version, _handle);
>> -   if (r)
>> +   if (r) {
>> +   if ((r == -EACCES) && (errno == EACCES))
>> +   printf("\n\nError:%s. "
>> +   "Hint:Try to run this test program as
>> root.",
>> +   strerror(errno));
>> +
>> return CUE_SINIT_FAILED;
>> +   }
>> req.alloc_size = BUFFER_SIZE;
>> req.phys_alignment = BUFFER_ALIGN;
>> diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c
>> index a01ee48..82c55aa 100644
>> --- a/tests/amdgpu/cs_tests.c
>> +++ b/tests/amdgpu/cs_tests.c
>> @@ -76,8 +76,14 @@ int suite_cs_tests_init(void)
>> r = amdgpu_device_initialize(drm_amdgpu[0], _version,
>>  _version, _handle);
>> -   if (r)
>> +   if (r) {
>> +   if ((r == -EACCES) && (errno == EACCES))
>> +   printf("\n\nError:%s. "
>> +   "Hint:Try to run this test program as
>> root.",
>> +   strerror(errno));
>> +
>> return CUE_SINIT_FAILED;
>> +   }
>> family_id = device_handle->info.family_id;
>> /* VI asic POLARIS10/11 have specific external_rev_id */
>> diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
>> index 4915170..de63aa1 100644
>> --- a/tests/amdgpu/vce_tests.c
>> +++ b/tests/amdgpu/vce_tests.c
>> @@ -94,8 +94,14 @@ int suite_vce_tests_init(void)
>> r = amdgpu_device_initialize(drm_amdgpu[0], _version,
>>  _version, _handle);
>> -   if (r)
>> +   if (r) {
>> +   if ((r == -EACCES) && (errno == EACCES))
>> +   printf("\n\nError:%s. "
>> +   "Hint:Try to run this test program as
>> root.",
>> +   strerror(errno));
>> +
>> return CUE_SINIT_FAILED;
>> +   }
>> family_id = device_handle->info.family_id;
>> vce_harvest_config = device_handle->info.vce_harvest_config;
>
>
>
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