On Tuesday, June 28, 2016 04:02 PM, Grzegorz Kasprowicz wrote:
For synchronisation over fibre we can use existing White Rabbit core. The card requires only 2 VCXO oscillators and FPGA logic. The WR core consumes 50% of small Spartan 45T. It ensures 1ns timing accuracy.
We probably won't use White Rabbit as-is, but the basic principle will be the same. It can be a good idea to include those VCXOs on boards that may be synchronized over fiber (Kasli/Metlino), though can't we use instead a Si5324 for jitter cleanup and FPGA PLLs for DDMTD?
Sébastien _______________________________________________ ARTIQ mailing list https://ssl.serverraum.org/lists/listinfo/artiq
