Re: [ARTIQ] compiling idle.py fails

[Aaron Vontell via ARTIQ]

Hello Christian,

For ARTIQ to run you need to include a device_db.pyon file which specifies
channel and device configurations for your board. The link below has a
device_db.pyon file for the Pipistrello which you might find useful!

https://github.com/vontell/artiq-control/tree/master/samples

- Aaron Vontell

On Dec 14, 2016 5:00 PM, Christian via ARTIQ
wrote:
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[ARTIQ] Reliable Input Event Handling

[Aaron Vontell]

I have been working on handling input events using ARTIQ, by attempting to 
place a pulse event into the buffer / timeline for execution upon receiving an 
input event. I have been following the examples from the manual here 
, 
but I am wondering if there is a way to do even faster handling for input 
events. In the given examples it is safest to place a delay to ensure that gate 
closing event has occurred, but is there a way to instead let the gate close 
while executing a pulse on another TTL line at the same time?

I am wondering what the best way is to place an event into the timeline as soon 
as possible after detecting an input event. For instance, I would like to run a 
pulse on, say, TTL1 immediately after receiving a single rising edge on PMT0. 
For context, I am trying to complete this method 

 which would run a kernel / place commands into the timeline upon seeing that 
the count of PMT0 is greater that 0. I am not entirely sure on how to implement 
this functionality, as I commonly run into RTIOUnderflow errors.

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Re: [ARTIQ] Pipistrello TTL Output

[Aaron Vontell]

Perfect, those are exactly what I needed to look at. It works now and I can
measure the signal.

Thanks for the help!

- Aaron Vontell

On Mon, Oct 17, 2016 at 12:20 PM, Robert Jördens <r...@m-labs.hk> wrote:

> On Mon, Oct 17, 2016 at 5:39 PM, Aaron Vontell <aaronvont...@gmail.com>
> wrote:
> > I am new to working with FPGAs, so sorry if this is a very simple
> question.
> > I am working with a Pipistrello FPGA board, which is being controlled by
> > ARTIQ. Using ARTIQ, I have configured a device_db.pyon file for TTL
> outputs
> > (following the steps from
> > https://m-labs.hk/artiq/manual-release-2/core_device.html#pipistrello),
> and
> > have written a simple program that will pulse some of the TTL outputs. I
> am
> > attempting to measure the output using an oscilloscope, but I am having
> > trouble with figuring out where the actual output is on the board. After
> > searching online, I have not found any decent documentation regarding
> what
> > the different channels on the board represent, or which ports are used
> for
> > what.
> >
> > Any help with finding a resource that details the outputs of the board,
> or
> > simply a tip on where to look for these TTL pulses on the board would be
> > greatly appreciated!
>
> The mapping is also on the nist-qc1/qcpapilio schematic that you have.
>
> --
> Robert Jördens.
>
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