[PATCH 1/1] arm: add debug_ll support
Today we only use the DBGU port
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/Kconfig |1 +
arch/arm/mach-at91/include/mach/debug_ll.h | 37
2 files changed, 38 insertions(+)
create mode 100644 arch/arm/mach-at91/include/mach/debug_ll.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 245bec8..a7f1bfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -25,6 +25,7 @@ config ARCH_AT91
bool "Atmel AT91"
select GENERIC_GPIO
select CLKDEV_LOOKUP
+ select HAS_DEBUG_LL
config ARCH_EP93XX
bool "Cirrus Logic EP93xx"
diff --git a/arch/arm/mach-at91/include/mach/debug_ll.h
b/arch/arm/mach-at91/include/mach/debug_ll.h
new file mode 100644
index 000..ee824cb
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/debug_ll.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012
+ * Jean-Christophe PLAGNIOL-VILLARD
+ *
+ * Under GPLv2
+ */
+
+#ifndef __MACH_DEBUG_LL_H__
+#define __MACH_DEBUG_LL_H__
+
+#include
+#include
+
+#define UART_BASE (AT91_BASE_SYS + AT91_DBGU)
+
+#define ATMEL_US_CSR 0x0014
+#define ATMEL_US_THR 0x001c
+#define ATMEL_US_TXRDY (1 << 1)
+#define ATMEL_US_TXEMPTY (1 << 9)
+
+/*
+ * The following code assumes the serial port has already been
+ * initialized by the bootloader. If you didn't setup a port in
+ * your bootloader then nothing will appear (which might be desired).
+ *
+ * This does not append a newline
+ */
+static void putc(int c)
+{
+ while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXRDY))
+ barrier();
+ __raw_writel(c, UART_BASE + ATMEL_US_THR);
+
+ while (!(__raw_readl(UART_BASE + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
+ barrier();
+}
+#endif
--
1.7.10.4
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[PATCH 2/2] panda: add pbl support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- Hi, patch just compiled not test on the platfrom if someone can test it apply over the pbl patch serie Best Regards, J. arch/arm/boards/panda/Makefile |2 ++ arch/arm/mach-omap/Makefile|2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/boards/panda/Makefile b/arch/arm/boards/panda/Makefile index c55e26e..12b4d69 100644 --- a/arch/arm/boards/panda/Makefile +++ b/arch/arm/boards/panda/Makefile @@ -1 +1,3 @@ obj-y += board.o lowlevel.o mux.o + +pbl-y += lowlevel.o mux.o diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index dd9dd5e..e892c1c 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -30,3 +30,5 @@ obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o obj-y += gpio.o pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o +pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o +pbl-$(CONFIG_ARCH_OMAP4) += syslib.o -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[RFC PATCH 1/2] omap3: add pbl support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- Hi, patch just compiled not test on the platfrom if someone can test it apply over the pbl patch serie Best Regards, J. arch/arm/mach-omap/Makefile |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index 87078ae..dd9dd5e 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -28,3 +28,5 @@ obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o obj-$(CONFIG_SHELL_NONE) += xload.o obj-$(CONFIG_I2C_TWL6030) += omap4_twl6030_mmc.o obj-y += gpio.o + +pbl-$(CONFIG_ARCH_OMAP3) += omap3_core.o -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 07/12] ARM: Separate assembler functions into their own section
From: Sascha Hauer To let the linker remove unused functions. Signed-off-by: Sascha Hauer --- arch/arm/lib/findbit.S |9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/lib/findbit.S b/arch/arm/lib/findbit.S index ef4caff..422455d 100644 --- a/arch/arm/lib/findbit.S +++ b/arch/arm/lib/findbit.S @@ -22,6 +22,7 @@ * Purpose : Find a 'zero' bit * Prototype: int find_first_zero_bit(void *addr, unsigned int maxbit); */ +.section .text._find_first_zero_bit_le ENTRY(_find_first_zero_bit_le) teq r1, #0 beq 3f @@ -43,6 +44,7 @@ ENDPROC(_find_first_zero_bit_le) * Purpose : Find next 'zero' bit * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset) */ +.section .text._find_next_zero_bit_le ENTRY(_find_next_zero_bit_le) teq r1, #0 beq 3b @@ -63,6 +65,7 @@ ENDPROC(_find_next_zero_bit_le) * Purpose : Find a 'one' bit * Prototype: int find_first_bit(const unsigned long *addr, unsigned int maxbit); */ +.section .text._find_first_bit_le ENTRY(_find_first_bit_le) teq r1, #0 beq 3f @@ -84,6 +87,7 @@ ENDPROC(_find_first_bit_le) * Purpose : Find next 'one' bit * Prototype: int find_next_zero_bit(void *addr, unsigned int maxbit, int offset) */ +.section .text._find_next_bit_le ENTRY(_find_next_bit_le) teq r1, #0 beq 3b @@ -101,6 +105,7 @@ ENDPROC(_find_next_bit_le) #ifdef __ARMEB__ +.section .text._find_first_zero_bit_be ENTRY(_find_first_zero_bit_be) teq r1, #0 beq 3f @@ -118,6 +123,7 @@ ENTRY(_find_first_zero_bit_be) mov pc, lr ENDPROC(_find_first_zero_bit_be) +.section .text._find_next_zero_bit_be ENTRY(_find_next_zero_bit_be) teq r1, #0 beq 3b @@ -135,6 +141,7 @@ ENTRY(_find_next_zero_bit_be) b 2b @ loop for next bit ENDPROC(_find_next_zero_bit_be) +.section .text._find_first_bit_be ENTRY(_find_first_bit_be) teq r1, #0 beq 3f @@ -152,6 +159,7 @@ ENTRY(_find_first_bit_be) mov pc, lr ENDPROC(_find_first_bit_be) +.section .text._find_next_bit_be ENTRY(_find_next_bit_be) teq r1, #0 beq 3b @@ -173,6 +181,7 @@ ENDPROC(_find_next_bit_be) /* * One or more bits in the LSB of r3 are assumed to be set. */ +.section .text.L_found .L_found: #if __LINUX_ARM_ARCH__ >= 5 rsb r0, r3, #0 -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 12/12] at91: add lowlevel init to the pbl
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- arch/arm/mach-at91/Makefile |2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 491c454..3ade725 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -4,6 +4,8 @@ lowlevel_init-y = at91sam926x_lowlevel_init.o lowlevel_init-$(CONFIG_ARCH_AT91RM9200) = at91rm9200_lowlevel_init.o obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y) +pbl-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += $(lowlevel_init-y) + obj-$(CONFIG_AT91SAM9_RESET) += at91sam9_reset.o obj-$(CONFIG_AT91SAM9G45_RESET) += at91sam9g45_reset.o -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 11/12] compressed image: add gzip support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/cpu/start.c |4
arch/arm/pbl/Makefile |1 +
arch/arm/pbl/piggy.gzip.S |6 ++
common/Kconfig|3 +++
lib/decompress_inflate.c |1 +
5 files changed, 15 insertions(+)
create mode 100644 arch/arm/pbl/piggy.gzip.S
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index f500ca8..59b33d0 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -110,6 +110,10 @@ extern void *input_data_end;
#include "../../../lib/decompress_unlzo.c"
#endif
+#ifdef CONFIG_IMAGE_COMPRESSION_GZIP
+#include "../../../../lib/decompress_inflate.c"
+#endif
+
void barebox_uncompress(void *compressed_start, unsigned int len)
{
void (*barebox)(void);
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 4135911..04fdffb 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,4 +1,5 @@
+suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip
suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo
OBJCOPYFLAGS_zbarebox.bin = -O binary
diff --git a/arch/arm/pbl/piggy.gzip.S b/arch/arm/pbl/piggy.gzip.S
new file mode 100644
index 000..ef3dd77
--- /dev/null
+++ b/arch/arm/pbl/piggy.gzip.S
@@ -0,0 +1,6 @@
+ .section .piggydata,#alloc
+ .globl input_data
+input_data:
+ .incbin "arch/arm/compressed/piggy.gzip"
+ .globl input_data_end
+input_data_end:
diff --git a/common/Kconfig b/common/Kconfig
index 40f0c71..6fee9ae 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -125,6 +125,9 @@ choice
config IMAGE_COMPRESSION_LZO
bool "lzo"
+config IMAGE_COMPRESSION_GZIP
+ bool "gzip"
+
endchoice
endif
diff --git a/lib/decompress_inflate.c b/lib/decompress_inflate.c
index 526d6a1..5c1ebb6 100644
--- a/lib/decompress_inflate.c
+++ b/lib/decompress_inflate.c
@@ -4,6 +4,7 @@
/* prevent inclusion of _LINUX_KERNEL_H in pre-boot environment: lots
* errors about console_printk etc... on ARM */
#define _LINUX_KERNEL_H
+#include
#include "zlib_inflate/inftrees.c"
#include "zlib_inflate/inffast.c"
--
1.7.10.4
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[PATCH 06/12] only compress default env in uncompressed images
From: Sascha Hauer Signed-off-by: Sascha Hauer --- common/Kconfig |1 + 1 file changed, 1 insertion(+) diff --git a/common/Kconfig b/common/Kconfig index 7b5a307..40f0c71 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -511,6 +511,7 @@ config DEFAULT_ENVIRONMENT config DEFAULT_ENVIRONMENT_COMPRESSED bool depends on DEFAULT_ENVIRONMENT + depends on !IMAGE_COMPRESSION_LZO default y if ZLIB default y if BZLIB default y if LZO_DECOMPRESS -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 09/12] decompressor: import malloc/free implementation for linux 3.4
This is need for gunzip support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
include/linux/decompress/mm.h | 68 +
1 file changed, 68 insertions(+)
create mode 100644 include/linux/decompress/mm.h
diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h
new file mode 100644
index 000..0c35411
--- /dev/null
+++ b/include/linux/decompress/mm.h
@@ -0,0 +1,68 @@
+/*
+ * linux/compr_mm.h
+ *
+ * Memory management for pre-boot and ramdisk uncompressors
+ *
+ * Authors: Alain Knaff
+ *
+ */
+
+#ifndef DECOMPR_MM_H
+#define DECOMPR_MM_H
+
+#ifdef STATIC
+
+/* Code active when included from pre-boot environment: */
+
+/*
+ * Some architectures want to ensure there is no local data in their
+ * pre-boot environment, so that data can arbitrarily relocated (via
+ * GOT references). This is achieved by defining STATIC_RW_DATA to
+ * be null.
+ */
+#ifndef STATIC_RW_DATA
+#define STATIC_RW_DATA static
+#endif
+
+/* A trivial malloc implementation, adapted from
+ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
+ */
+STATIC_RW_DATA unsigned long malloc_ptr;
+STATIC_RW_DATA int malloc_count;
+
+static void *malloc(int size)
+{
+ void *p;
+
+ if (size < 0)
+ return NULL;
+ if (!malloc_ptr)
+ malloc_ptr = free_mem_ptr;
+
+ malloc_ptr = (malloc_ptr + 3) & ~3; /* Align */
+
+ p = (void *)malloc_ptr;
+ malloc_ptr += size;
+
+ if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr)
+ return NULL;
+
+ malloc_count++;
+ return p;
+}
+
+static void free(void *where)
+{
+ malloc_count--;
+ if (!malloc_count)
+ malloc_ptr = free_mem_ptr;
+}
+
+#define large_malloc(a) malloc(a)
+#define large_free(a) free(a)
+
+#define INIT
+
+#endif /* STATIC */
+
+#endif /* DECOMPR_MM_H */
--
1.7.10.4
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[PATCH 05/12] Add compressed image support
From: Sascha Hauer
This allows for creating a lzo compressed binary unsing the pbl.
Signed-off-by: Sascha Hauer
[From: Jean-Christophe PLAGNIOL-VILLARD ]
re-integrate it in the new pbl target.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/Kconfig |1 +
arch/arm/Makefile|4
arch/arm/cpu/start.c | 59 ++
arch/arm/pbl/Makefile| 16 +++--
arch/arm/pbl/piggy.lzo.S |6 +
5 files changed, 84 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/pbl/piggy.lzo.S
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3d11497..245bec8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -5,6 +5,7 @@ config ARM
select HAVE_CONFIGURABLE_MEMORY_LAYOUT
select HAVE_CONFIGURABLE_TEXT_BASE
select HAVE_PBL_IMAGE
+ select HAVE_IMAGE_COMPRESSION
default y
config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 80ef986..8e4bb48 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
KBUILD_IMAGE := barebox.ubl
endif
+ifdef CONFIG_IMAGE_COMPRESSION
+KBUILD_IMAGE := zbarebox.bin
+endif
+
pbl := arch/arm/pbl
zbarebox.S zbarebox.bin zbarebox: barebox.bin
$(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 49b1d5b..a54f5fd 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -98,8 +98,67 @@ void __naked __bare_init reset(void)
}
#ifdef __PBL__
+extern void *input_data;
+extern void *input_data_end;
+
+#define STATIC static
+
+#ifdef CONFIG_IMAGE_COMPRESSION_LZO
+#include "../../../lib/decompress_unlzo.c"
+#endif
+
+void barebox_uncompress(void *compressed_start, unsigned int len)
+{
+ void (*barebox)(void);
+
+ if (IS_ENABLED(CONFIG_THUMB2_BAREBOX))
+ barebox = (void *)(TEXT_BASE + 1);
+ else
+ barebox = (void *)TEXT_BASE;
+
+ decompress((void *)compressed_start,
+ len,
+ NULL, NULL,
+ (void *)TEXT_BASE, NULL, NULL);
+
+ /* flush I-cache before jumping to the uncompressed binary */
+ __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
+
+ barebox();
+}
+
void barebox_pbl(uint32_t offset)
{
+ uint32_t compressed_start, compressed_end, len;
+ void (*uncompress)(void *compressed_start, unsigned int len);
+
+ compressed_start = (uint32_t)&input_data - offset;
+ compressed_end = (uint32_t)&input_data_end - offset;
+ len = compressed_end - compressed_start;
+
+ /*
+* Check if the compressed binary will be overwritten
+* by the uncompressed binary
+*/
+ if (compressed_start >= TEXT_BASE &&
+ compressed_start < TEXT_BASE + len * 4 ) {
+ /*
+* copy compressed binary to its link address
+*/
+ memcpy(&input_data, (void *)compressed_start, len);
+ compressed_start = (uint32_t)&input_data;
+ }
+
+ uncompress = barebox_uncompress;
+
+ /* call barebox_uncompress with its absolute address */
+ __asm__ __volatile__(
+ "mov r0, %1\n"
+ "mov r1, %2\n"
+ "mov pc, %0\n"
+ :
+ : "r"(uncompress), "r"(compressed_start), "r"(len)
+ : "r0", "r1");
}
#else
void barebox_pbl(uint32_t offset) {}
diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile
index 9b364bb..4135911 100644
--- a/arch/arm/pbl/Makefile
+++ b/arch/arm/pbl/Makefile
@@ -1,7 +1,14 @@
+suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo
+
OBJCOPYFLAGS_zbarebox.bin = -O binary
+piggy_o := piggy.$(suffix_y).o
+
+targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S \
+ $(piggy_o) piggy.$(suffix_y)
-targets := zbarebox.lds zbarebox zbarebox.bin zbarebox.S
+# Make sure files are removed during clean
+extra-y += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern
$(obj)/zbarebox.bin: $(obj)/zbarebox FORCE
$(call if_changed,objcopy)
@@ -12,7 +19,7 @@ $(obj)/zbarebox.S: $(obj)/zbarebox FORCE
$(call if_changed,disasm)
LDFLAGS_zbarebox := -Map zbarebox.map
-zbarebox-common := $(barebox-pbl-common)
+zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o)
zbarebox-lds := $(obj)/zbarebox.lds
quiet_cmd_zbarebox__ ?= LD $@
@@ -23,3 +30,8 @@ quiet_cmd_zbarebox__ ?= LD $@
$(obj)/zbarebox: $(zbarebox-lds) $(zbarebox-common) FORCE
$(call if_changed,zbarebox__)
+
+$(obj)/piggy.$(suffix_y): $(obj)/../../../barebox.bin FORCE
+ $(call if_changed,$(suffix_y))
+
+$(obj)/$(piggy_o): $(obj)/piggy.$(suffix_y) FORCE
diff --git a/arch/arm/pbl/piggy.lzo.S b/arch/arm/pbl/piggy.lzo.S
new file mode 100644
index 000..0c0d216
--- /dev/null
+++ b/arch/arm/pbl/piggy.lzo.S
@@ -0,0 +1,6 @@
+ .section .piggydata,#alloc
+
[PATCH 04/12] pbl: discard unwind symbol if enable in barebox
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/pbl/zbarebox.lds.S |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/pbl/zbarebox.lds.S b/arch/arm/pbl/zbarebox.lds.S
index 1cbcef4..0902067 100644
--- a/arch/arm/pbl/zbarebox.lds.S
+++ b/arch/arm/pbl/zbarebox.lds.S
@@ -46,6 +46,10 @@ SECTIONS
__bare_init_end = .;
*(.text*)
}
+
+ /* Discard unwind if enable in barebox */
+ /DISCARD/ : { *(.ARM.ex*) }
+
BAREBOX_BARE_INIT_SIZE
. = ALIGN(4);
--
1.7.10.4
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[PATCH 08/12] decompress_unlzo: define decompress_unlzo as decompress
so we can use decompress in the decompressor this will simplify multi decompress support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- lib/decompress_unlzo.c |1 + 1 file changed, 1 insertion(+) diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c index 0e6a7ad..56abfc6 100644 --- a/lib/decompress_unlzo.c +++ b/lib/decompress_unlzo.c @@ -289,3 +289,4 @@ exit_1: exit: return ret; } +#define decompress decompress_unlzo -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 03/12] Add pre-bootloader (pbl) image support
This allows for creating a pre-bootloader binary for
- nand boot
- mmc boot
- compressed image
The pbl will be incharge of the lowlevel init if needed.
The barebox will skip it.
Import string functions from linux 3.4 (arch/arm/boot/compressed/string.c) and
implement a dummy panic.
For now on introduce dummy zbarebox* targets and c code that will contain later
the decompressor. This only implemeted on ARM.
This patch is based on Sascha Hauer
Add compressed image support patch
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
Makefile |6 +-
arch/arm/Kconfig |1 +
arch/arm/Makefile |4 +
arch/arm/cpu/Makefile |1 +
arch/arm/cpu/start.c | 43 ++-
arch/arm/lib/Makefile |4 +
arch/arm/lib/barebox.lds.S |3 +-
arch/arm/pbl/Makefile | 25
arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} | 53 ++--
common/Kconfig | 30 +
include/asm-generic/memory_layout.h|1 +
pbl/Makefile |5 +
pbl/misc.c | 14 +++
pbl/string.c | 127
14 files changed, 269 insertions(+), 48 deletions(-)
create mode 100644 arch/arm/pbl/Makefile
copy arch/arm/{lib/barebox.lds.S => pbl/zbarebox.lds.S} (60%)
create mode 100644 pbl/Makefile
create mode 100644 pbl/misc.c
create mode 100644 pbl/string.c
diff --git a/Makefile b/Makefile
index 168381d..a102015 100644
--- a/Makefile
+++ b/Makefile
@@ -474,6 +474,8 @@ CFLAGS += $(call cc-option,-Wno-pointer-sign,)
# this default value
export KBUILD_IMAGE ?= barebox
+common-$(CONFIG_PBL_IMAGE) += pbl/
+
barebox-dirs := $(patsubst %/,%,$(filter %/, $(common-y)))
barebox-alldirs:= $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \
@@ -520,7 +522,7 @@ barebox-lds:= $(lds-y)
# May be overridden by arch/$(ARCH)/Makefile
quiet_cmd_barebox__ ?= LD $@
cmd_barebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_barebox) -o $@ \
- -T $(barebox-lds) $(barebox-head) \
+ -T $(barebox-lds) \
--start-group $(barebox-common) --end-group \
$(filter-out $(barebox-lds) $(barebox-common) FORCE ,$^)
@@ -674,7 +676,9 @@ OBJCOPYFLAGS_barebox.bin = -O binary
barebox.bin: barebox FORCE
$(call if_changed,objcopy)
+ifndef CONFIG_PBL_IMAGE
$(call cmd,check_file_size,$(CONFIG_BAREBOX_MAX_IMAGE_SIZE))
+endif
ifdef CONFIG_X86
barebox.S: barebox
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5acc36f..3d11497 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -4,6 +4,7 @@ config ARM
select HAS_MODULES
select HAVE_CONFIGURABLE_MEMORY_LAYOUT
select HAVE_CONFIGURABLE_TEXT_BASE
+ select HAVE_PBL_IMAGE
default y
config ARM_AMBA
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index bf17203..80ef986 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,10 @@ ifeq ($(CONFIG_ARCH_DAVINCI),y)
KBUILD_IMAGE := barebox.ubl
endif
+pbl := arch/arm/pbl
+zbarebox.S zbarebox.bin zbarebox: barebox.bin
+ $(Q)$(MAKE) $(build)=$(pbl) $(pbl)/$@
+
all: $(KBUILD_IMAGE)
archprepare: maketools
diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile
index 93a34a9..939e6a7 100644
--- a/arch/arm/cpu/Makefile
+++ b/arch/arm/cpu/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_CPU_32v6) += cache-armv6.o
obj-$(CONFIG_CPU_32v7) += cache-armv7.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
+pbl-y += start.o
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index 112403e..49b1d5b 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,10 +28,34 @@
#include
#include
+#ifdef CONFIG_PBL_IMAGE
+void __naked __section(.text_head_entry) pbl_start(void)
+{
+ barebox_arm_head();
+}
+
+/*
+ * First function in the pbl image. We get here from
+ * the decompressor
+ */
+void __naked __section(.text_entry) start(void)
+{
+ u32 r;
+
+ /* Setup the stack */
+ r = STACK_BASE + STACK_SIZE - 16;
+ __asm__ __volatile__("mov sp, %0" : : "r"(r));
+ /* clear bss */
+ memset(__bss_start, 0, __bss_stop - __bss_start);
+
+ start_barebox();
+}
+#else
void __naked __section(.text_entry) start(void)
{
barebox_arm_head();
}
+#endif
/*
* The actual reset vector. This code is position independent and usually
@@ -73,6 +97,14 @@ void __naked __bare_init reset(void)
board_init_lowlevel_return();
}
+#ifdef __PBL__
+void barebox_pbl(uint32_t offset)
+{
+}
+#else
+void barebox_pbl(uint32_t offset) {}
+#endif
+
/*
* Board code can jump here by either returning from board_init_lowlev
[PATCH 02/12] kbuild: add pre-bootloader (pbl) target
This will allow to link compiled object to the built-in-pbl.o across the source tree that will be finally link to the pbl. Now we compile the source %.c in pbl-%.o and provide -D__PBL__ so we can known in the source when it's compile for barebox or the pbl. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- Makefile |5 - scripts/Makefile.build | 48 +--- scripts/Makefile.lib | 14 ++ 3 files changed, 63 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index ac5eaaf..168381d 100644 --- a/Makefile +++ b/Makefile @@ -481,6 +481,7 @@ barebox-alldirs := $(sort $(barebox-dirs) $(patsubst %/,%,$(filter %/, \ $(core-n) $(core-) $(drivers-n) $(drivers-) \ $(net-n) $(net-) $(libs-n)$(libs- +pbl-common-y := $(patsubst %/, %/built-in-pbl.o, $(common-y)) common-y := $(patsubst %/, %/built-in.o, $(common-y)) # Build barebox @@ -510,6 +511,8 @@ common-y:= $(patsubst %/, %/built-in.o, $(common-y)) # System.map is generated to document addresses of all kernel symbols barebox-common := $(common-y) +barebox-pbl-common := $(pbl-common-y) +export barebox-pbl-common barebox-all:= $(barebox-common) barebox-lds:= $(lds-y) @@ -714,7 +717,7 @@ barebox.srec: barebox # The actual objects are generated when descending, # make sure no implicit rule kicks in -$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds): $(barebox-dirs) ; +$(sort $(barebox-head) $(barebox-common) ) $(barebox-lds) $(barebox-pbl-common): $(barebox-dirs) ; # Handle descending into subdirectories listed in $(barebox-dirs) # Preset locale variables to speed up the build process. Limit locale diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 1a82c44..e5b7779 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -14,6 +14,7 @@ obj-y := obj-m := lib-y := lib-m := +pbl-y := always := targets := subdir-y := @@ -97,13 +98,19 @@ ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) lib-target := $(obj)/lib.a endif -ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),) +ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target) $(pbl-y)),) builtin-target := $(obj)/built-in.o endif +ifeq ($(CONFIG_PBL_IMAGE), y) +ifneq ($(strip $(pbl-y) $(builtin-target)),) +pbl-target := $(obj)/built-in-pbl.o +endif +endif + # We keep a list of all modules in $(MODVERDIR) -__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ +__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(pbl-target) $(extra-y)) \ $(if $(KBUILD_MODULES),$(obj-m)) \ $(subdir-ym) $(always) @: @@ -177,9 +184,11 @@ cmd_cc_symtypes_c = \ # (See cmd_cc_o_c + relevant part of rule_cc_o_c) quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ +quiet_cmd_pbl_cc_o_c = PBLCC $@ ifndef CONFIG_MODVERSIONS cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< +cmd_pbl_cc_o_c = $(CC) -D__PBL__ $(c_flags) -c -o $@ $< else # When module versioning is enabled the following steps are executed: @@ -220,8 +229,22 @@ define rule_cc_o_c mv -f $(dot-target).tmp $(dot-target).cmd endef +define rule_pbl_cc_o_c + $(call echo-cmd,checksrc) $(cmd_checksrc) \ + $(call echo-cmd,pbl_cc_o_c) $(cmd_pbl_cc_o_c);\ + $(cmd_modversions)\ + scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,pbl_cc__o_c)' >\ + $(dot-target).tmp; \ + rm -f $(depfile); \ + mv -f $(dot-target).tmp $(dot-target).cmd +endef + # Built-in and composite module parts +pbl-%.o: %.c + $(call cmd,force_checksrc) + $(call if_changed_rule,pbl_cc_o_c) + %.o: %.c FORCE $(call cmd,force_checksrc) $(call if_changed_rule,cc_o_c) @@ -258,10 +281,16 @@ cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< quiet_cmd_as_o_S = AS $(quiet_modtag) $@ cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< +quiet_cmd_pbl_as_o_S = PBLAS $@ +cmd_pbl_as_o_S = $(CC) -D__PBL__ $(a_flags) -c -o $@ $< + +pbl-%.o: %.S + $(call if_changed_dep,pbl_as_o_S) + %.o: %.S FORCE $(call if_changed_dep,as_o_S) -targets += $(real-objs-y) $(real-objs-m) $(lib-y) +targets += $(real-objs-y) $(real-objs-m) $(lib-y) $(pbl-y) targets += $(extra-y) $(MAKECMDGOALS) $(always) # Linker scripts preprocessor (.lds.S -> .lds) @@ -294,6 +323,19 @@ $(builtin-target): $(obj-y) FORCE targets += $(builtin-target) endif # builtin-target +ifdef pbl-target +quiet_cmd_pbl_link_o_target = PBLLD $@ +# If the list of objects to link is empty, just create an empty built-in-pbl.o +cmd_pbl_link_o_target = $(if $(strip $(pbl-y)),\ + $(LD) $(ld_flags) -r -o $@ $(filter $(pbl-y), $^),\ +
[PATCH 01/12] kbuild: Init all relevant variables used in kbuild files so
import from linux 3.5-rc5 Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- scripts/Makefile.build | 25 - 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/scripts/Makefile.build b/scripts/Makefile.build index f70e2b9..1a82c44 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -7,7 +7,30 @@ src := $(obj) PHONY := __build __build: -# Read .config if it exist, otherwise ignore +# Init all relevant variables used in kbuild files so +# 1) they have correct type +# 2) they do not inherit any value from the environment +obj-y := +obj-m := +lib-y := +lib-m := +always := +targets := +subdir-y := +subdir-m := +EXTRA_AFLAGS := +EXTRA_CFLAGS := +EXTRA_CPPFLAGS := +EXTRA_LDFLAGS := +asflags-y := +ccflags-y := +cppflags-y := +ldflags-y := + +subdir-asflags-y := +subdir-ccflags-y := + +# Read auto.conf if it exists, otherwise ignore -include include/config/auto.conf include scripts/Kbuild.include -- 1.7.10.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 10/12] ARM: add early malloc support needed by the decompressor
This is not needed by lzo but by gunzip, xz and others.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
---
arch/arm/cpu/start.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c
index a54f5fd..f500ca8 100644
--- a/arch/arm/cpu/start.c
+++ b/arch/arm/cpu/start.c
@@ -28,6 +28,9 @@
#include
#include
+unsigned long free_mem_ptr;
+unsigned long free_mem_end_ptr;
+
#ifdef CONFIG_PBL_IMAGE
void __naked __section(.text_head_entry) pbl_start(void)
{
@@ -193,6 +196,10 @@ void __naked __section(.text_ll_return)
board_init_lowlevel_return(void)
/* clear bss */
memset(__bss_start, 0, __bss_stop - __bss_start);
+ /* set 128 KiB before the STACK_BASE - 16 address for early malloc */
+ free_mem_ptr = STACK_BASE - 0x2 - 16;
+ free_mem_end_ptr = STACK_BASE - 16;
+
/* flush I-cache before jumping to the copied binary */
__asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0));
--
1.7.10.4
___
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barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 00/12] Add Pre-Bootloader support
Hi, please pull The following changes since commit 9ab50e0b9cb6400a4442acd36c3d4b315685fa6a: Merge branch 'for-next/tqma53' into next (2012-07-27 10:05:03 +0200) are available in the git repository at: git://git.jcrosoft.org/barebox.git tags/pbl for you to fetch changes up to e373b3c53902c1d6da4289db9467ad50e209d0c7: at91: add lowlevel init to the pbl (2012-07-28 02:19:09 +0800) Add pre-bootloader (pbl) image support This allows for creating a pre-bootloader binary for - nand boot - mmc boot - compressed image Currently on the compressed image is implemented the boot really on current lowlevel init support. In a second step this could be move to the pbl c code with generic framework. The pbl will be incharge of the lowlevel init if needed. The barebox will skip it. The decompressor support lzo and gzip and allow to add easly more. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Jean-Christophe PLAGNIOL-VILLARD (9): kbuild: Init all relevant variables used in kbuild files so kbuild: add pre-bootloader (pbl) target Add pre-bootloader (pbl) image support pbl: discard unwind symbol if enable in barebox decompress_unlzo: define decompress_unlzo as decompress decompressor: import malloc/free implementation for linux 3.4 ARM: add early malloc support needed by the decompressor compressed image: add gzip support at91: add lowlevel init to the pbl Sascha Hauer (3): Add compressed image support only compress default env in uncompressed images ARM: Separate assembler functions into their own section Makefile| 11 -- arch/arm/Kconfig|2 ++ arch/arm/Makefile |8 + arch/arm/cpu/Makefile |1 + arch/arm/cpu/start.c| 113 ++--- arch/arm/lib/Makefile |4 +++ arch/arm/lib/barebox.lds.S |3 +- arch/arm/lib/findbit.S |9 + arch/arm/mach-at91/Makefile |2 ++ arch/arm/pbl/Makefile | 38 + arch/arm/pbl/piggy.gzip.S |6 arch/arm/pbl/piggy.lzo.S|6 arch/arm/pbl/zbarebox.lds.S | 74 common/Kconfig | 34 +++ include/asm-generic/memory_layout.h |1 + include/linux/decompress/mm.h | 68 + lib/decompress_inflate.c|1 + lib/decompress_unlzo.c |1 + pbl/Makefile|5 +++ pbl/misc.c | 14 pbl/string.c| 127 + scripts/Makefile.build | 73 +--- scripts/Makefile.lib| 14 23 files changed, 604 insertions(+), 11 deletions(-) create mode 100644 arch/arm/pbl/Makefile create mode 100644 arch/arm/pbl/piggy.gzip.S create mode 100644 arch/arm/pbl/piggy.lzo.S create mode 100644 arch/arm/pbl/zbarebox.lds.S create mode 100644 include/linux/decompress/mm.h create mode 100644 pbl/Makefile create mode 100644 pbl/misc.c create mode 100644 pbl/string.c Best Regards, J. ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] omap: use 512k barebox partition
Hi Sascha, Sascha Hauer wrote: > On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote: > > Use 512k NAND Partion for barebox. Problem is we don't know the size of > > the barebox inside xload. Set it also to 512k > > Fix enviroment for boards with size in config > > The barebox binary has the size encoded into it at offset 0x2c. We could > use this to transfer the correct size. Will this be a reliable "API" to the outerworld? Also in future versions of Barebox? I would need this information in my S3C6410 implementation (for NAND and SD cards to boot from) so it would be a really helpful feature. But only if it is still present in future versions. jbe -- Pengutronix e.K. | Juergen Beisert | Linux Solutions for Science and Industry | http://www.pengutronix.de/ | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] omap: use 512k barebox partition
On Fri, Jul 27, 2012 at 01:09:07PM +0200, Jan Weitzel wrote:
> Use 512k NAND Partion for barebox. Problem is we don't know the size of the
> barebox inside xload. Set it also to 512k
> Fix enviroment for boards with size in config
The barebox binary has the size encoded into it at offset 0x2c. We could
use this to transfer the correct size.
Sascha
>
> Signed-off-by: Jan Weitzel
> ---
> arch/arm/boards/pcm049/board.c|7 +--
> arch/arm/boards/pcm049/env/config |2 +-
> arch/arm/boards/phycard-a-l1/env/config |2 +-
> arch/arm/boards/phycard-a-l1/pca-a-l1.c |9 ++---
> arch/arm/boards/phycard-a-xl2/env/config |2 +-
> arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |4 ++--
> arch/arm/mach-omap/xload.c|2 +-
> 7 files changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
> index 5b7854a..d7b79c1 100644
> --- a/arch/arm/boards/pcm049/board.c
> +++ b/arch/arm/boards/pcm049/board.c
> @@ -113,9 +113,12 @@ static int pcm049_devices_init(void)
> #ifdef CONFIG_PARTITION
> devfs_add_partition("nand0", 0x0, SZ_128K, DEVFS_PARTITION_FIXED,
> "xload_raw");
> dev_add_bb_dev("xload_raw", "xload");
> - devfs_add_partition("nand0", SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED,
> "self_raw");
> + devfs_add_partition("nand0", SZ_128K, SZ_512K,
> + DEVFS_PARTITION_FIXED, "self_raw");
> dev_add_bb_dev("self_raw", "self0");
> - devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K,
> DEVFS_PARTITION_FIXED, "env_raw");
> + devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
> + DEVFS_PARTITION_FIXED, "env_raw");
> +
> dev_add_bb_dev("env_raw", "env0");
> #endif
>
> diff --git a/arch/arm/boards/pcm049/env/config
> b/arch/arm/boards/pcm049/env/config
> index efbe9ea..70e374f 100644
> --- a/arch/arm/boards/pcm049/env/config
> +++ b/arch/arm/boards/pcm049/env/config
> @@ -40,7 +40,7 @@ autoboot_timeout=3
>
> bootargs="console=ttyO2,115200"
>
> -nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)"
> +nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> rootfs_mtdblock_nand=4
>
> # set a fancy prompt (if support is compiled in)
> diff --git a/arch/arm/boards/phycard-a-l1/env/config
> b/arch/arm/boards/phycard-a-l1/env/config
> index e0f4dcc..5bc48d7 100644
> --- a/arch/arm/boards/phycard-a-l1/env/config
> +++ b/arch/arm/boards/phycard-a-l1/env/config
> @@ -70,7 +70,7 @@ bootargs="$bootargs omapdss.def_disp=pd050vl1"
> #bootargs="$bootargs omapdss.def_disp=pd104slf"
> #bootargs="$bootargs omapdss.def_disp=pm070wl4"
>
> -nand_parts="512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> +nand_parts="128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> nand_device=omap2-nand.0
> rootfs_mtdblock_nand=4
>
> diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> index 1cc2815..3d3596a 100644
> --- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> +++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
> @@ -336,13 +336,16 @@ static int pcaal1_late_init(void)
>
> nand = get_device_by_name("nand0");
>
> - devfs_add_partition("nand0", 0x0, 0x8, DEVFS_PARTITION_FIXED,
> "x-loader");
> + devfs_add_partition("nand0", 0x0, SZ_128K,
> + DEVFS_PARTITION_FIXED, "x-loader");
> dev_add_bb_dev("self_raw", "x_loader0");
>
> - devfs_add_partition("nand0", 0x8, 0x1e, DEVFS_PARTITION_FIXED,
> "self_raw");
> + devfs_add_partition("nand0", SZ_128K, SZ_512K,
> + DEVFS_PARTITION_FIXED, "self_raw");
> dev_add_bb_dev("self_raw", "self0");
>
> - devfs_add_partition("nand0", 0x26, 0x2, DEVFS_PARTITION_FIXED,
> "env_raw");
> + devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
> + DEVFS_PARTITION_FIXED, "env_raw");
> dev_add_bb_dev("env_raw", "env0");
>
> return 0;
> diff --git a/arch/arm/boards/phycard-a-xl2/env/config
> b/arch/arm/boards/phycard-a-xl2/env/config
> index 59e8eb3..44a4181 100644
> --- a/arch/arm/boards/phycard-a-xl2/env/config
> +++ b/arch/arm/boards/phycard-a-xl2/env/config
> @@ -39,7 +39,7 @@ autoboot_timeout=3
>
> bootargs="console=ttyO2,115200"
>
> -nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> +nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
> rootfs_mtdblock_nand=4
>
> # set a fancy prompt (if support is compiled in)
> diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> index 128cb8f..54b4ada 100644
> --- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> +++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
> @@ -131,10 +131,10 @@ static int pcaaxl2_devices_init(void)
> devfs_add_partition("nand0", 0x000
Re: [PATCH 2/3] OMAP4460: ram init changes
On Fri, Jul 27, 2012 at 04:13:46PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
> On 15:40 Fri 27 Jul , Jan Weitzel wrote:
> > configure Memory Adapter for 4460
> >
> > Signed-off-by: Jan Weitzel
> > ---
> > arch/arm/mach-omap/include/mach/omap4-silicon.h |4
> > arch/arm/mach-omap/omap4_generic.c | 21
> > +++--
> > 2 files changed, 23 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > index d5517c5..4082bac 100644
> > --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> > @@ -101,6 +101,10 @@
> > #define DMM_LISA_MAP_SYS_SIZE_MASK (7 << 20)
> > #define DMM_LISA_MAP_SYS_SIZE_SHIFT20
> > #define DMM_LISA_MAP_SYS_ADDR_MASK (0xFF << 24)
> > +
> > +/* Memory Adapter (4460 onwards) */
> > +#define OMAP44XX_MA_BASE 0x482AF000
> > +
> > /*
> > * Hardware Register Details
> > */
> > diff --git a/arch/arm/mach-omap/omap4_generic.c
> > b/arch/arm/mach-omap/omap4_generic.c
> > index 07aa2b4..a368759 100644
> > --- a/arch/arm/mach-omap/omap4_generic.c
> > +++ b/arch/arm/mach-omap/omap4_generic.c
> > @@ -29,6 +29,10 @@
> > #define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
> > #define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
> >
> > +/* EMIF_L3_CONFIG register value */
> > +#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0 0x0AFF
> > +#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0 0x0A30
> > +
> > void __noreturn reset_cpu(unsigned long addr)
> > {
> > writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
> > @@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
> > void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> > const struct dpll_param *core)
> > {
> > - unsigned int rev;
> > - rev = omap4_revision();
> > + unsigned int rev = omap4_revision();
> >
> > if (rev == OMAP4430_ES2_0) {
> > writel(0x9e9e9e9e, 0x4A100638);
> > @@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> > *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
> > *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
> >
> > + if (rev >= OMAP4460_ES1_0) {
> > + writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
> > +
> > + *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) =
> > 0x;
> > + *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) =
> > 0xFF020100;
> ??
There are bad examples in this file already, see the context of this
patch. Should be fixed before we add more stuff.
Sascha
--
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Re: [PATCH 3/3] OMAP4460: clock init
On 15:40 Fri 27 Jul , Jan Weitzel wrote:
> Change clock init to allow early gpio access. Add support for 4460 clocks.
>
> Signed-off-by: Jan Weitzel
> ---
> arch/arm/boards/panda/lowlevel.c |4 ++-
> arch/arm/boards/panda/mux.c |8 +
> arch/arm/boards/pcm049/lowlevel.c | 15 +++--
> arch/arm/boards/pcm049/mux.c |8 +
> arch/arm/boards/phycard-a-xl2/lowlevel.c |9 -
> arch/arm/boards/phycard-a-xl2/mux.c |8 +
> arch/arm/mach-omap/include/mach/omap4-clock.h |4 ++
> arch/arm/mach-omap/omap4_clock.c | 39 +---
> 8 files changed, 76 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/boards/panda/lowlevel.c
> b/arch/arm/boards/panda/lowlevel.c
> index 8591fff..0b4b199 100644
> --- a/arch/arm/boards/panda/lowlevel.c
> +++ b/arch/arm/boards/panda/lowlevel.c
> @@ -28,6 +28,8 @@
> #include
> #include
>
> +#define TPS62361_VSEL0_GPIO7
> +
> void set_muxconf_regs(void);
>
> static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> @@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
> omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
>
> /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> - omap4_scale_vcores();
> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
>
> board_init_lowlevel_return();
> }
> diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
> index 310e433..3783006 100644
> --- a/arch/arm/boards/panda/mux.c
> +++ b/arch/arm/boards/panda/mux.c
> @@ -3,6 +3,7 @@
> #include
> #include
> #include
> +#include
>
> static const struct pad_conf_entry core_padconf_array[] = {
> { GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1 /* sdmmc2_dat0
> */ },
> @@ -245,4 +246,11 @@ void set_muxconf_regs(void)
>
> omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
> ARRAY_SIZE(wkup_padconf_array));
> +
> + /* gpio_wk7 is used for controlling TPS on 4460 */
> + if (omap4_revision() >= OMAP4460_ES1_0) {
> + writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
> + /* Enable GPIO-1 clocks before TPS initialization */
> + omap4_enable_gpio1_wup_clocks();
> + }
can we factorize this?
Best Regards,
J.
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Re: [PATCH 2/3] OMAP4460: ram init changes
On 15:40 Fri 27 Jul , Jan Weitzel wrote:
> configure Memory Adapter for 4460
>
> Signed-off-by: Jan Weitzel
> ---
> arch/arm/mach-omap/include/mach/omap4-silicon.h |4
> arch/arm/mach-omap/omap4_generic.c | 21 +++--
> 2 files changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> index d5517c5..4082bac 100644
> --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
> +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
> @@ -101,6 +101,10 @@
> #define DMM_LISA_MAP_SYS_SIZE_MASK (7 << 20)
> #define DMM_LISA_MAP_SYS_SIZE_SHIFT 20
> #define DMM_LISA_MAP_SYS_ADDR_MASK (0xFF << 24)
> +
> +/* Memory Adapter (4460 onwards) */
> +#define OMAP44XX_MA_BASE 0x482AF000
> +
> /*
> * Hardware Register Details
> */
> diff --git a/arch/arm/mach-omap/omap4_generic.c
> b/arch/arm/mach-omap/omap4_generic.c
> index 07aa2b4..a368759 100644
> --- a/arch/arm/mach-omap/omap4_generic.c
> +++ b/arch/arm/mach-omap/omap4_generic.c
> @@ -29,6 +29,10 @@
> #define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
> #define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
>
> +/* EMIF_L3_CONFIG register value */
> +#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0 0x0AFF
> +#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0 0x0A30
> +
> void __noreturn reset_cpu(unsigned long addr)
> {
> writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
> @@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
> void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> const struct dpll_param *core)
> {
> - unsigned int rev;
> - rev = omap4_revision();
> + unsigned int rev = omap4_revision();
>
> if (rev == OMAP4430_ES2_0) {
> writel(0x9e9e9e9e, 0x4A100638);
> @@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
> *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
>
> + if (rev >= OMAP4460_ES1_0) {
> + writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
> +
> + *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) =
> 0x;
> + *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) =
> 0xFF020100;
??
Best Regards,
J.
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[PATCH 1/3] Add support for OMAP4460 TPS62361
based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.
VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.
Signed-off-by: F. Gasnier fabrice.gasn...@cenosys.com
Signed-off-by: Jan Weitzel
---
arch/arm/mach-omap/include/mach/omap4-clock.h | 15 +
arch/arm/mach-omap/include/mach/omap4-silicon.h |9 +-
arch/arm/mach-omap/omap4_clock.c| 19 +++
arch/arm/mach-omap/omap4_generic.c | 39 +-
4 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h
b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 0a31d09..391ee63 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -271,6 +271,20 @@
#define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
#define PLL_LOCK 7 /* MPU, IVA, CORE & PER */
+/* TPS */
+#define TPS62361_I2C_SLAVE_ADDR0x60
+#define TPS62361_REG_ADDR_SET0 0x0
+#define TPS62361_REG_ADDR_SET1 0x1
+#define TPS62361_REG_ADDR_SET2 0x2
+#define TPS62361_REG_ADDR_SET3 0x3
+#define TPS62361_REG_ADDR_CTRL 0x4
+#define TPS62361_REG_ADDR_TEMP 0x5
+#define TPS62361_REG_ADDR_RMP_CTRL 0x6
+#define TPS62361_REG_ADDR_CHIP_ID 0x8
+#define TPS62361_REG_ADDR_CHIP_ID_20x9
+
+#define TPS62361_BASE_VOLT_MV 500
+
/* Used to index into DPLL parameter tables */
struct dpll_param {
unsigned int m;
@@ -317,4 +331,5 @@ void omap4_configure_core_dpll_no_lock(const struct
dpll_param *param);
void omap4_lock_core_dpll(void);
void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
void omap4_enable_all_clocks(void);
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index c785475..d5517c5 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -60,6 +60,13 @@
#define OMAP44XX_PRM_VC_VAL_BYPASS (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba0)
#define OMAP44XX_PRM_VC_CFG_I2C_MODE (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba8)
#define OMAP44XX_PRM_VC_CFG_I2C_CLK(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7bac)
+#define OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT 0x100
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_MASK 0x7F
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT 8
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_MASK0xFF
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT 16
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_MASK 0xFF
/* IRQ */
#define OMAP44XX_PRM_IRQSTATUS_MPU_A9 (OMAP44XX_WAKEUP_L4_IO_BASE + 0x6010)
@@ -178,6 +185,6 @@ struct dpll_param;
void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
void omap4_power_i2c_send(u32);
unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(void);
+noinline int omap4_scale_vcores(unsigned vsel0_pin);
#endif
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 3ab01f0..564a748 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -1,6 +1,7 @@
#include
#include
#include
+#include
#include
#define LDELAY 1200
@@ -378,3 +379,21 @@ void omap4_enable_all_clocks(void)
sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
}
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
+{
+ u32 temp, step;
+
+ step = volt_mv - TPS62361_BASE_VOLT_MV;
+ step /= 10;
+
+ temp = TPS62361_I2C_SLAVE_ADDR |
+ (reg << OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT) |
+ (step << OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT) |
+ OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT;
+ debug("do_scale_tps62361: volt - %d step - 0x%x\n", volt_mv, step);
+
+ writel(temp, OMAP44XX_PRM_VC_VAL_BYPASS);
+ if (!wait_on_value(OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT, 0,
+ OMAP44XX_PRM_VC_VAL_BYPASS, LDELAY))
+ puts("Scaling voltage failed for vdd_mpu from TPS\n");
+}
diff --git a/arch/arm/mach-omap/omap4_generic.c
b/arch/arm/mach-omap/omap4_generic.c
index de69934..07aa2b4 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
/*
* The following several lines are taken from U-Boot to support
@@ -466,7 +467,7 @@ enum omap_boot_src omap4_bootsrc(void)
#define I2C_SLAVE 0x12
-noinline int omap4_scale_vcores(void)
+noinline int omap4_scale_vcores(unsigned vsel0_pin)
{
unsigned int rev = omap4_revision();
@@ -476,8 +477,41 @@ noinline int omap4_scale_vcores(void)
writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE);
w
[PATCH 3/3] OMAP4460: clock init
Change clock init to allow early gpio access. Add support for 4460 clocks.
Signed-off-by: Jan Weitzel
---
arch/arm/boards/panda/lowlevel.c |4 ++-
arch/arm/boards/panda/mux.c |8 +
arch/arm/boards/pcm049/lowlevel.c | 15 +++--
arch/arm/boards/pcm049/mux.c |8 +
arch/arm/boards/phycard-a-xl2/lowlevel.c |9 -
arch/arm/boards/phycard-a-xl2/mux.c |8 +
arch/arm/mach-omap/include/mach/omap4-clock.h |4 ++
arch/arm/mach-omap/omap4_clock.c | 39 +---
8 files changed, 76 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff..0b4b199 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
#include
#include
+#define TPS62361_VSEL0_GPIO7
+
void set_muxconf_regs(void);
static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
- omap4_scale_vcores();
+ omap4_scale_vcores(TPS62361_VSEL0_GPIO);
board_init_lowlevel_return();
}
diff --git a/arch/arm/boards/panda/mux.c b/arch/arm/boards/panda/mux.c
index 310e433..3783006 100644
--- a/arch/arm/boards/panda/mux.c
+++ b/arch/arm/boards/panda/mux.c
@@ -3,6 +3,7 @@
#include
#include
#include
+#include
static const struct pad_conf_entry core_padconf_array[] = {
{ GPMC_AD0, PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1 /* sdmmc2_dat0
*/ },
@@ -245,4 +246,11 @@ void set_muxconf_regs(void)
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+ /* gpio_wk7 is used for controlling TPS on 4460 */
+ if (omap4_revision() >= OMAP4460_ES1_0) {
+ writew(M3, OMAP44XX_CONTROL_PADCONF_WKUP + PAD1_FREF_CLK4_REQ);
+ /* Enable GPIO-1 clocks before TPS initialization */
+ omap4_enable_gpio1_wup_clocks();
+ }
}
diff --git a/arch/arm/boards/pcm049/lowlevel.c
b/arch/arm/boards/pcm049/lowlevel.c
index 5b91098..65a29ec 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
#include
#include
+#define TPS62361_VSEL0_GPIO182
+
void set_muxconf_regs(void);
static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -46,7 +48,8 @@ static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz =
{
static void noinline pcm049_init_lowlevel(void)
{
struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
- struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+ struct dpll_param mpu44xx = OMAP4_MPU_DPLL_PARAM_19M2_MPU1000;
+ struct dpll_param mpu4460 = OMAP4_MPU_DPLL_PARAM_19M2_MPU920;
struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
@@ -57,12 +60,16 @@ static void noinline pcm049_init_lowlevel(void)
omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
- omap4_scale_vcores();
+ omap4_scale_vcores(TPS62361_VSEL0_GPIO);
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
/* Configure all DPLL's at 100% OPP */
- omap4_configure_mpu_dpll(&mpu);
+ if (omap4_revision() < OMAP4460_ES1_0)
+ omap4_configure_mpu_dpll(&mpu44xx);
+ else
+ omap4_configure_mpu_dpll(&mpu4460);
+
omap4_configure_iva_dpll(&iva);
omap4_configure_per_dpll(&per);
omap4_configure_abe_dpll(&abe);
@@ -88,7 +95,7 @@ void board_init_lowlevel(void)
return;
r = 0x4030d000;
-__asm__ __volatile__("mov sp, %0" : : "r"(r));
+ __asm__ __volatile__("mov sp, %0" : : "r"(r));
pcm049_init_lowlevel();
}
diff --git a/arch/arm/boards/pcm049/mux.c b/arch/arm/boards/pcm049/mux.c
index a7a77b5..04e1d67 100644
--- a/arch/arm/boards/pcm049/mux.c
+++ b/arch/arm/boards/pcm049/mux.c
@@ -3,6 +3,7 @@
#include
#include
#include
+#include
static const struct pad_conf_entry core_padconf_array[] = {
{GPMC_AD0, (IEN | PTD | DIS | M0)}, /*
gpmc_ad0 */
@@ -242,4 +243,11 @@ void set_muxconf_regs(void)
omap4_do_set_mux(OMAP44XX_CONTROL_PADCONF_WKUP, wkup_padconf_array,
ARRAY_SIZE(wkup_padconf_array));
+
+ /* gpio_182 is used for controlling TPS on 4460 */
+ if (omap4_revision() >= OMAP4460_ES1_0) {
+ writew(M3, OMAP44XX_CONTROL_PADCONF_CORE + FREF_CLK2_OUT);
+ /* Enable GPIO-1 clocks before TPS initialization */
+ omap4_enable_gpio_clocks();
+ }
}
diff --git a/arch
[PATCH 0/3] omap: 4460 support
Add support for OMAP4460 cpu on top off 7b0de0e6 (next) Jan Weitzel (3): Add support for OMAP4460 TPS62361 OMAP4460: ram init changes OMAP4460: clock init arch/arm/boards/panda/lowlevel.c|4 +- arch/arm/boards/panda/mux.c |8 +++ arch/arm/boards/pcm049/lowlevel.c | 15 -- arch/arm/boards/pcm049/mux.c|8 +++ arch/arm/boards/phycard-a-xl2/lowlevel.c|9 +++- arch/arm/boards/phycard-a-xl2/mux.c |8 +++ arch/arm/mach-omap/include/mach/omap4-clock.h | 19 +++ arch/arm/mach-omap/include/mach/omap4-silicon.h | 13 +- arch/arm/mach-omap/omap4_clock.c| 58 +- arch/arm/mach-omap/omap4_generic.c | 60 +-- 10 files changed, 178 insertions(+), 24 deletions(-) ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 2/3] OMAP4460: ram init changes
configure Memory Adapter for 4460
Signed-off-by: Jan Weitzel
---
arch/arm/mach-omap/include/mach/omap4-silicon.h |4
arch/arm/mach-omap/omap4_generic.c | 21 +++--
2 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index d5517c5..4082bac 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -101,6 +101,10 @@
#define DMM_LISA_MAP_SYS_SIZE_MASK (7 << 20)
#define DMM_LISA_MAP_SYS_SIZE_SHIFT20
#define DMM_LISA_MAP_SYS_ADDR_MASK (0xFF << 24)
+
+/* Memory Adapter (4460 onwards) */
+#define OMAP44XX_MA_BASE 0x482AF000
+
/*
* Hardware Register Details
*/
diff --git a/arch/arm/mach-omap/omap4_generic.c
b/arch/arm/mach-omap/omap4_generic.c
index 07aa2b4..a368759 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -29,6 +29,10 @@
#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
+/* EMIF_L3_CONFIG register value */
+#define EMIF_L3_CONFIG_VAL_SYS_10_LL_0 0x0AFF
+#define EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0 0x0A30
+
void __noreturn reset_cpu(unsigned long addr)
{
writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL);
@@ -270,8 +274,7 @@ static void reset_phy(unsigned int base)
void omap4_ddr_init(const struct ddr_regs *ddr_regs,
const struct dpll_param *core)
{
- unsigned int rev;
- rev = omap4_revision();
+ unsigned int rev = omap4_revision();
if (rev == OMAP4430_ES2_0) {
writel(0x9e9e9e9e, 0x4A100638);
@@ -294,6 +297,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
+ if (rev >= OMAP4460_ES1_0) {
+ writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
+
+ *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) =
0x;
+ *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_3) =
0xFF020100;
+ }
+
/* DDR needs to be initialised @ 19.2 MHz
* So put core DPLL in bypass mode
* Configure the Core DPLL but don't lock it
@@ -336,6 +346,13 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
+ if (rev >= OMAP4460_ES1_0) {
+ writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+ OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
+ writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
+ OMAP44XX_EMIF2_BASE + EMIF_L3_CONFIG);
+ }
+
/*
* DMM : DMM_LISA_MAP_0(Section_0)
* [31:24] SYS_ADDR 0x80
--
1.7.0.4
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Re: nor flash board init code
2012/7/25
>
> hi all,
> is there any example board init code to load the mx25l8005 spi nor-flash
> through the imx53 (TX53 from KARO)?
> I want to use the m25p80 driver to read and write.
>
> christian
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>
Hi Christian,
This is what I use with the Altera SPI controller + an SPI flash device:
http://www.elec4fun.fr/index.php?option=com_content&view=article&id=10&Itemid=153
static struct spi_altera_master altera_spi_0_data = {
.num_chipselect = 1,
.spi_mode = 0, /* SPI mode of the EPCS flash controller */
.databits = 8, /* Data length of the EPCS flash controller */
.speed = 2000, /* EPCS flash controller speed */
};
static struct flash_platform_data epcs_flash = {
.name = "epcs",/* Cdev name, optional */
.type = "m25p40", /* Device type, required for non JEDEC chips */
};
static struct spi_board_info generic_spi_board_info[] = {
{
.name = "m25p",
.max_speed_hz = 2000,
.bus_num = 0,
.chip_select = 0,
.bits_per_word = 8,
.mode = SPI_MODE_0,
.platform_data = &epcs_flash,
}
};
static int myboard_devices_init(void) {
...
spi_register_board_info(myboard_spi_board_info,
ARRAY_SIZE(myboard_spi_board_info));
add_generic_device("altera_spi", -1, NULL, NIOS_SOPC_EPCS_BASE, 0x18,
IORESOURCE_MEM, &altera_spi_0_data);
...
Franck.
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[PATCH] omap: use 512k barebox partition
Use 512k NAND Partion for barebox. Problem is we don't know the size of the
barebox inside xload. Set it also to 512k
Fix enviroment for boards with size in config
Signed-off-by: Jan Weitzel
---
arch/arm/boards/pcm049/board.c|7 +--
arch/arm/boards/pcm049/env/config |2 +-
arch/arm/boards/phycard-a-l1/env/config |2 +-
arch/arm/boards/phycard-a-l1/pca-a-l1.c |9 ++---
arch/arm/boards/phycard-a-xl2/env/config |2 +-
arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |4 ++--
arch/arm/mach-omap/xload.c|2 +-
7 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c
index 5b7854a..d7b79c1 100644
--- a/arch/arm/boards/pcm049/board.c
+++ b/arch/arm/boards/pcm049/board.c
@@ -113,9 +113,12 @@ static int pcm049_devices_init(void)
#ifdef CONFIG_PARTITION
devfs_add_partition("nand0", 0x0, SZ_128K, DEVFS_PARTITION_FIXED,
"xload_raw");
dev_add_bb_dev("xload_raw", "xload");
- devfs_add_partition("nand0", SZ_128K, SZ_256K, DEVFS_PARTITION_FIXED,
"self_raw");
+ devfs_add_partition("nand0", SZ_128K, SZ_512K,
+ DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
- devfs_add_partition("nand0", SZ_128K + SZ_256K, SZ_128K,
DEVFS_PARTITION_FIXED, "env_raw");
+ devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
+ DEVFS_PARTITION_FIXED, "env_raw");
+
dev_add_bb_dev("env_raw", "env0");
#endif
diff --git a/arch/arm/boards/pcm049/env/config
b/arch/arm/boards/pcm049/env/config
index efbe9ea..70e374f 100644
--- a/arch/arm/boards/pcm049/env/config
+++ b/arch/arm/boards/pcm049/env/config
@@ -40,7 +40,7 @@ autoboot_timeout=3
bootargs="console=ttyO2,115200"
-nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),2M(kernel),-(root)"
+nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
rootfs_mtdblock_nand=4
# set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-l1/env/config
b/arch/arm/boards/phycard-a-l1/env/config
index e0f4dcc..5bc48d7 100644
--- a/arch/arm/boards/phycard-a-l1/env/config
+++ b/arch/arm/boards/phycard-a-l1/env/config
@@ -70,7 +70,7 @@ bootargs="$bootargs omapdss.def_disp=pd050vl1"
#bootargs="$bootargs omapdss.def_disp=pd104slf"
#bootargs="$bootargs omapdss.def_disp=pm070wl4"
-nand_parts="512k(x-loader)ro,1920k(barebox),128k(bareboxenv),4M(kernel),-(root)"
+nand_parts="128k(x-loader)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
nand_device=omap2-nand.0
rootfs_mtdblock_nand=4
diff --git a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
index 1cc2815..3d3596a 100644
--- a/arch/arm/boards/phycard-a-l1/pca-a-l1.c
+++ b/arch/arm/boards/phycard-a-l1/pca-a-l1.c
@@ -336,13 +336,16 @@ static int pcaal1_late_init(void)
nand = get_device_by_name("nand0");
- devfs_add_partition("nand0", 0x0, 0x8, DEVFS_PARTITION_FIXED,
"x-loader");
+ devfs_add_partition("nand0", 0x0, SZ_128K,
+ DEVFS_PARTITION_FIXED, "x-loader");
dev_add_bb_dev("self_raw", "x_loader0");
- devfs_add_partition("nand0", 0x8, 0x1e, DEVFS_PARTITION_FIXED,
"self_raw");
+ devfs_add_partition("nand0", SZ_128K, SZ_512K,
+ DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
- devfs_add_partition("nand0", 0x26, 0x2, DEVFS_PARTITION_FIXED,
"env_raw");
+ devfs_add_partition("nand0", SZ_128K + SZ_512K, SZ_128K,
+ DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
return 0;
diff --git a/arch/arm/boards/phycard-a-xl2/env/config
b/arch/arm/boards/phycard-a-xl2/env/config
index 59e8eb3..44a4181 100644
--- a/arch/arm/boards/phycard-a-xl2/env/config
+++ b/arch/arm/boards/phycard-a-xl2/env/config
@@ -39,7 +39,7 @@ autoboot_timeout=3
bootargs="console=ttyO2,115200"
-nand_parts="128k(xload)ro,256k(barebox),128k(bareboxenv),4M(kernel),-(root)"
+nand_parts="128k(xload)ro,512k(barebox),128k(bareboxenv),4M(kernel),-(root)"
rootfs_mtdblock_nand=4
# set a fancy prompt (if support is compiled in)
diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
index 128cb8f..54b4ada 100644
--- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
+++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c
@@ -131,10 +131,10 @@ static int pcaaxl2_devices_init(void)
devfs_add_partition("nand0", 0x0, SZ_128K,
DEVFS_PARTITION_FIXED, "xload_raw");
dev_add_bb_dev("xload_raw", "xload");
- devfs_add_partition("nand0", SZ_128K, SZ_256K,
+ devfs_add_partition("nand0", SZ_128K, SZ_512K,
DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
- devfs_add_partitio
Re: [PATCH] ARM/imx/pcm043: increase size of "self" partition
Am Freitag, den 27.07.2012, 10:41 +0200 schrieb Uwe Kleine-König:
> A barebox image generated from pcm043_defconfig doesn't fit into the
> 0x4 byte sized self partition as of
>
> v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for
> find_cmd)
>
> .
>
> Signed-off-by: Uwe Kleine-König
> ---
> arch/arm/boards/pcm043/pcm043.c |8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
> index b1bf8ef..7ccd973 100644
> --- a/arch/arm/boards/pcm043/pcm043.c
> +++ b/arch/arm/boards/pcm043/pcm043.c
> @@ -153,15 +153,15 @@ static int imx35_devices_init(void)
> if ((reg & 0xc00) == 0x800) { /* reset mode: external boot */
> switch ( (reg >> 25) & 0x3) {
> case 0x01: /* NAND is the source */
> - devfs_add_partition("nand0", 0x0, 0x4,
> DEVFS_PARTITION_FIXED, "self_raw");
> + devfs_add_partition("nand0", 0x0, 0x6,
> DEVFS_PARTITION_FIXED, "self_raw");
What do you think about SZ_128K + SZ_256K ? Maybe SZ_512K is even
better.
Jan
> dev_add_bb_dev("self_raw", "self0");
> - devfs_add_partition("nand0", 0x4, 0x2,
> DEVFS_PARTITION_FIXED, "env_raw");
> + devfs_add_partition("nand0", 0x6, 0x2,
> DEVFS_PARTITION_FIXED, "env_raw");
> dev_add_bb_dev("env_raw", "env0");
> break;
>
> case 0x00: /* NOR is the source */
> - devfs_add_partition("nor0", 0x0, 0x4,
> DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> - devfs_add_partition("nor0", 0x4, 0x2,
> DEVFS_PARTITION_FIXED, "env0"); /* environment */
> + devfs_add_partition("nor0", 0x0, 0x6,
> DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> + devfs_add_partition("nor0", 0x6, 0x2,
> DEVFS_PARTITION_FIXED, "env0"); /* environment */
> protect_file("/dev/env0", 1);
> break;
> }
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Re: [PATCH] ARM/imx/pcm043: increase size of "self" partition
On Fri, Jul 27, 2012 at 10:41:24AM +0200, Uwe Kleine-König wrote:
> A barebox image generated from pcm043_defconfig doesn't fit into the
> 0x4 byte sized self partition as of
>
> v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for
> find_cmd)
You also must adjust the size in the defconfig.
Sascha
>
> .
>
> Signed-off-by: Uwe Kleine-König
> ---
> arch/arm/boards/pcm043/pcm043.c |8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
> index b1bf8ef..7ccd973 100644
> --- a/arch/arm/boards/pcm043/pcm043.c
> +++ b/arch/arm/boards/pcm043/pcm043.c
> @@ -153,15 +153,15 @@ static int imx35_devices_init(void)
> if ((reg & 0xc00) == 0x800) { /* reset mode: external boot */
> switch ( (reg >> 25) & 0x3) {
> case 0x01: /* NAND is the source */
> - devfs_add_partition("nand0", 0x0, 0x4,
> DEVFS_PARTITION_FIXED, "self_raw");
> + devfs_add_partition("nand0", 0x0, 0x6,
> DEVFS_PARTITION_FIXED, "self_raw");
> dev_add_bb_dev("self_raw", "self0");
> - devfs_add_partition("nand0", 0x4, 0x2,
> DEVFS_PARTITION_FIXED, "env_raw");
> + devfs_add_partition("nand0", 0x6, 0x2,
> DEVFS_PARTITION_FIXED, "env_raw");
> dev_add_bb_dev("env_raw", "env0");
> break;
>
> case 0x00: /* NOR is the source */
> - devfs_add_partition("nor0", 0x0, 0x4,
> DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> - devfs_add_partition("nor0", 0x4, 0x2,
> DEVFS_PARTITION_FIXED, "env0"); /* environment */
> + devfs_add_partition("nor0", 0x0, 0x6,
> DEVFS_PARTITION_FIXED, "self0"); /* ourself */
> + devfs_add_partition("nor0", 0x6, 0x2,
> DEVFS_PARTITION_FIXED, "env0"); /* environment */
> protect_file("/dev/env0", 1);
> break;
> }
> --
> 1.7.10.4
>
>
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[PATCH] ARM/imx/pcm043: increase size of "self" partition
A barebox image generated from pcm043_defconfig doesn't fit into the
0x4 byte sized self partition as of
v2012.07.0-153-g14c8c60 (command: add missing EXPORT_SYMBOL for
find_cmd)
.
Signed-off-by: Uwe Kleine-König
---
arch/arm/boards/pcm043/pcm043.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c
index b1bf8ef..7ccd973 100644
--- a/arch/arm/boards/pcm043/pcm043.c
+++ b/arch/arm/boards/pcm043/pcm043.c
@@ -153,15 +153,15 @@ static int imx35_devices_init(void)
if ((reg & 0xc00) == 0x800) { /* reset mode: external boot */
switch ( (reg >> 25) & 0x3) {
case 0x01: /* NAND is the source */
- devfs_add_partition("nand0", 0x0, 0x4,
DEVFS_PARTITION_FIXED, "self_raw");
+ devfs_add_partition("nand0", 0x0, 0x6,
DEVFS_PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
- devfs_add_partition("nand0", 0x4, 0x2,
DEVFS_PARTITION_FIXED, "env_raw");
+ devfs_add_partition("nand0", 0x6, 0x2,
DEVFS_PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
break;
case 0x00: /* NOR is the source */
- devfs_add_partition("nor0", 0x0, 0x4,
DEVFS_PARTITION_FIXED, "self0"); /* ourself */
- devfs_add_partition("nor0", 0x4, 0x2,
DEVFS_PARTITION_FIXED, "env0"); /* environment */
+ devfs_add_partition("nor0", 0x0, 0x6,
DEVFS_PARTITION_FIXED, "self0"); /* ourself */
+ devfs_add_partition("nor0", 0x6, 0x2,
DEVFS_PARTITION_FIXED, "env0"); /* environment */
protect_file("/dev/env0", 1);
break;
}
--
1.7.10.4
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RFC: How to setup and handle NAND flashes in Barebox
Sascha Hauer wrote: > On Fri, Jul 27, 2012 at 11:24:48AM +1000, Marc Reilly wrote: > > Thanks for your ideas. > > > > I managed to clear the BBT, it was a bit of a hack... the saga is below > > for anyone who runs into similar problem. > > > > On Thursday, July 26, 2012 11:27:48 AM Juergen Beisert wrote: > > > The flash blocks which contains the "bad block table" are protected by > > > the "bad block table" aware MTD layer. > > > > > > So, the ugly way: run a bootloader which does not use the in-flash bad > > > block table. Then the tables are regular blocks in the flash and can be > > > erased. After that run again the bad block table aware bootloader and > > > it will re-create the in-flash table. But be careful: In this case the > > > generic functions scans all blocks in the NAND to collect the bad block > > > markers in each NAND block's OOB. If this information is already > > > destroyed somehow, this solution does not help. > > > > Recompiling barebox with bbt support disabled stopped the all the bad > > block messages, however erasing the nand didn't clear the BBT for > > subsequent reboots... > > The issue was that the erase commands and functions skip erasing bad > > blocks, and the blocks that held the actual BBT were being considered > > bad, so they weren't getting erased. After commenting out calls to > > nand_block_checkbad() in nand_write.c and block_isbad() in > > mtd_erase()/core.c I was able to manually erase the blocks. (erasing > > actual bad blocks results in I/O error) Next restart of barebox the BBT > > was regenerated with the two actual bad blocks. > > > > After all that, I noticed imx_low_erase() in nand_imx.c. Probably would > > have been easier to make up a command around that. > > This problem comes up regularly. I remember Wolfram implemented a nand > 'scrub' command. He was working on i.MX28. I don't know wether his > command was i.MX28 specific, but it would be nice to have such a command > around. Just an idea: I think we need something like a "NAND handling environment". For example the MTD generates a in-flash bad block table without any interaction. That might be a nice feature, but only when: - the factory bad block markers are still intact - the regular NAND driver can read the factory bad block markers (the i.MX driver for example cannot) - the flash is more or less untouched yet Whenever one of these dependencies are not valid (anymore), we are in trouble with automatically generation of the in-flash bad block table. Use cases are for example: general development on NAND drivers, a Linux driver that crashes the NAND somehow or a different bootloader/operation system that uses its own ways to handle and mark bad blocks. For these use-cases we need a different approach: something we can do manually. - a 'test' command that checks if the factory bad block markers seems still intact (or not). This command should have some parameters where you can describe the expected OOB layout to be able to check for various ways to mark bad blocks - a 'list' command which lists all the currently known bad blocks (from whatever source, in-flash or in-ram BBT or freshly read from the OOB area) This list could be stored somewhere (like the "bad sector table" in the early days of hard disks). At least this would help later on to still use a NAND memory where all the OOB based bad block markers are lost. For example with my S3C6410 CPU the internal ROM routines force me to write the checksums into a position in the OOB where most of the manufacturers stores the factory bad block info. So, there is no simple way later on to distinguish checksums from bad block markers. - a 'create' command for the in-flash BBT. This command can use the the result of the 'list' command or should accept a list of *known' bad blocks manually entered With these tools we could instruct Barebox to use an in-flash BBT only if it already exists. If not, it should fall back to OOB scan, and should not write an in-flash BBT with the collected information. A user then can run the various tools to get an idea if the NAND is intact (or not) and the 'create' command would then write a correct in-flash BBT (with the help of the other collecting commands) to be used by Barebox itself and Linux. jbe -- Pengutronix e.K. | Juergen Beisert | Linux Solutions for Science and Industry | http://www.pengutronix.de/ | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] Add /dev/urandom device.
On Thu, Jul 19, 2012 at 10:33:49AM +0200, Juergen Kilb wrote:
> Nice for testing purposes.
Can we have an extra file with an extra config option for this? I agree
this is nice for debugging, but no need to bloat every build with it.
Sascha
>
> Signed-off-by: Juergen Kilb
> ---
> commands/stddev.c | 39 +++
> 1 files changed, 39 insertions(+), 0 deletions(-)
>
> diff --git a/commands/stddev.c b/commands/stddev.c
> index 098aea8..b807df6 100644
> --- a/commands/stddev.c
> +++ b/commands/stddev.c
> @@ -20,7 +20,9 @@
> */
>
> #include
> +#include
> #include
> +#include
>
> static ssize_t zero_read(struct cdev *cdev, void *buf, size_t count, loff_t
> offset, ulong flags)
> {
> @@ -104,3 +106,40 @@ static int null_init(void)
> }
>
> device_initcall(null_init);
> +
> +static ssize_t urandom_read(struct cdev *cdev, void *buf, size_t count,
> loff_t offset, ulong flags)
> +{
> + size_t i;
> + unsigned int *buffer;
> +
> + buffer = (unsigned int *) buf;
> +
> + for (i = 0; i < (count / sizeof(size_t)); i++)
> + buffer[i] = rand() | rand() << 16;
> +
> + return count;
> +}
> +
> +static struct file_operations urandomops = {
> + .read = urandom_read,
> + .lseek = dev_lseek_default,
> +};
> +
> +static int urandom_init(void)
> +{
> + struct cdev *cdev;
> +
> + cdev = xzalloc(sizeof(*cdev));
> +
> + cdev->name = "urandom";
> + cdev->size = ~0;
> + cdev->ops = &urandomops;
> +
> + devfs_create(cdev);
> +
> + srand(get_time_ns());
> +
> + return 0;
> +}
> +
> +device_initcall(urandom_init);
> --
> 1.7.0.4
>
>
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Re: [PATCH] lib/Kconfig: Fix alignment of arrows in label
On Sun, Jul 22, 2012 at 03:21:20PM +0200, Bernhard Walle wrote: > Signed-off-by: Bernhard Walle Applied, thanks Sascha > --- > lib/Kconfig |2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/Kconfig b/lib/Kconfig > index 3bcde5c..32634df 100644 > --- a/lib/Kconfig > +++ b/lib/Kconfig > @@ -1,4 +1,4 @@ > -menu "Library routines" > +menu "Library routines " > config PARAMETER > bool > > -- > 1.7.9.5 > > > ___ > barebox mailing list > barebox@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/barebox > -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH RFC] arm/imx: provide command to add ram device with autodetected size
On Thu, Jul 26, 2012 at 11:53:40AM +0200, Uwe Kleine-König wrote: > The amount of available ram is determined by the ESDCTL register, so > better don't hardcode the value. > > This commit provides a command that can be used instead of > arm_add_mem_device and convertes pcm043 (on which this patch was tested) > to it. > > Signed-off-by: Uwe Kleine-König > --- > Hello, > > maybe better move the new function into a new file > arch/arm/mach-imx/esdctl.c and the prototype into ? > > Also imx_add_ram1() is still missing. I will implement that when we > agree the patch's idea is useful. I agree it's useful Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] MIPS: add initial exceptions handling
On Fri, Jul 27, 2012 at 11:49:43AM +0400, Antony Pavlov wrote:
> On 27 July 2012 11:48, Sascha Hauer wrote:
> > Hi Antony,
> >
> > Looks fine from my perspective. Should I apply this one?
>
> Apply this one please.
Ok, did that.
Thanks
Sascha
>
> > On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
> >> Checking exception handling:
> >>
> >> $ make qemu-malta_defconfig
> >> $ make
> >>
> >> ...
> >>
> >> $ qemu-system-mips -nodefaults -M malta -m 256 \
> >>-nographic -serial stdio -bios ./barebox.bin
> >>
> >> ...
> >>
> >> barebox:/ md -l 0x03
> >>
> >> Ooops, address error on load or ifetch!
> >> EPC = 0xa082783c
> >> CP0_STATUS = 0x0006
> >> CP0_CAUSE = 0x0410
> >> CP0_CONFIG = 0x80008482
> >>
> >> ### ERROR ### Please RESET the board ###
> >>
> >> Signed-off-by: Antony Pavlov
> >> ---
> >> arch/mips/boot/main_entry.c | 47
> >> arch/mips/include/asm/addrspace.h | 109
> >> +
> >> arch/mips/lib/Makefile|2 +
> >> arch/mips/lib/genex.S | 31 +++
> >> arch/mips/lib/traps.c | 107
> >>
> >> 5 files changed, 296 insertions(+)
> >> create mode 100644 arch/mips/include/asm/addrspace.h
> >> create mode 100644 arch/mips/lib/genex.S
> >> create mode 100644 arch/mips/lib/traps.c
> >>
> >> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
> >> index 8f5f6fc..a38ad31 100644
> >> --- a/arch/mips/boot/main_entry.c
> >> +++ b/arch/mips/boot/main_entry.c
> >> @@ -25,11 +25,56 @@
> >> #include
> >> #include
> >> #include
> >> +#include
> >> +#include
> >>
> >> extern void start_barebox(void);
> >> +extern void handle_reserved(void);
> >>
> >> void main_entry(void);
> >>
> >> +unsigned long exception_handlers[32];
> >> +
> >> +static void set_except_vector(int n, void *addr)
> >> +{
> >> + unsigned handler = (unsigned long) addr;
> >> +
> >> + exception_handlers[n] = handler;
> >> +}
> >> +
> >> +static void trap_init(void)
> >> +{
> >> + extern char except_vec3_generic;
> >> + int i;
> >> +
> >> + unsigned long ebase;
> >> +
> >> + ebase = CKSEG1;
> >> +
> >> + /*
> >> + * Copy the generic exception handlers to their final destination.
> >> + * This will be overriden later as suitable for a particular
> >> + * configuration.
> >> + */
> >> + memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
> >> +
> >> + /*
> >> + * Setup default vectors
> >> + */
> >> + for (i = 0; i <= 31; i++) {
> >> + set_except_vector(i, &handle_reserved);
> >> + }
> >> +
> >> + if (!cpu_has_4kex)
> >> + memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
> >> +
> >> + /* FIXME: handle tlb */
> >> + memcpy((void *)(ebase), &except_vec3_generic, 0x80);
> >> +
> >> + /* unset BOOT EXCEPTION VECTOR bit */
> >> + write_c0_status(read_c0_status() & ~ST0_BEV);
> >> +}
> >> +
> >> /**
> >> * Called plainly from assembler code
> >> *
> >> @@ -48,5 +93,7 @@ void main_entry(void)
> >> r4k_cache_init();
> >> }
> >>
> >> + trap_init();
> >> +
> >> start_barebox();
> >> }
> >> diff --git a/arch/mips/include/asm/addrspace.h
> >> b/arch/mips/include/asm/addrspace.h
> >> new file mode 100644
> >> index 000..17d480d
> >> --- /dev/null
> >> +++ b/arch/mips/include/asm/addrspace.h
> >> @@ -0,0 +1,109 @@
> >> +/*
> >> + * This file is subject to the terms and conditions of the GNU General
> >> Public
> >> + * License. See the file "COPYING" in the main directory of this archive
> >> + * for more details.
> >> + *
> >> + * Copyright (C) 1996, 99 Ralf Baechle
> >> + * Copyright (C) 2000, 2002 Maciej W. Rozycki
> >> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
> >> + */
> >> +#ifndef _ASM_ADDRSPACE_H
> >> +#define _ASM_ADDRSPACE_H
> >> +
> >> +/*
> >> + * Configure language
> >> + */
> >> +#ifdef __ASSEMBLY__
> >> +#define _ATYPE_
> >> +#define _ATYPE32_
> >> +#define _ATYPE64_
> >> +#define _CONST64_(x) x
> >> +#else
> >> +#define _ATYPE_ __PTRDIFF_TYPE__
> >> +#define _ATYPE32_int
> >> +#define _ATYPE64___s64
> >> +#ifdef CONFIG_64BIT
> >> +#define _CONST64_(x) x ## L
> >> +#else
> >> +#define _CONST64_(x) x ## LL
> >> +#endif
> >> +#endif
> >> +
> >> +/*
> >> + * 32-bit MIPS address spaces
> >> + */
> >> +#ifdef __ASSEMBLY__
> >> +#define _ACAST32_
> >> +#define _ACAST64_
> >> +#else
> >> +#define _ACAST32_(_ATYPE_)(_ATYPE32_)/* widen if
> >> necessary */
> >> +#define _ACAST64_(_ATYPE64_) /* do _not_ narrow */
> >> +#endif
> >> +
> >> +/*
> >> + * Returns the kernel segment base of a given address
> >> + */
> >> +#define KSEGX(a) ((_ACAST32_(a)) & 0xe000)
> >> +
> >> +/*
> >> + * Returns the physical address of a CKSEGx / XKPHYS addr
Re: [PATCH] OMAP4: cleanup
Am Freitag, den 27.07.2012, 09:52 +0200 schrieb Jan Weitzel:
> use rev to check revision
>
sorry didn't apply on master, will rework
> Signed-off-by: Jan Weitzel
> ---
> arch/arm/mach-omap/omap4_generic.c |9 -
> 1 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-omap/omap4_generic.c
> b/arch/arm/mach-omap/omap4_generic.c
> index c6fb91f..f44fa4b 100644
> --- a/arch/arm/mach-omap/omap4_generic.c
> +++ b/arch/arm/mach-omap/omap4_generic.c
> @@ -23,7 +23,7 @@
> #define MIDR_CORTEX_A9_R1P3 0x411FC093
> #define MIDR_CORTEX_A9_R2P10 0x412FC09A
>
> -#define CONTROL_ID_CODE 0x4A002204
> +#define CONTROL_ID_CODE0x4A002204
>
> #define OMAP4_CONTROL_ID_CODE_ES1_0 0x0B85202F
> #define OMAP4_CONTROL_ID_CODE_ES2_0 0x1B85202F
> @@ -278,8 +278,7 @@ static void reset_phy(unsigned int base)
> void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> const struct dpll_param *core)
> {
> - unsigned int rev;
> - rev = omap4_revision();
> + unsigned int rev = omap4_revision();
>
> if (rev == OMAP4430_ES2_0) {
> writel(0x9e9e9e9e, 0x4A100638);
> @@ -302,7 +301,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
> *(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
>
> - if (omap4_revision() >= OMAP4460_ES1_0) {
> + if (rev >= OMAP4460_ES1_0) {
> writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
>
> *(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) =
> 0x;
> @@ -351,7 +350,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
> *(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
> *(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
>
> - if (omap4_revision() >= OMAP4460_ES1_0) {
> + if (rev >= OMAP4460_ES1_0) {
> writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
> OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
> writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
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Re: Way to clear nand bad block table
On Fri, Jul 27, 2012 at 11:24:48AM +1000, Marc Reilly wrote: > Hi Juergen, > > Thanks for your ideas. > > I managed to clear the BBT, it was a bit of a hack... the saga is below for > anyone who runs into similar problem. > > On Thursday, July 26, 2012 11:27:48 AM Juergen Beisert wrote: > > The flash blocks which contains the "bad block table" are protected by > > the "bad block table" aware MTD layer. > > > > So, the ugly way: run a bootloader which does not use the in-flash bad block > > table. Then the tables are regular blocks in the flash and can be erased. > > After that run again the bad block table aware bootloader and it will > > re-create the in-flash table. But be careful: In this case the generic > > functions scans all blocks in the NAND to collect the bad block markers in > > each NAND block's OOB. If this information is already destroyed somehow, > > this solution does not help. > > Recompiling barebox with bbt support disabled stopped the all the bad block > messages, however erasing the nand didn't clear the BBT for subsequent > reboots... > The issue was that the erase commands and functions skip erasing bad blocks, > and the blocks that held the actual BBT were being considered bad, so they > weren't getting erased. After commenting out calls to nand_block_checkbad() > in > nand_write.c and block_isbad() in mtd_erase()/core.c I was able to manually > erase the blocks. (erasing actual bad blocks results in I/O error) > Next restart of barebox the BBT was regenerated with the two actual bad > blocks. > > After all that, I noticed imx_low_erase() in nand_imx.c. Probably would have > been easier to make up a command around that. This problem comes up regularly. I remember Wolfram implemented a nand 'scrub' command. He was working on i.MX28. I don't know wether his command was i.MX28 specific, but it would be nice to have such a command around. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0| Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917- | ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] OMAP4: cleanup
use rev to check revision
Signed-off-by: Jan Weitzel
---
arch/arm/mach-omap/omap4_generic.c |9 -
1 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-omap/omap4_generic.c
b/arch/arm/mach-omap/omap4_generic.c
index c6fb91f..f44fa4b 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -23,7 +23,7 @@
#define MIDR_CORTEX_A9_R1P30x411FC093
#define MIDR_CORTEX_A9_R2P10 0x412FC09A
-#define CONTROL_ID_CODE 0x4A002204
+#define CONTROL_ID_CODE 0x4A002204
#define OMAP4_CONTROL_ID_CODE_ES1_0 0x0B85202F
#define OMAP4_CONTROL_ID_CODE_ES2_0 0x1B85202F
@@ -278,8 +278,7 @@ static void reset_phy(unsigned int base)
void omap4_ddr_init(const struct ddr_regs *ddr_regs,
const struct dpll_param *core)
{
- unsigned int rev;
- rev = omap4_revision();
+ unsigned int rev = omap4_revision();
if (rev == OMAP4430_ES2_0) {
writel(0x9e9e9e9e, 0x4A100638);
@@ -302,7 +301,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_2) = 0x;
*(volatile int*)(OMAP44XX_DMM_BASE + DMM_LISA_MAP_3) = 0xFF020100;
- if (omap4_revision() >= OMAP4460_ES1_0) {
+ if (rev >= OMAP4460_ES1_0) {
writel(0x80640300, OMAP44XX_MA_BASE + DMM_LISA_MAP_0);
*(volatile int*)(OMAP44XX_MA_BASE + DMM_LISA_MAP_2) =
0x;
@@ -351,7 +350,7 @@ void omap4_ddr_init(const struct ddr_regs *ddr_regs,
*(volatile int*)(OMAP44XX_EMIF1_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
*(volatile int*)(OMAP44XX_EMIF2_BASE + EMIF_PWR_MGMT_CTRL) = 0x8000;
- if (omap4_revision() >= OMAP4460_ES1_0) {
+ if (rev >= OMAP4460_ES1_0) {
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
OMAP44XX_EMIF1_BASE + EMIF_L3_CONFIG);
writel(EMIF_L3_CONFIG_VAL_SYS_10_MPU_3_LL_0,
--
1.7.0.4
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Re: [PATCH] MIPS: add initial exceptions handling
On 27 July 2012 11:48, Sascha Hauer wrote:
> Hi Antony,
>
> Looks fine from my perspective. Should I apply this one?
Apply this one please.
> On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
>> Checking exception handling:
>>
>> $ make qemu-malta_defconfig
>> $ make
>>
>> ...
>>
>> $ qemu-system-mips -nodefaults -M malta -m 256 \
>>-nographic -serial stdio -bios ./barebox.bin
>>
>> ...
>>
>> barebox:/ md -l 0x03
>>
>> Ooops, address error on load or ifetch!
>> EPC = 0xa082783c
>> CP0_STATUS = 0x0006
>> CP0_CAUSE = 0x0410
>> CP0_CONFIG = 0x80008482
>>
>> ### ERROR ### Please RESET the board ###
>>
>> Signed-off-by: Antony Pavlov
>> ---
>> arch/mips/boot/main_entry.c | 47
>> arch/mips/include/asm/addrspace.h | 109
>> +
>> arch/mips/lib/Makefile|2 +
>> arch/mips/lib/genex.S | 31 +++
>> arch/mips/lib/traps.c | 107
>>
>> 5 files changed, 296 insertions(+)
>> create mode 100644 arch/mips/include/asm/addrspace.h
>> create mode 100644 arch/mips/lib/genex.S
>> create mode 100644 arch/mips/lib/traps.c
>>
>> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
>> index 8f5f6fc..a38ad31 100644
>> --- a/arch/mips/boot/main_entry.c
>> +++ b/arch/mips/boot/main_entry.c
>> @@ -25,11 +25,56 @@
>> #include
>> #include
>> #include
>> +#include
>> +#include
>>
>> extern void start_barebox(void);
>> +extern void handle_reserved(void);
>>
>> void main_entry(void);
>>
>> +unsigned long exception_handlers[32];
>> +
>> +static void set_except_vector(int n, void *addr)
>> +{
>> + unsigned handler = (unsigned long) addr;
>> +
>> + exception_handlers[n] = handler;
>> +}
>> +
>> +static void trap_init(void)
>> +{
>> + extern char except_vec3_generic;
>> + int i;
>> +
>> + unsigned long ebase;
>> +
>> + ebase = CKSEG1;
>> +
>> + /*
>> + * Copy the generic exception handlers to their final destination.
>> + * This will be overriden later as suitable for a particular
>> + * configuration.
>> + */
>> + memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
>> +
>> + /*
>> + * Setup default vectors
>> + */
>> + for (i = 0; i <= 31; i++) {
>> + set_except_vector(i, &handle_reserved);
>> + }
>> +
>> + if (!cpu_has_4kex)
>> + memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
>> +
>> + /* FIXME: handle tlb */
>> + memcpy((void *)(ebase), &except_vec3_generic, 0x80);
>> +
>> + /* unset BOOT EXCEPTION VECTOR bit */
>> + write_c0_status(read_c0_status() & ~ST0_BEV);
>> +}
>> +
>> /**
>> * Called plainly from assembler code
>> *
>> @@ -48,5 +93,7 @@ void main_entry(void)
>> r4k_cache_init();
>> }
>>
>> + trap_init();
>> +
>> start_barebox();
>> }
>> diff --git a/arch/mips/include/asm/addrspace.h
>> b/arch/mips/include/asm/addrspace.h
>> new file mode 100644
>> index 000..17d480d
>> --- /dev/null
>> +++ b/arch/mips/include/asm/addrspace.h
>> @@ -0,0 +1,109 @@
>> +/*
>> + * This file is subject to the terms and conditions of the GNU General
>> Public
>> + * License. See the file "COPYING" in the main directory of this archive
>> + * for more details.
>> + *
>> + * Copyright (C) 1996, 99 Ralf Baechle
>> + * Copyright (C) 2000, 2002 Maciej W. Rozycki
>> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
>> + */
>> +#ifndef _ASM_ADDRSPACE_H
>> +#define _ASM_ADDRSPACE_H
>> +
>> +/*
>> + * Configure language
>> + */
>> +#ifdef __ASSEMBLY__
>> +#define _ATYPE_
>> +#define _ATYPE32_
>> +#define _ATYPE64_
>> +#define _CONST64_(x) x
>> +#else
>> +#define _ATYPE_ __PTRDIFF_TYPE__
>> +#define _ATYPE32_int
>> +#define _ATYPE64___s64
>> +#ifdef CONFIG_64BIT
>> +#define _CONST64_(x) x ## L
>> +#else
>> +#define _CONST64_(x) x ## LL
>> +#endif
>> +#endif
>> +
>> +/*
>> + * 32-bit MIPS address spaces
>> + */
>> +#ifdef __ASSEMBLY__
>> +#define _ACAST32_
>> +#define _ACAST64_
>> +#else
>> +#define _ACAST32_(_ATYPE_)(_ATYPE32_)/* widen if necessary
>> */
>> +#define _ACAST64_(_ATYPE64_) /* do _not_ narrow */
>> +#endif
>> +
>> +/*
>> + * Returns the kernel segment base of a given address
>> + */
>> +#define KSEGX(a) ((_ACAST32_(a)) & 0xe000)
>> +
>> +/*
>> + * Returns the physical address of a CKSEGx / XKPHYS address
>> + */
>> +#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fff)
>> +#define XPHYSADDR(a)((_ACAST64_(a)) &\
>> + _CONST64_(0x00ff))
>> +
>> +#ifdef CONFIG_64BIT
>> +
>> +/*
>> + * Memory segments (64bit kernel mode addresses)
>> + * The compatibility segments use the full 64-bit sign extended value. Note
>> + * the R8000 doesn't have them so don't refe
Re: [PATCH] MIPS: add initial exceptions handling
Hi Antony,
Looks fine from my perspective. Should I apply this one?
Sascha
On Thu, Jul 26, 2012 at 02:00:27AM +0400, Antony Pavlov wrote:
> Checking exception handling:
>
> $ make qemu-malta_defconfig
> $ make
>
> ...
>
> $ qemu-system-mips -nodefaults -M malta -m 256 \
>-nographic -serial stdio -bios ./barebox.bin
>
> ...
>
> barebox:/ md -l 0x03
>
> Ooops, address error on load or ifetch!
> EPC = 0xa082783c
> CP0_STATUS = 0x0006
> CP0_CAUSE = 0x0410
> CP0_CONFIG = 0x80008482
>
> ### ERROR ### Please RESET the board ###
>
> Signed-off-by: Antony Pavlov
> ---
> arch/mips/boot/main_entry.c | 47
> arch/mips/include/asm/addrspace.h | 109
> +
> arch/mips/lib/Makefile|2 +
> arch/mips/lib/genex.S | 31 +++
> arch/mips/lib/traps.c | 107
> 5 files changed, 296 insertions(+)
> create mode 100644 arch/mips/include/asm/addrspace.h
> create mode 100644 arch/mips/lib/genex.S
> create mode 100644 arch/mips/lib/traps.c
>
> diff --git a/arch/mips/boot/main_entry.c b/arch/mips/boot/main_entry.c
> index 8f5f6fc..a38ad31 100644
> --- a/arch/mips/boot/main_entry.c
> +++ b/arch/mips/boot/main_entry.c
> @@ -25,11 +25,56 @@
> #include
> #include
> #include
> +#include
> +#include
>
> extern void start_barebox(void);
> +extern void handle_reserved(void);
>
> void main_entry(void);
>
> +unsigned long exception_handlers[32];
> +
> +static void set_except_vector(int n, void *addr)
> +{
> + unsigned handler = (unsigned long) addr;
> +
> + exception_handlers[n] = handler;
> +}
> +
> +static void trap_init(void)
> +{
> + extern char except_vec3_generic;
> + int i;
> +
> + unsigned long ebase;
> +
> + ebase = CKSEG1;
> +
> + /*
> + * Copy the generic exception handlers to their final destination.
> + * This will be overriden later as suitable for a particular
> + * configuration.
> + */
> + memcpy((void *)(ebase + 0x180), &except_vec3_generic, 0x80);
> +
> + /*
> + * Setup default vectors
> + */
> + for (i = 0; i <= 31; i++) {
> + set_except_vector(i, &handle_reserved);
> + }
> +
> + if (!cpu_has_4kex)
> + memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80);
> +
> + /* FIXME: handle tlb */
> + memcpy((void *)(ebase), &except_vec3_generic, 0x80);
> +
> + /* unset BOOT EXCEPTION VECTOR bit */
> + write_c0_status(read_c0_status() & ~ST0_BEV);
> +}
> +
> /**
> * Called plainly from assembler code
> *
> @@ -48,5 +93,7 @@ void main_entry(void)
> r4k_cache_init();
> }
>
> + trap_init();
> +
> start_barebox();
> }
> diff --git a/arch/mips/include/asm/addrspace.h
> b/arch/mips/include/asm/addrspace.h
> new file mode 100644
> index 000..17d480d
> --- /dev/null
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -0,0 +1,109 @@
> +/*
> + * This file is subject to the terms and conditions of the GNU General Public
> + * License. See the file "COPYING" in the main directory of this archive
> + * for more details.
> + *
> + * Copyright (C) 1996, 99 Ralf Baechle
> + * Copyright (C) 2000, 2002 Maciej W. Rozycki
> + * Copyright (C) 1990, 1999 by Silicon Graphics, Inc.
> + */
> +#ifndef _ASM_ADDRSPACE_H
> +#define _ASM_ADDRSPACE_H
> +
> +/*
> + * Configure language
> + */
> +#ifdef __ASSEMBLY__
> +#define _ATYPE_
> +#define _ATYPE32_
> +#define _ATYPE64_
> +#define _CONST64_(x) x
> +#else
> +#define _ATYPE_ __PTRDIFF_TYPE__
> +#define _ATYPE32_int
> +#define _ATYPE64___s64
> +#ifdef CONFIG_64BIT
> +#define _CONST64_(x) x ## L
> +#else
> +#define _CONST64_(x) x ## LL
> +#endif
> +#endif
> +
> +/*
> + * 32-bit MIPS address spaces
> + */
> +#ifdef __ASSEMBLY__
> +#define _ACAST32_
> +#define _ACAST64_
> +#else
> +#define _ACAST32_(_ATYPE_)(_ATYPE32_)/* widen if necessary */
> +#define _ACAST64_(_ATYPE64_) /* do _not_ narrow */
> +#endif
> +
> +/*
> + * Returns the kernel segment base of a given address
> + */
> +#define KSEGX(a) ((_ACAST32_(a)) & 0xe000)
> +
> +/*
> + * Returns the physical address of a CKSEGx / XKPHYS address
> + */
> +#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fff)
> +#define XPHYSADDR(a)((_ACAST64_(a)) &\
> + _CONST64_(0x00ff))
> +
> +#ifdef CONFIG_64BIT
> +
> +/*
> + * Memory segments (64bit kernel mode addresses)
> + * The compatibility segments use the full 64-bit sign extended value. Note
> + * the R8000 doesn't have them so don't reference these in generic MIPS code.
> + */
> +#define XKUSEG _CONST64_(0x)
> +#define XKSSEG _CONST64_(0x4000)
> +#define XKPHYS _CONST64_(0x
Re: [PATCH 2/3] net: GIANFAR driver
Hi Renaud,
comments inline.
> + * those we don't care about (unless zero is bad, in which case,
> + * choose a more appropriate value)
> + */
> +static void init_registers(void __iomem *regs)
Not really important, but could you add a gfar_ prefix consistently to
all functions?
> +{
> + out_be32(regs + GFAR_IEVENT_OFFSET, GFAR_IEVENT_INIT_CLEAR);
> +
> + out_be32(regs + GFAR_IMASK_OFFSET, GFAR_IMASK_INIT_CLEAR);
> +
> + out_be32(regs + GFAR_IADDR(0), 0);
> + out_be32(regs + GFAR_IADDR(1), 0);
> + out_be32(regs + GFAR_IADDR(2), 0);
> + out_be32(regs + GFAR_IADDR(3), 0);
> + out_be32(regs + GFAR_IADDR(4), 0);
> + out_be32(regs + GFAR_IADDR(5), 0);
> + out_be32(regs + GFAR_IADDR(6), 0);
> + out_be32(regs + GFAR_IADDR(7), 0);
> +
> + out_be32(regs + GFAR_GADDR(0), 0);
> + out_be32(regs + GFAR_GADDR(1), 0);
> + out_be32(regs + GFAR_GADDR(2), 0);
> + out_be32(regs + GFAR_GADDR(3), 0);
> + out_be32(regs + GFAR_GADDR(4), 0);
> + out_be32(regs + GFAR_GADDR(5), 0);
> + out_be32(regs + GFAR_GADDR(6), 0);
> + out_be32(regs + GFAR_GADDR(7), 0);
> +
> + out_be32(regs + GFAR_RCTRL_OFFSET, 0x);
> +
> + memset((void *)(regs + GFAR_TR64_OFFSET), 0,
> + GFAR_CAM2_OFFSET - GFAR_TR64_OFFSET);
> +
> + out_be32(regs + GFAR_CAM1_OFFSET, 0x);
> + out_be32(regs + GFAR_CAM2_OFFSET, 0x);
> +
> + out_be32(regs + GFAR_MRBLR_OFFSET, MRBLR_INIT_SETTINGS);
> +
> + out_be32(regs + GFAR_MINFLR_OFFSET, MINFLR_INIT_SETTINGS);
> +
> + out_be32(regs + GFAR_ATTR_OFFSET, ATTR_INIT_SETTINGS);
> + out_be32(regs + GFAR_ATTRELI_OFFSET, ATTRELI_INIT_SETTINGS);
> +}
> +
> +/*
> + * Configure maccfg2 based on negotiated speed and duplex
> + * reported by PHY handling code
> + */
> +static void adjust_link(struct eth_device *dev)
> +{
> + struct gfar_private *priv = (struct gfar_private *)dev->priv;
> + void __iomem *regs = priv->regs;
> + u32 ecntrl, maccfg2;
> + uint32_t status;
> +
> + status = miidev_get_status(&priv->miidev);
> +
> + priv->link = status & MIIDEV_STATUS_IS_UP;
> + if (status & MIIDEV_STATUS_IS_FULL_DUPLEX)
> + priv->duplexity = 1;
> + else
> + priv->duplexity = 0;
> +
> + if (status & MIIDEV_STATUS_IS_1000MBIT)
> + priv->speed = 1000;
> + else if (status & MIIDEV_STATUS_IS_100MBIT)
> + priv->speed = 100;
> + else
> + priv->speed = 10;
> +
> + if (priv->link) {
> + /* clear all bits relative with interface mode */
> + ecntrl = in_be32(regs + GFAR_ECNTRL_OFFSET);
> + ecntrl &= ~GFAR_ECNTRL_R100;
> +
> + maccfg2 = in_be32(regs + GFAR_MACCFG2_OFFSET);
> + maccfg2 &= ~(GFAR_MACCFG2_IF | GFAR_MACCFG2_FULL_DUPLEX);
> +
> + if (priv->duplexity != 0)
> + maccfg2 |= GFAR_MACCFG2_FULL_DUPLEX;
> + else
> + maccfg2 &= ~(GFAR_MACCFG2_FULL_DUPLEX);
> +
> + switch (priv->speed) {
> + case 1000:
> + maccfg2 |= GFAR_MACCFG2_GMII;
> + break;
> + case 100:
> + case 10:
> + maccfg2 |= GFAR_MACCFG2_MII;
> + /*
> + * Set R100 bit in all modes although
> + * it is only used in RGMII mode
> + */
> + if (priv->speed == 100)
> + ecntrl |= GFAR_ECNTRL_R100;
> + break;
> + default:
> + printf("%s: Speed was bad\n", dev->dev.name);
> + break;
> + }
> +
> + out_be32(regs + GFAR_ECNTRL_OFFSET, ecntrl);
> + out_be32(regs + GFAR_MACCFG2_OFFSET, maccfg2);
> +
> + printf("Speed: %d, %s duplex\n", priv->speed,
> +(priv->duplexity) ? "full" : "half");
> +
> + } else {
> + printf("%s: No link.\n", dev->dev.name);
> + }
> +}
> +
> +/* Stop the interface */
> +static void gfar_halt(struct eth_device *dev)
> +{
> + struct gfar_private *priv = (struct gfar_private *)dev->priv;
> + void __iomem *regs = priv->regs;
> + int value;
> +
> + clrbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
> + GFAR_DMACTRL_GTS);
> + setbits_be32(regs + GFAR_DMACTRL_OFFSET, GFAR_DMACTRL_GRS |
> + GFAR_DMACTRL_GTS);
> +
> + value = in_be32(regs + GFAR_IEVENT_OFFSET);
> + value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
> +
> + while (value != (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC)) {
> + value = in_be32(regs + GFAR_IEVENT_OFFSET);
> + value &= (GFAR_IEVENT_GRSC | GFAR_IEVENT_GTSC);
> + }
> +
> + clrbits_be32(regs + GFAR_MACCFG1_OFFSET,
> + GFAR_MACCFG1_TX_EN | GFAR_MACCFG1_RX_EN);
> +}
> +
> +/* Initia
Re: [PATCH 3/3] ppc: P2020RDB Ethernet configuration
On Wed, Jul 25, 2012 at 05:01:01PM +0100, Renaud Barbier wrote:
> Minimal support of the Ethernet interface on the P2020RDB board. Only
> the eTSEC3 interface is supported.
>
> Signed-off-by: Renaud Barbier
> ---
> arch/ppc/boards/freescale-p2020rdb/p2020rdb.c | 38
> +
> arch/ppc/configs/p2020rdb_defconfig |6
> 2 files changed, 44 insertions(+), 0 deletions(-)
>
> diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> index 20897cb..201220f 100644
> --- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> +++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c
> @@ -35,6 +35,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #define VSC7385_RST_SET 0x0008
> @@ -61,10 +62,47 @@
> #define SYSCLK_505000
> #define SYSCLK_100 1
>
> +/* Ethernet. Use eTSEC3 */
> +static struct gfar_info_struct gfar_info[] = {
> + {
> + .phyaddr = 1,
> + .tbiana = 0,
> + .tbicr = 0,
> + .flags = 0,
> + },
Please use tabs for indention.
> +};
> +
> +static int board_eth_init(int num, int idx)
> +{
> + struct resource *res;
> +
> + res = xzalloc(3 * sizeof(struct resource));
> + /* TSEC interface registers */
> + res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000);
> + res[0].end = res[0].start + 0x1000;
> + res[0].flags = IORESOURCE_MEM;
> + /* External PHY access always through eTSEC1 */
> + res[1].start = MDIO_BASE_ADDR;
> + res[1].end = res[1].start + 0x1000;
> + res[1].flags = IORESOURCE_MEM;
> + /* Access to TBI/RTBI interface. */
> + res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000);
> + res[2].end = res[2].start + 0x1000;
> + res[2].flags = IORESOURCE_MEM;
> +
> + add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3,
> + &gfar_info[idx]);
> +
> + return 0;
> +}
It's probably worth to make this a SoC specific function somewhere. It
could be used by other boards aswell, right?
Sascha
> +
> static int devices_init(void)
> {
> add_cfi_flash_device(-1, CFG_FLASH_BASE, 16 << 20, 0);
>
> + /* eTSEC3 */
> + board_eth_init(3, 0);
> +
> devfs_add_partition("nor0", 0xf8, 0x8, DEVFS_PARTITION_FIXED,
> "self0");
> return 0;
> diff --git a/arch/ppc/configs/p2020rdb_defconfig
> b/arch/ppc/configs/p2020rdb_defconfig
> index f8a0687..d025a40 100644
> --- a/arch/ppc/configs/p2020rdb_defconfig
> +++ b/arch/ppc/configs/p2020rdb_defconfig
> @@ -21,3 +21,9 @@ CONFIG_MALLOC_SIZE=0x20
> CONFIG_BAUDRATE=115200
> CONFIG_DRIVER_SERIAL_NS16550=y
> CONFIG_RELOCATABLE=y
> +CONFIG_DRIVER_NET_GIANFAR=y
> +CONFIG_NET=y
> +CONFIG_NET_PING=y
> +CONFIG_NET_TFTP=y
> +CONFIG_PING=y
> +CONFIG_TFTP=y
> --
> 1.7.1
>
>
> ___
> barebox mailing list
> barebox@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/barebox
>
--
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