[PATCH] commands: saveenv: Fix comment about directories in help text

2014-08-01 Thread Sascha Hauer 
envfs indeed handles directories, at least since 2007:

| commit 913691eccd13c1509470eb8b059aa0beecc6d8d8
| Author: Sascha Hauer s.ha...@pengutronix.de
| Date:   Tue Sep 25 12:58:52 2007 +0200
|
| add directory handling for environment

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 commands/saveenv.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/commands/saveenv.c b/commands/saveenv.c
index 31d6951..9da733e 100644
--- a/commands/saveenv.c
+++ b/commands/saveenv.c
@@ -60,8 +60,7 @@ BAREBOX_CMD_HELP_TEXT(Save the files in DIRECTORY to the 
persistent storage dev
 BAREBOX_CMD_HELP_TEXT()
 BAREBOX_CMD_HELP_TEXT(ENVFS is usually a block in flash but can be any other 
file. If)
 BAREBOX_CMD_HELP_TEXT(omitted, DIRECTORY defaults to /env and ENVFS defaults 
to)
-BAREBOX_CMD_HELP_TEXT(/dev/env0. Note that envfs can only handle files, 
directories are being)
-BAREBOX_CMD_HELP_TEXT(skipped silently.)
+BAREBOX_CMD_HELP_TEXT(/dev/env0.)
 BAREBOX_CMD_HELP_OPT (-z,  force the built-in default environment at 
startup)
 
 BAREBOX_CMD_HELP_END
-- 
2.0.1


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[PATCH] of_partition: devfs_add_partition returns an error pointer

2014-08-01 Thread Sascha Hauer 
Check for the return value of devfs_add_partition with IS_ERR.
Otherwise we dereference a NULL pointer when devfs_add_partition
fails.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 drivers/of/partition.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/of/partition.c b/drivers/of/partition.c
index e2ddec5..3dce844 100644
--- a/drivers/of/partition.c
+++ b/drivers/of/partition.c
@@ -21,6 +21,7 @@
 #include of.h
 #include malloc.h
 #include linux/mtd/mtd.h
+#include linux/err.h
 #include nand.h
 
 struct cdev *of_parse_partition(struct cdev *cdev, struct device_node *node)
@@ -60,6 +61,9 @@ struct cdev *of_parse_partition(struct cdev *cdev, struct 
device_node *node)
filename = asprintf(%s.%s, cdev-name, partname);
 
new = devfs_add_partition(cdev-name, offset, size, flags, filename);
+   if (IS_ERR(new))
+   new = NULL;
+
if (new  new-dev)
new-dev-device_node = node;
 
-- 
2.0.1


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Re: [PATCH] commands: saveenv: Fix comment about directories in help text

2014-08-01 Thread Alexander Aring 
Hi Sascha,

On Fri, Aug 01, 2014 at 08:17:10AM +0200, Sascha Hauer wrote:
 envfs indeed handles directories, at least since 2007:
 
 | commit 913691eccd13c1509470eb8b059aa0beecc6d8d8
 | Author: Sascha Hauer s.ha...@pengutronix.de
 | Date:   Tue Sep 25 12:58:52 2007 +0200
 |
 | add directory handling for environment
 
 Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
 ---
  commands/saveenv.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/commands/saveenv.c b/commands/saveenv.c
 index 31d6951..9da733e 100644
 --- a/commands/saveenv.c
 +++ b/commands/saveenv.c
 @@ -60,8 +60,7 @@ BAREBOX_CMD_HELP_TEXT(Save the files in DIRECTORY to the 
 persistent storage dev
  BAREBOX_CMD_HELP_TEXT()
  BAREBOX_CMD_HELP_TEXT(ENVFS is usually a block in flash but can be any 
 other file. If)
  BAREBOX_CMD_HELP_TEXT(omitted, DIRECTORY defaults to /env and ENVFS 
 defaults to)
 -BAREBOX_CMD_HELP_TEXT(/dev/env0. Note that envfs can only handle files, 
 directories are being)
 -BAREBOX_CMD_HELP_TEXT(skipped silently.)
 +BAREBOX_CMD_HELP_TEXT(/dev/env0.)

but envfs can't handle directories which are empty while saving? :-)
Maybe we should add this as note or support empty directories.

- Alex

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[PATCH v2] commands: of_dump switch to get fixed devictree

2014-08-01 Thread Jan Weitzel 
Add a switch to get the devicetree processed by the registered fixups.
This is also whats the kernel gets.

Signed-off-by: Jan Weitzel j.weit...@phytec.de
---
v2: fix CMD OPS

 commands/of_dump.c |   12 ++--
 1 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/commands/of_dump.c b/commands/of_dump.c
index cafde07..1b487c7 100644
--- a/commands/of_dump.c
+++ b/commands/of_dump.c
@@ -34,16 +34,20 @@ static int do_of_dump(int argc, char *argv[])
 {
int opt;
int ret;
+   int fix = 0;
struct device_node *root = NULL, *node, *of_free = NULL;
char *dtbfile = NULL;
size_t size;
const char *nodename;
 
-   while ((opt = getopt(argc, argv, f:))  0) {
+   while ((opt = getopt(argc, argv, Ff:))  0) {
switch (opt) {
case 'f':
dtbfile = optarg;
break;
+   case 'F':
+   fix = 1;
+   break;
default:
return COMMAND_ERROR_USAGE;
}
@@ -77,6 +81,9 @@ static int do_of_dump(int argc, char *argv[])
root = of_get_root_node();
}
 
+   if (fix)
+   of_get_fixed_tree(root);
+
node = of_find_node_by_path_or_alias(root, nodename);
if (!node) {
printf(Cannot find nodepath %s\n, nodename);
@@ -96,12 +103,13 @@ out:
 BAREBOX_CMD_HELP_START(of_dump)
 BAREBOX_CMD_HELP_TEXT(Options:)
 BAREBOX_CMD_HELP_OPT  (-f dtb,  work on dtb instead of internal 
devicetree\n)
+BAREBOX_CMD_HELP_OPT  (-F,  return fixed devicetree\n)
 BAREBOX_CMD_HELP_END
 
 BAREBOX_CMD_START(of_dump)
.cmd= do_of_dump,
BAREBOX_CMD_DESC(dump devicetree nodes)
-   BAREBOX_CMD_OPTS([-f] [NODE])
+   BAREBOX_CMD_OPTS([-fF] [NODE])
BAREBOX_CMD_GROUP(CMD_GRP_MISC)
BAREBOX_CMD_COMPLETE(devicetree_file_complete)
BAREBOX_CMD_HELP(cmd_of_dump_help)
-- 
1.7.0.4


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[PATCH] ARM: atmel: sama5d3_xplained: import smc timing from U-Boot

2014-08-01 Thread Bo Shen 
From: Matteo Fortini matteo.fort...@gmail.com

The configuration for NAND has been aligned with values
from U-Boot and completed with TIMINGS initialization

Signed-off-by: Matteo Fortini matteo.fort...@gmail.com
[voice.s...@atmel.com: apply this patch from Matteo Fortini for
   sama5d3xek to sama5d3_xplained board]
Signed-off-by: Bo Shen voice.s...@atmel.com
---
 arch/arm/boards/sama5d3_xplained/init.c | 29 +++--
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/arch/arm/boards/sama5d3_xplained/init.c 
b/arch/arm/boards/sama5d3_xplained/init.c
index ae18863..5674225 100644
--- a/arch/arm/boards/sama5d3_xplained/init.c
+++ b/arch/arm/boards/sama5d3_xplained/init.c
@@ -57,21 +57,30 @@ static struct atmel_nand_data nand_pdata = {
 };
 
 static struct sam9_smc_config sama5d3_xplained_nand_smc_config = {
-   .ncs_read_setup = 0,
-   .nrd_setup  = 1,
-   .ncs_write_setup= 0,
-   .nwe_setup  = 1,
+   .ncs_read_setup = 1,
+   .nrd_setup  = 2,
+   .ncs_write_setup= 1,
+   .nwe_setup  = 2,
 
-   .ncs_read_pulse = 6,
-   .nrd_pulse  = 4,
+   .ncs_read_pulse = 5,
+   .nrd_pulse  = 3,
.ncs_write_pulse= 5,
.nwe_pulse  = 3,
 
-   .read_cycle = 6,
-   .write_cycle= 5,
+   .read_cycle = 8,
+   .write_cycle= 8,
 
.mode   = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | 
AT91_SMC_EXNWMODE_DISABLE,
-   .tdf_cycles = 1,
+   .tdf_cycles = 3,
+
+   .tclr   = 3,
+   .tadl   = 10,
+   .tar= 3,
+   .ocms   = 0,
+   .trr= 4,
+   .twb= 5,
+   .rbnsel = 3,
+   .nfsel  = 1
 };
 
 static void ek_add_device_nand(void)
@@ -87,7 +96,7 @@ static void ek_add_device_nand(void)
sama5d3_xplained_nand_smc_config.mode |= AT91_SMC_DBW_8;
 
/* configure chip-select 3 (NAND) */
-   sam9_smc_configure(0, 3, sama5d3_xplained_nand_smc_config);
+   sama5_smc_configure(0, 3, cm_nand_smc_config);
 
at91_add_device_nand(nand_pdata);
 }
-- 
1.8.5.2


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[PATCH] Makefile: remove drivers/serial/Makefile.rej file

2014-08-01 Thread Bo Shen 
This file is introduced by commit: 949df9c
Remove it.

Signed-off-by: Bo Shen voice.s...@atmel.com
---
This patch is base on the next branch.

 drivers/serial/Makefile.rej | 7 ---
 1 file changed, 7 deletions(-)
 delete mode 100644 drivers/serial/Makefile.rej

diff --git a/drivers/serial/Makefile.rej b/drivers/serial/Makefile.rej
deleted file mode 100644
index 3c4cd01..000
--- a/drivers/serial/Makefile.rej
+++ /dev/null
@@ -1,7 +0,0 @@
 drivers/serial/Makefile
-+++ drivers/serial/Makefile
-@@ -19,3 +19,4 @@
- obj-$(CONFIG_DRIVER_SERIAL_AUART) += serial_auart.o
- obj-$(CONFIG_DRIVER_SERIAL_CADENCE)   += serial_cadence.o
- obj-$(CONFIG_DRIVER_SERIAL_EFI_STDIO) += efi-stdio.o
-+obj-$(CONFIG_DRIVER_SERIAL_DIGIC) += serial_digic.o
-- 
1.8.5.2


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[PATCH] fixup! Add support for metadata in barebox images

2014-08-01 Thread Jan Luebbe 
stat() and mmap() don't work on MTD devices, so use lseek() and read()
instead.

Signed-off-by: Jan Luebbe j...@pengutronix.de
---
 scripts/bareboximd.c | 61 +++-
 1 file changed, 46 insertions(+), 15 deletions(-)

diff --git a/scripts/bareboximd.c b/scripts/bareboximd.c
index 1bd98e1d3c4f..6855b5874c28 100644
--- a/scripts/bareboximd.c
+++ b/scripts/bareboximd.c
@@ -57,38 +57,69 @@ int imd_command_setenv(const char *variable_name, const 
char *value)
 
 static int read_file_2(const char *filename, size_t *size, void **outbuf, 
loff_t max_size)
 {
-   struct stat s;
+   off_t fsize;
+   ssize_t rsize;
int ret, fd;
void *buf;
 
*size = 0;
*outbuf = NULL;
 
-   ret = stat(filename, s);
-   if (ret) {
+   fd = open(filename, O_RDONLY);
+   if (fd  0) {
fprintf(stderr, Cannot open %s: %s\n, filename, 
strerror(errno));
return -errno;
}
 
-   fd = open(filename, O_RDONLY);
-   if (fd  0) {
-   fprintf(stderr, Cannot open %s: %s\n, filename, 
strerror(-ret));
-   return -errno;
+   fsize = lseek(fd, 0, SEEK_END);
+   if (fsize == -1) {
+   fprintf(stderr, Cannot get size %s: %s\n, filename, 
strerror(errno));
+   ret = -errno;
+   goto close;
}
 
-   if (s.st_size  max_size)
-   max_size = s.st_size;
+   if (fsize  max_size)
+   max_size = fsize;
 
-   buf = mmap(NULL, max_size, PROT_READ, MAP_PRIVATE, fd, 0);
-   if (buf == MAP_FAILED) {
-   close(fd);
-   return -errno;
+   if (lseek(fd, 0, SEEK_SET) == -1) {
+   fprintf(stderr, Cannot seek to start %s: %s\n, filename, 
strerror(errno));
+   ret = -errno;
+   goto close;
+   }
+
+   buf = malloc(max_size);
+   if (!buf) {
+   fprintf(stderr, Cannot allocate memory\n);
+   ret = -ENOMEM;
+   goto close;
}
 
*outbuf = buf;
-   *size = max_size;
+   while (*size  max_size) {
+   rsize = read(fd, buf, max_size-*size);
+   if (rsize == 0) {
+   ret = -EIO;
+   goto free;
+   } else if (rsize  0) {
+   if (errno == EAGAIN)
+   continue;
+   else {
+   ret = -errno;
+   goto free;
+   }
+   } /* ret  0 */
+   buf += rsize;
+   *size += rsize;
+   }
 
-   return 0;
+   ret = 0;
+   goto close;
+free:
+   *outbuf = NULL;
+   free(buf);
+close:
+   close(fd);
+   return ret;
 }
 
 static unsigned long simple_strtoul(const char *cp, char **endp, unsigned int 
base)
-- 
2.0.1


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'commands: add hwclock' partially apllied!

2014-08-01 Thread Antony Pavlov 
Sascha!

I have just got recent barebox 'next' branch with this commit:

commit 7154e7cdb970a1ff4a7105daf57fc92ff4b8e63c
Author: Antony Pavlov antonynpav...@gmail.com
Date:   Wed Jul 30 00:10:20 2014 +0400

commands: add hwclock

The hwclock command allows to query or set the hardware clock (RTC).

Barebox' 'hwclock' command uses busybox' 'date' compatible
time format ccyymmddHHMM[.SS]:

  # /bin/busybox date -s 201407292005.41 ; /bin/date
  Tue Jul 29 20:05:41 MSK 2014
  Tue Jul 29 20:05:41 MSK 2014

Signed-off-by: Antony Pavlov antonynpav...@gmail.com
Signed-off-by: Sascha Hauer s.ha...@pengutronix.de

 commands/Kconfig  | 8 
 commands/Makefile | 1 +
2 files changed, 9 insertions(+)

This commit miss  commands/hwclock.c  file.

-- 
Best regards,
  Antony Pavlov

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[PATCH] fixup! ARM: add Canon A1100 ROM image generation

2014-08-01 Thread Antony Pavlov 
Signed-off-by: Antony Pavlov antonynpav...@gmail.com
---
 scripts/canon-a1100-image | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 mode change 100644 = 100755 scripts/canon-a1100-image

diff --git a/scripts/canon-a1100-image b/scripts/canon-a1100-image
old mode 100644
new mode 100755
-- 
2.0.1


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[PATCH 1/2] i2c: at91: add support of device tree

2014-08-01 Thread Raphaël Poggi 
Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/i2c/busses/i2c-at91.c |   60 +++--
 1 file changed, 52 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 4aa4e4e..944a8b3 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -373,20 +373,63 @@ static struct platform_device_id at91_twi_devtypes[] = {
}
 };
 
+static struct of_device_id at91_twi_dt_ids[] = {
+   {
+   .compatible = atmel,at91rm9200-i2c,
+   .data = (unsigned long) at91rm9200_config,
+   } , {
+   .compatible = atmel,at91sam9260-i2c,
+   .data = (unsigned long) at91sam9260_config,
+   } , {
+   .compatible = atmel,at91sam9261-i2c,
+   .data = (unsigned long) at91sam9261_config,
+   } , {
+   .compatible = atmel,at91sam9g20-i2c,
+   .data = (unsigned long) at91sam9g20_config,
+   } , {
+   .compatible = atmel,at91sam9g10-i2c,
+   .data = (unsigned long) at91sam9g10_config,
+   }, {
+   .compatible = atmel,at91sam9x5-i2c,
+   .data = (unsigned long) at91sam9x5_config,
+   }, {
+   /* sentinel */
+   }
+};
+
+static struct at91_twi_pdata *at91_twi_get_driver_data(struct device_d *dev)
+{
+struct at91_twi_pdata *i2c_data = NULL;
+int rc;
+
+if (dev-device_node) {
+   const struct of_device_id *match;
+   match = of_match_node(at91_twi_dt_ids, dev-device_node);
+   if (!match)
+   i2c_data = NULL;
+   else
+   i2c_data = (struct at91_twi_pdata *)match-data;
+}
+else {
+   rc = dev_get_drvdata(dev, (unsigned long *)i2c_data);
+   if (rc)
+   i2c_data = NULL;
+}
+
+return i2c_data;
+}
+
 static int at91_twi_probe(struct device_d *dev)
 {
struct at91_twi_dev *i2c_at91;
-   struct at91_twi_pdata *i2c_data;
-   int rc;
+   int rc = 0;
u32 bus_clk_rate;
 
i2c_at91 = xzalloc(sizeof(struct at91_twi_dev));
 
-   rc = dev_get_drvdata(dev, (unsigned long *)i2c_data);
-   if (rc)
-   goto out_free;
-
-   i2c_at91-pdata = i2c_data;
+   i2c_at91-pdata = at91_twi_get_driver_data(dev);
+   if (!i2c_at91-pdata)
+   goto out_free;
 
i2c_at91-base = dev_request_mem_region(dev, 0);
if (!i2c_at91-base) {
@@ -395,7 +438,7 @@ static int at91_twi_probe(struct device_d *dev)
goto out_free;
}
 
-   i2c_at91-clk = clk_get(dev, twi_clk);
+   i2c_at91-clk = clk_get(dev, NULL);
if (IS_ERR(i2c_at91-clk)) {
dev_err(dev, no clock defined\n);
rc = -ENODEV;
@@ -435,6 +478,7 @@ static struct driver_d at91_twi_driver = {
.name   = at91-twi,
.probe  = at91_twi_probe,
.id_table   = at91_twi_devtypes,
+   .of_compatible  = DRV_OF_COMPAT(at91_twi_dt_ids),
 };
 device_platform_driver(at91_twi_driver);
 
-- 
1.7.9.5


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[PATCH 2/2] at91sam9g45: clock: add i2c clocks

2014-08-01 Thread Raphaël Poggi 
Add the device tree and non device tree at91 i2c clocks.

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 arch/arm/mach-at91/at91sam9g45.c |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index f6031f0..d0f950c 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -192,6 +192,10 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_DEV_ID(mci_clk, atmel_mci1, mmc1_clk),
CLKDEV_CON_DEV_ID(spi_clk, atmel_spi0, spi0_clk),
CLKDEV_CON_DEV_ID(spi_clk, atmel_spi1, spi1_clk),
+   CLKDEV_CON_DEV_ID(NULL, at91-twi0, twi0_clk),
+   CLKDEV_CON_DEV_ID(NULL, at91-twi1, twi1_clk),
+   CLKDEV_CON_DEV_ID(NULL, fff84000.i2c, twi0_clk),
+   CLKDEV_CON_DEV_ID(NULL, fff88000.i2c, twi1_clk),
CLKDEV_DEV_ID(at91rm9200-gpio0, pioA_clk),
CLKDEV_DEV_ID(at91rm9200-gpio1, pioB_clk),
CLKDEV_DEV_ID(at91rm9200-gpio2, pioC_clk),
-- 
1.7.9.5


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[PATCH 0/2] Add device tree support of i2c Atmel driver

2014-08-01 Thread Raphaël Poggi 
This patcheset adds the device tree support for i2c Atmel driver and the 
corresping clocks
for the at91sam9g45 device.

Raphaël Poggi (2) :
(1) i2c: at91: add support of device tree
(2) at91sam9g45: clock: add i2c clocks

arch/arm/mach-at91/at91sam9g45.c |4 +++
drivers/i2c/busses/i2c-at91.c|   60 +-
2 files changed, 56 insertions(+), 8 deletions(-)


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[PATCH 3/5] board: atmel: initialise the has_pmecc member

2014-08-01 Thread Raphaël Poggi 
---
 arch/arm/boards/at91sam9n12ek/init.c|1 +
 arch/arm/boards/at91sam9x5ek/init.c |1 +
 arch/arm/boards/sama5d3_xplained/init.c |1 +
 arch/arm/boards/sama5d3xek/init.c   |1 +
 4 files changed, 4 insertions(+)

diff --git a/arch/arm/boards/at91sam9n12ek/init.c 
b/arch/arm/boards/at91sam9n12ek/init.c
index a206d6b..818a598 100644
--- a/arch/arm/boards/at91sam9n12ek/init.c
+++ b/arch/arm/boards/at91sam9n12ek/init.c
@@ -47,6 +47,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PD5,
.enable_pin = AT91_PIN_PD4,
+   .has_pmecc  = 1,
.ecc_mode   = NAND_ECC_HW,
.pmecc_sector_size = 512,
.pmecc_corr_cap = 2,
diff --git a/arch/arm/boards/at91sam9x5ek/init.c 
b/arch/arm/boards/at91sam9x5ek/init.c
index 62e5652..183ddc7 100644
--- a/arch/arm/boards/at91sam9x5ek/init.c
+++ b/arch/arm/boards/at91sam9x5ek/init.c
@@ -57,6 +57,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PD5,
.enable_pin = AT91_PIN_PD4,
+   .has_pmecc  = 1,
.ecc_mode   = NAND_ECC_HW,
.pmecc_sector_size = 512,
.pmecc_corr_cap = 2,
diff --git a/arch/arm/boards/sama5d3_xplained/init.c 
b/arch/arm/boards/sama5d3_xplained/init.c
index ae18863..b182802 100644
--- a/arch/arm/boards/sama5d3_xplained/init.c
+++ b/arch/arm/boards/sama5d3_xplained/init.c
@@ -48,6 +48,7 @@ static struct atmel_nand_data nand_pdata = {
.rdy_pin= -EINVAL,
.enable_pin = -EINVAL,
.ecc_mode   = NAND_ECC_HW,
+   .has_pmecc  = 1,
.pmecc_sector_size = 512,
.pmecc_corr_cap = 4,
 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
diff --git a/arch/arm/boards/sama5d3xek/init.c 
b/arch/arm/boards/sama5d3xek/init.c
index 743197f..49d2b37 100644
--- a/arch/arm/boards/sama5d3xek/init.c
+++ b/arch/arm/boards/sama5d3xek/init.c
@@ -63,6 +63,7 @@ static struct atmel_nand_data nand_pdata = {
.rdy_pin= -EINVAL,
.enable_pin = -EINVAL,
.ecc_mode   = NAND_ECC_HW,
+   .has_pmecc  = 1,
.pmecc_sector_size = 512,
.pmecc_corr_cap = 4,
 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
-- 
1.7.9.5


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[PATCH 0/5] Add device tree support of Atmel NAND driver

2014-08-01 Thread Raphaël Poggi 
This patchset adds the device tree support for the Atmel NAND driver.

The first patch adds the device tree in the atmel_nand driver.

The second patch removes the NAND_ATMEL_PMECC config. With this removal
we can manage in a better way the device tree / non device tree probing of the 
driver, because the plateform data
and device tree share the same structure member and logics.

The third patch adds the has_pmecc on boards which need it.

The fourth patch retrieves the ecc_mode from the plateform data and remove this 
code:

nand_chip-ecc.mode = NAND_ECC_SOFT;

which arbitrary sets the ecc.mode to NAND_ECC_SOFT and changes the value 
depending of the config and plateform data.
With this, we can use the same logics for device tree and non device tree 
probing of the driver.

The fifth patch adds the ecc_mode on boards which are missing it (boards which 
use NAND_ECC_SOFT).

Raphaël Poggi (5) :
(1) mtd: atmel_nand: add support for device tree
(2) mtd: nand: remove NAND_ATMEL_PMECC
(3) board: atmel: initialise the has_pmecc member
(4) mtd: atmel_nand: retrieve ecc_mode from pdata
(5) board: atmel: initialise ecc_mode


 arch/arm/boards/at91sam9260ek/init.c|1 +
 arch/arm/boards/at91sam9261ek/init.c|1 +
 arch/arm/boards/at91sam9263ek/init.c|1 +
 arch/arm/boards/at91sam9m10g45ek/init.c |1 +
 arch/arm/boards/at91sam9m10ihd/init.c   |1 +
 arch/arm/boards/at91sam9n12ek/init.c|1 +
 arch/arm/boards/at91sam9x5ek/init.c |1 +
 arch/arm/boards/sama5d3_xplained/init.c |1 +
 arch/arm/boards/sama5d3xek/init.c   |1 +
 arch/arm/mach-at91/include/mach/board.h |1 +
 drivers/mtd/nand/Kconfig|8 ---
 drivers/mtd/nand/atmel_nand.c   |  112 ++-
 12 files changed, 119 insertions(+), 11 deletions(-)


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[PATCH 2/5] mtd: nand: remove NAND_ATMEL_PMECC

2014-08-01 Thread Raphaël Poggi 
By removing this CONFIG_, we can use a structure member to retrieve the config,
either through the plateform data or through the device tree. So we can handle 
cases
when the driver is probed using device tree or not.

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 arch/arm/mach-at91/include/mach/board.h |1 +
 drivers/mtd/nand/Kconfig|8 
 drivers/mtd/nand/atmel_nand.c   |2 +-
 3 files changed, 2 insertions(+), 9 deletions(-)

diff --git a/arch/arm/mach-at91/include/mach/board.h 
b/arch/arm/mach-at91/include/mach/board.h
index aa0fdae..e2307ed 100644
--- a/arch/arm/mach-at91/include/mach/board.h
+++ b/arch/arm/mach-at91/include/mach/board.h
@@ -63,6 +63,7 @@ struct atmel_nand_data {
u8  bus_width_16;   /* buswidth is 16 bit */
u8  ecc_mode;   /* NAND_ECC_* */
u8  on_flash_bbt;   /* Use flash based bbt */
+   u8  has_pmecc;  /* Use PMECC */
u8  bus_on_d0;
 
u8  pmecc_corr_cap;
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 04fe3c8..d49eae3 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -95,14 +95,6 @@ config NAND_ATMEL
prompt Atmel (AT91SAM9xxx) NAND driver
depends on ARCH_AT91
 
-config NAND_ATMEL_PMECC
-   bool
-   prompt PMECC support
-   depends on NAND_ATMEL
-   select NAND_ECC_HW
-   help
- Support for PMECC present on the SoC sam9x5 and sam9n12
-
 config NAND_S3C24XX
bool
prompt Samsung S3C24XX NAND driver
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index b7b0e3a..eba7125 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1319,7 +1319,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
 
if (IS_ENABLED(CONFIG_NAND_ECC_HW) 
nand_chip-ecc.mode == NAND_ECC_HW) {
-   if (IS_ENABLED(CONFIG_NAND_ATMEL_PMECC))
+   if (pdata-has_pmecc)
res = atmel_pmecc_nand_init_params(dev, host);
else
res = atmel_hw_nand_init_params(dev, host);
-- 
1.7.9.5


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[PATCH 5/5] board: atmel: initialise ecc_mode

2014-08-01 Thread Raphaël Poggi 
This commit initialise the ecc_mode (NAND_ECC_SOFT) on atmel board init which 
missing it.

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 arch/arm/boards/at91sam9260ek/init.c|1 +
 arch/arm/boards/at91sam9261ek/init.c|1 +
 arch/arm/boards/at91sam9263ek/init.c|1 +
 arch/arm/boards/at91sam9m10g45ek/init.c |1 +
 arch/arm/boards/at91sam9m10ihd/init.c   |1 +
 5 files changed, 5 insertions(+)

diff --git a/arch/arm/boards/at91sam9260ek/init.c 
b/arch/arm/boards/at91sam9260ek/init.c
index 1298dde..76e0195 100644
--- a/arch/arm/boards/at91sam9260ek/init.c
+++ b/arch/arm/boards/at91sam9260ek/init.c
@@ -51,6 +51,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PC13,
.enable_pin = AT91_PIN_PC14,
+   .ecc_mode   = NAND_ECC_SOFT,
.on_flash_bbt   = 1,
 };
 
diff --git a/arch/arm/boards/at91sam9261ek/init.c 
b/arch/arm/boards/at91sam9261ek/init.c
index 9ebc16a..7b8ce98 100644
--- a/arch/arm/boards/at91sam9261ek/init.c
+++ b/arch/arm/boards/at91sam9261ek/init.c
@@ -46,6 +46,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PC15,
.enable_pin = AT91_PIN_PC14,
+   .ecc_mode   = NAND_ECC_SOFT,
 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
.bus_width_16   = 1,
 #else
diff --git a/arch/arm/boards/at91sam9263ek/init.c 
b/arch/arm/boards/at91sam9263ek/init.c
index 889b4c2..c8a9d5c 100644
--- a/arch/arm/boards/at91sam9263ek/init.c
+++ b/arch/arm/boards/at91sam9263ek/init.c
@@ -43,6 +43,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PA22,
.enable_pin = AT91_PIN_PD15,
+   .ecc_mode   = NAND_ECC_SOFT,
 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
.bus_width_16   = 1,
 #else
diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c 
b/arch/arm/boards/at91sam9m10g45ek/init.c
index 6503ebb..cdd7806 100644
--- a/arch/arm/boards/at91sam9m10g45ek/init.c
+++ b/arch/arm/boards/at91sam9m10g45ek/init.c
@@ -67,6 +67,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PC8,
.enable_pin = AT91_PIN_PC14,
+   .ecc_mode   = NAND_ECC_SOFT,
 #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16)
.bus_width_16   = 1,
 #else
diff --git a/arch/arm/boards/at91sam9m10ihd/init.c 
b/arch/arm/boards/at91sam9m10ihd/init.c
index fc37af4..a432e5c 100644
--- a/arch/arm/boards/at91sam9m10ihd/init.c
+++ b/arch/arm/boards/at91sam9m10ihd/init.c
@@ -44,6 +44,7 @@ static struct atmel_nand_data nand_pdata = {
.det_pin= -EINVAL,
.rdy_pin= AT91_PIN_PC15,
.enable_pin = AT91_PIN_PC14,
+   .ecc_mode   = NAND_ECC_SOFT,
.bus_width_16   = 0,
.on_flash_bbt   = 1,
 };
-- 
1.7.9.5


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[PATCH 1/5] mtd: atmel_nand: add support for device tree

2014-08-01 Thread Raphaël Poggi 
Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/mtd/nand/atmel_nand.c |  108 -
 1 file changed, 107 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 337e225..b7b0e3a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -28,6 +28,10 @@
 #include init.h
 #include gpio.h
 
+#include of.h
+#include of_gpio.h
+#include of_mtd.h
+
 #include linux/mtd/mtd.h
 #include linux/mtd/nand.h
 
@@ -1038,6 +1042,89 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int 
mode)
 #endif
 }
 
+static int atmel_nand_of_init(struct atmel_nand_host *host, struct device_node 
*np)
+{
+   u32 val;
+   u32 offset[2];
+   int ecc_mode;
+   struct atmel_nand_data *board = host-board;
+   enum of_gpio_flags flags = 0;
+
+   if (of_property_read_u32(np, atmel,nand-addr-offset, val) == 0) {
+  if (val = 32) {
+   dev_err(host-dev, invalid addr-offset %u\n, val);
+   return -EINVAL;
+   }
+   board-ale = val;
+   }
+
+   if (of_property_read_u32(np, atmel,nand-cmd-offset, val) == 0) {
+   if (val = 32) {
+   dev_err(host-dev, invalid cmd-offset %u\n, val);
+   return -EINVAL;
+   }
+   board-cle = val;
+   }
+
+   ecc_mode = of_get_nand_ecc_mode(np);
+
+   board-ecc_mode = ecc_mode  0 ? NAND_ECC_SOFT : ecc_mode;
+
+   board-on_flash_bbt = of_get_nand_on_flash_bbt(np);
+
+   if (of_get_nand_bus_width(np) == 16)
+   board-bus_width_16 = 1;
+
+   board-rdy_pin = of_get_gpio_flags(np, 0, flags);
+   board-enable_pin = of_get_gpio(np, 1);
+   board-det_pin = of_get_gpio(np, 2);
+
+   board-has_pmecc = of_property_read_bool(np, atmel,has-pmecc);
+
+   if (!(board-ecc_mode == NAND_ECC_HW) || !board-has_pmecc)
+   return 0;   /* Not using PMECC */
+
+   /* use PMECC, get correction capability, sector size and lookup
+   * table offset.
+   * If correction bits and sector size are not specified, then
+   *   find
+   * them from NAND ONFI parameters.
+   */
+   if (of_property_read_u32(np, atmel,pmecc-cap, val) == 0) {
+   if ((val != 2)  (val != 4)  (val != 8)  (val != 12)  (val 
!= 24)) {
+   dev_err(host-dev, Unsupported PMECC correction capability: %d
+should be 2, 4, 8, 12 or 24\n, val);
+   return -EINVAL;
+   }
+
+   board-pmecc_corr_cap = (u8)val;
+   }
+
+   if (of_property_read_u32(np, atmel,pmecc-sector-size, val) == 0) {
+   if ((val != 512)  (val != 1024)) {
+   dev_err(host-dev, Unsupported PMECC sector size: %d
+should be 512 or 1024 bytes\n, val);
+   return -EINVAL;
+   }
+
+   board-pmecc_sector_size = (u16)val;
+   }
+
+   if (of_property_read_u32_array(np, atmel,pmecc-lookup-table-offset, 
offset, 2) != 0) {
+   dev_err(host-dev, Cannot get PMECC lookup table offset\n);
+   return -EINVAL;
+   }
+
+   if (!offset[0]  !offset[1]) {
+   dev_err(host-dev, Invalid PMECC lookup table offset\n);
+   return -EINVAL;
+   }
+
+   board-pmecc_lookup_table_offset = (board-pmecc_sector_size == 512) ? 
offset[0] : offset[1];
+
+   return 0;
+}
+
 static int atmel_hw_nand_init_params(struct device_d *dev,
 struct atmel_nand_host *host)
 {
@@ -1093,7 +1180,7 @@ static int atmel_hw_nand_init_params(struct device_d *dev,
  */
 static int __init atmel_nand_probe(struct device_d *dev)
 {
-   struct atmel_nand_data *pdata = dev-platform_data;
+   struct atmel_nand_data *pdata;
struct atmel_nand_host *host;
struct mtd_info *mtd;
struct nand_chip *nand_chip;
@@ -1104,6 +1191,10 @@ static int __init atmel_nand_probe(struct device_d *dev)
if (!host)
return -ENOMEM;
 
+   pdata = kzalloc(sizeof(struct atmel_nand_data), GFP_KERNEL);
+   if (!pdata)
+   return -ENOMEM;
+
host-io_base = dev_request_mem_region(dev, 0);
 
mtd = host-mtd;
@@ -,6 +1202,15 @@ static int __init atmel_nand_probe(struct device_d *dev)
host-board = pdata;
host-dev = dev;
 
+   if (dev-device_node) {
+   res = atmel_nand_of_init(host, dev-device_node);
+   if (res)
+   goto err_no_card;
+   }
+   else {
+   pdata = dev-platform_data;
+   }
+
nand_chip-priv = host; /* link the private data structures */
mtd-priv = nand_chip;
mtd-parent = dev;
@@ -1249,9 +1349,15 @@ err_no_card:
return res;
 }
 
+static struct of_device_id atmel_nand_dt_ids[] = {
+{ .compatible = atmel,at91rm9200-nand },
+{ /* sentinel */ }
+}
+;
 static struct driver_d atmel_nand_driver = {

[PATCH 4/5] mtd: atmel_nand: retrieve ecc_mode from pdata

2014-08-01 Thread Raphaël Poggi 
By retrieving the ecc_mode from pdata we can use the same code for device tree 
and
non device tree probing. Which was not possible before, because ecc_mode was 
arbitrarily set to
NAND_ECC_SOFT.

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/mtd/nand/atmel_nand.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index eba7125..82bee92 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1208,7 +1208,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
goto err_no_card;
}
else {
-   pdata = dev-platform_data;
+   memcpy(host-board, dev-platform_data, sizeof(struct 
atmel_nand_data));
}
 
nand_chip-priv = host; /* link the private data structures */
@@ -1257,7 +1257,7 @@ static int __init atmel_nand_probe(struct device_d *dev)
}
}
 
-   nand_chip-ecc.mode = NAND_ECC_SOFT;
+   nand_chip-ecc.mode = pdata-ecc_mode;
 
if (IS_ENABLED(CONFIG_NAND_ECC_HW) 
pdata-ecc_mode == NAND_ECC_HW) {
-- 
1.7.9.5


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[PATCH 2/2] at91sam9g45: add device tree gpio clocks

2014-08-01 Thread Raphaël Poggi 
Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 arch/arm/mach-at91/at91sam9g45.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 9a50deb..f6031f0 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -197,6 +197,11 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_DEV_ID(at91rm9200-gpio2, pioC_clk),
CLKDEV_DEV_ID(at91rm9200-gpio3, pioDE_clk),
CLKDEV_DEV_ID(at91rm9200-gpio4, pioDE_clk),
+   CLKDEV_CON_DEV_ID(NULL, f200.gpio, pioA_clk),
+   CLKDEV_CON_DEV_ID(NULL, f400.gpio, pioB_clk),
+   CLKDEV_CON_DEV_ID(NULL, f600.gpio, pioC_clk),
+   CLKDEV_CON_DEV_ID(NULL, f800.gpio, pioDE_clk),
+   CLKDEV_CON_DEV_ID(NULL, fa00.gpio, pioDE_clk),
CLKDEV_DEV_ID(at91-pit, mck),
CLKDEV_CON_DEV_ID(hck1, atmel_lcdfb, lcdc_clk),
 };
-- 
1.7.9.5


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[PATCH 1/2] pinctrl: at91: add pinctrl driver

2014-08-01 Thread Raphaël Poggi 
This driver is based on mach-at91/gpio.c and linux pinctrl driver.
The driver contains the gpio and pinctrl parts (like in linux) because the two 
parts
share some structures and logics.

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/pinctrl/Kconfig|6 +
 drivers/pinctrl/Makefile   |1 +
 drivers/pinctrl/pinctrl-at91.c |  529 
 drivers/pinctrl/pinctrl-at91.h |  148 +++
 4 files changed, 684 insertions(+)
 create mode 100644 drivers/pinctrl/pinctrl-at91.c
 create mode 100644 drivers/pinctrl/pinctrl-at91.h

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index dffaa4e..ce55c7b 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -7,6 +7,12 @@ config PINCTRL
  from the devicetree. Legacy drivers here may not need this core
  support but instead provide their own SoC specific APIs
 
+config PINCTRL_AT91
+   select PINCTRL
+   bool
+   help
+   The pinmux controller found on AT91 SoCs.
+
 config PINCTRL_IMX_IOMUX_V1
select PINCTRL if OFDEVICE
bool
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 566ba11..3ea8649 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_PINCTRL)  += pinctrl.o
+obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
 obj-$(CONFIG_PINCTRL_IMX_IOMUX_V1) += imx-iomux-v1.o
 obj-$(CONFIG_PINCTRL_IMX_IOMUX_V2) += imx-iomux-v2.o
 obj-$(CONFIG_PINCTRL_IMX_IOMUX_V3) += imx-iomux-v3.o
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
new file mode 100644
index 000..a92a898
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -0,0 +1,529 @@
+/*
+ * Copyright (C) 2005 HP Labs
+ * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD 
plagn...@jcrosoft.com
+ * Copyright (C) 2014 Raphaël Poggi
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include common.h
+#include command.h
+#include complete.h
+#include linux/clk.h
+#include linux/err.h
+#include errno.h
+#include io.h
+#include gpio.h
+#include init.h
+#include driver.h
+#include getopt.h
+
+#include mach/at91_pio.h
+
+#include pinctrl.h
+
+#include pinctrl-at91.h
+
+struct at91_pinctrl {
+struct pinctrl_device pctl;
+struct at91_pinctrl_mux_ops*ops;
+};
+
+struct at91_gpio_chip {
+   struct gpio_chipchip;
+   void __iomem*regbase;   /* PIO bank virtual address */
+   struct at91_pinctrl_mux_ops *ops;   /* ops */
+};
+
+enum at91_mux {
+   AT91_MUX_GPIO = 0,
+   AT91_MUX_PERIPH_A = 1,
+   AT91_MUX_PERIPH_B = 2,
+   AT91_MUX_PERIPH_C = 3,
+   AT91_MUX_PERIPH_D = 4,
+};
+
+#define MAX_GPIO_BANKS 5
+#define to_at91_pinctrl(c) container_of(c, struct at91_pinctrl, pctl);
+#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip)
+
+#define PULL_UP (1  0)
+#define MULTI_DRIVE (1  1)
+#define DEGLITCH(1  2)
+#define PULL_DOWN   (1  3)
+#define DIS_SCHMIT  (1  4)
+#define DEBOUNCE(1  16)
+#define DEBOUNCE_VAL_SHIFT  17
+#define DEBOUNCE_VAL(0x3fff  DEBOUNCE_VAL_SHIFT)
+
+static int gpio_banks = 0;
+
+static struct at91_gpio_chip gpio_chip[MAX_GPIO_BANKS];
+
+static inline void __iomem *pin_to_controller(struct at91_pinctrl *info, 
unsigned pin)
+{
+   pin /= MAX_NB_GPIO_PER_BANK;
+   if (likely(pin  gpio_banks))
+   return gpio_chip[pin].regbase;
+
+   return NULL;
+}
+
+/**
+ * struct at91_pinctrl_mux_ops - describes an At91 mux ops group
+ * on new IP with support for periph C and D the way to mux in
+ * periph A and B has changed
+ * So provide the right call back
+ * if not present means the IP does not support it
+ * @get_periph: return the periph mode configured
+ * @mux_A_periph: mux as periph A
+ * @mux_B_periph: mux as periph B
+ * @mux_C_periph: mux as periph C
+ * @mux_D_periph: mux as periph D
+ * @set_deglitch: enable/disable deglitch
+ * @set_debounce: enable/disable debounce
+ * @set_pulldown: enable/disable pulldown
+ * @disable_schmitt_trig: disable schmitt trigger
+ */
+struct at91_pinctrl_mux_ops {
+   enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
+   void (*mux_A_periph)(void __iomem *pio, unsigned mask);
+   void (*mux_B_periph)(void __iomem *pio, unsigned mask);
+   void (*mux_C_periph)(void __iomem *pio, unsigned mask);
+

[PATCH 0/2] Add atmel pinctrl driver

2014-08-01 Thread Raphaël Poggi 
This patchset add atmel pinctrl/gpio driver and the corresponding clocks for
the at91sam9g45 device.

The pinctrl driver also include the gpio driver (like in linux) because the 
gpio and pinctrl parts share same structures.

Raphaël Poggi (2) :
(1) pinctrl: at91: add pinctrl driver
(2) at91sam9g45: add device tree gpio clocks

arch/arm/mach-at91/at91sam9g45.c |5 +
drivers/pinctrl/Kconfig  |6 +
drivers/pinctrl/Makefile |1 +
drivers/pinctrl/pinctrl-at91.c   |  529 ++
drivers/pinctrl/pinctrl-at91.h   |  148 +++
5 files changed, 689 insertions(+)


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[PATCH] i2c: at91: add at91sam9x5 config

2014-08-01 Thread Raphaël Poggi 
Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/i2c/busses/i2c-at91.c |6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
index 399f6a9..4aa4e4e 100644
--- a/drivers/i2c/busses/i2c-at91.c
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -346,6 +346,12 @@ static struct at91_twi_pdata at91sam9g10_config = {
.has_unre_flag = false,
 };
 
+static struct at91_twi_pdata at91sam9x5_config = {
+   .clk_max_div = 7,
+   .clk_offset = 4,
+   .has_unre_flag = false,
+};
+
 static struct platform_device_id at91_twi_devtypes[] = {
{
.name = i2c-at91rm9200,
-- 
1.7.9.5


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[PATCH] of_mtd: add soft_bch and hw_oob_first ecc modes

2014-08-01 Thread Raphaël Poggi 
Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 drivers/of/of_mtd.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
index 239f1f9..46eef67 100644
--- a/drivers/of/of_mtd.c
+++ b/drivers/of/of_mtd.c
@@ -20,6 +20,8 @@ static const char *nand_ecc_modes[] = {
[NAND_ECC_SOFT] = soft,
[NAND_ECC_HW]   = hw,
[NAND_ECC_HW_SYNDROME]  = hw_syndrome,
+   [NAND_ECC_HW_OOB_FIRST] = hw_oob_first,
+   [NAND_ECC_SOFT_BCH] = soft_bch,
 };
 
 /**
-- 
1.7.9.5


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[PATCH 1/7] ARM: AM33xx: Add SDRAM size detection

2014-08-01 Thread Sascha Hauer 
This adds a function which reads back the SDRAM controller settings.
This is used in a AM33xx specific barebox entry function and a
SDRAM driver which registers a SDRAM memory bank.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/mach-omap/Makefile  |  1 +
 arch/arm/mach-omap/am33xx_generic.c  | 56 
 arch/arm/mach-omap/am33xx_scrm.c | 51 +
 arch/arm/mach-omap/include/mach/am33xx-silicon.h |  2 +
 4 files changed, 110 insertions(+)
 create mode 100644 arch/arm/mach-omap/am33xx_scrm.c

diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile
index c9b6f4b..0ebfae7 100644
--- a/arch/arm/mach-omap/Makefile
+++ b/arch/arm/mach-omap/Makefile
@@ -24,6 +24,7 @@ pbl-$(CONFIG_ARCH_OMAP3) += omap3_generic.o auxcr.o
 obj-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
 pbl-$(CONFIG_ARCH_OMAP4) += omap4_generic.o omap4_clock.o
 obj-pbl-$(CONFIG_ARCH_AM33XX) += am33xx_generic.o am33xx_clock.o am33xx_mux.o
+obj-$(CONFIG_ARCH_AM33XX) += am33xx_scrm.o
 obj-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
 pbl-$(CONFIG_OMAP3_CLOCK_CONFIG) += omap3_clock.o
 obj-$(CONFIG_OMAP_GPMC) += gpmc.o devices-gpmc-nand.o
diff --git a/arch/arm/mach-omap/am33xx_generic.c 
b/arch/arm/mach-omap/am33xx_generic.c
index 606e391..71c528c 100644
--- a/arch/arm/mach-omap/am33xx_generic.c
+++ b/arch/arm/mach-omap/am33xx_generic.c
@@ -19,6 +19,7 @@
 #include init.h
 #include io.h
 #include net.h
+#include asm/barebox-arm.h
 #include mach/am33xx-silicon.h
 #include mach/am33xx-clock.h
 #include mach/generic.h
@@ -318,6 +319,61 @@ void am33xx_config_sdram(const struct am33xx_emif_regs 
*regs)
writel(regs-sdram_config, AM33XX_EMIF4_0_REG(SDRAM_CONFIG));
 }
 
+/**
+ * am335x_sdram_size - read back SDRAM size from sdram_config register
+ *
+ * @return: The SDRAM size
+ */
+unsigned long am335x_sdram_size(void)
+{
+   int rows, cols, width, banks;
+   unsigned long size;
+   uint32_t sdram_config = readl(CM_EMIF_SDRAM_CONFIG);
+
+   rows = ((sdram_config  7)  0x7) + 9;
+   cols = (sdram_config  0x7) + 8;
+
+   switch ((sdram_config  14)  0x3) {
+   case 0:
+   width = 4;
+   break;
+   case 1:
+   width = 2;
+   break;
+   default:
+   return 0;
+   }
+
+   switch ((sdram_config  4)  0x7) {
+   case 0:
+   banks = 1;
+   break;
+   case 1:
+   banks = 2;
+   break;
+   case 2:
+   banks = 4;
+   break;
+   case 3:
+   banks = 8;
+   break;
+   default:
+   return 0;
+   }
+
+   size = (1  rows) * (1  cols) * banks * width;
+
+   debug(%s: sdram_config: 0x%08x cols: %2d rows: %2d width: %2d banks: 
%2d size: 0x%08lx\n,
+   __func__, sdram_config, cols, rows, width, banks, size);
+
+   return size;
+}
+
+void __noreturn am335x_barebox_entry(void *boarddata)
+{
+   barebox_arm_entry(0x8000, am335x_sdram_size(), boarddata);
+}
+
 void am33xx_config_io_ctrl(int ioctrl)
 {
writel(ioctrl, AM33XX_DDR_CMD0_IOCTRL);
diff --git a/arch/arm/mach-omap/am33xx_scrm.c b/arch/arm/mach-omap/am33xx_scrm.c
new file mode 100644
index 000..67529f8
--- /dev/null
+++ b/arch/arm/mach-omap/am33xx_scrm.c
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2014 Sascha Hauer s.ha...@pengutronix.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include common.h
+#include io.h
+#include errno.h
+#include sizes.h
+#include init.h
+#include of.h
+#include asm/barebox-arm.h
+#include asm/memory.h
+#include mach/am33xx-silicon.h
+
+static int am33xx_scrm_probe(struct device_d *dev)
+{
+   arm_add_mem_device(ram0, 0x8000, am335x_sdram_size());
+
+   return 0;
+}
+
+static __maybe_unused struct of_device_id am33xx_scrm_dt_ids[] = {
+   {
+   .compatible = ti,am3-scrm,
+   }, {
+   /* sentinel */
+   }
+};
+
+static struct driver_d am33xx_scrm_driver = {
+   .name   = am33xx-scrm,
+   .probe  = am33xx_scrm_probe,
+   .of_compatible = DRV_OF_COMPAT(am33xx_scrm_dt_ids),
+};
+
+static int am33xx_scrm_init(void)
+{
+   return platform_driver_register(am33xx_scrm_driver);
+}
+
+mem_initcall(am33xx_scrm_init);
diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h 
b/arch/arm/mach-omap/include/mach/am33xx-silicon.h
index 20b8e81..ceca10a 100644
---

[PATCH] Phytec phyCORE AM335x updates

2014-08-01 Thread Sascha Hauer 
The Phytec phyCORE-AM335x comes in various different RAM settings.
This series adds support for the 128MB and 256MB configurations.
Also the NAND ECC mode setting is fixed, it is now compatible to
the Kernel.

With this the phyBOARD WEGA is working. Some of the devices are
different from the phyCORE on the RDK, so we'll need a different
device tree in the future, but for now it's enough to get something
started.

Sascha


Sascha Hauer (7):
  ARM: AM33xx: Add SDRAM size detection
  ARM: phyCORE-am335x: read back SDRAM controller settings
  ARM: phyCORE-am335x: Add support for more SDRAM configurations
  mtd: omap gpmc: fix ecc bytes/size
  mtd: omap gpmc: reserve 14 byte/subpage for ECC in BCH8 romcode
  mtd: omap gpmc: fix bch8 nand-ecc-opt property
  ARM: AM3355x: Update defconfig

 arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 113 ++-
 arch/arm/configs/am335x_defconfig|  83 +
 arch/arm/dts/am335x-phytec-phycore.dts   |   5 -
 arch/arm/mach-omap/Makefile  |   1 +
 arch/arm/mach-omap/am33xx_generic.c  |  56 +++
 arch/arm/mach-omap/am33xx_scrm.c |  51 ++
 arch/arm/mach-omap/include/mach/am33xx-silicon.h |   2 +
 drivers/bus/omap-gpmc.c  |   3 -
 drivers/mtd/nand/nand_omap_gpmc.c|  20 ++--
 images/Makefile.am33xx   |  14 ++-
 10 files changed, 261 insertions(+), 87 deletions(-)
 create mode 100644 arch/arm/mach-omap/am33xx_scrm.c

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[PATCH 2/7] ARM: phyCORE-am335x: read back SDRAM controller settings

2014-08-01 Thread Sascha Hauer 
- use am335x_barebox_entry() to remove the need for hardcoded SDRAM
  size
- remove hardcoded memory settings from device tree since there are
  different memory sizes available for this board.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 4 ++--
 arch/arm/dts/am335x-phytec-phycore.dts   | 5 -
 2 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c 
b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
index 855b692..200cf57 100644
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
@@ -81,7 +81,7 @@ static noinline void pcm051_board_init(void)
 
fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset();
 
-   barebox_arm_entry(0x8000, SZ_512M, fdt);
+   am335x_barebox_entry(fdt);
 }
 
 ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram, bootinfo, r1, r2)
@@ -106,5 +106,5 @@ ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, 
r2)
 
fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset();
 
-   barebox_arm_entry(0x8000, SZ_512M, fdt);
+   am335x_barebox_entry(fdt);
 }
diff --git a/arch/arm/dts/am335x-phytec-phycore.dts 
b/arch/arm/dts/am335x-phytec-phycore.dts
index 6196eb3..8966b32 100644
--- a/arch/arm/dts/am335x-phytec-phycore.dts
+++ b/arch/arm/dts/am335x-phytec-phycore.dts
@@ -22,11 +22,6 @@
};
};
 
-   memory {
-   device_type = memory;
-   reg = 0x8000 0x2000; /* 512 MB */
-   };
-
gpio-leds {
compatible = gpio-leds;
pinctrl-names = default;
-- 
2.0.1


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[PATCH 4/7] mtd: omap gpmc: fix ecc bytes/size

2014-08-01 Thread Sascha Hauer 
The ecc bytes / size are per subpage, not per page.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 drivers/mtd/nand/nand_omap_gpmc.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_gpmc.c 
b/drivers/mtd/nand/nand_omap_gpmc.c
index 59712b8..5ff1647 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -804,8 +804,8 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
offset - omap_oobinfo.eccbytes;
break;
case OMAP_ECC_BCH4_CODE_HW:
-   oinfo-nand.ecc.bytes= 4 * 7;
-   oinfo-nand.ecc.size = 4 * 512;
+   oinfo-nand.ecc.bytes= 7;
+   oinfo-nand.ecc.size = 512;
oinfo-nand.ecc.strength = BCH4_MAX_ERROR;
omap_oobinfo.oobfree-offset = offset;
omap_oobinfo.oobfree-length = minfo-oobsize -
@@ -815,8 +815,8 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
omap_oobinfo.eccpos[i] = i + offset;
break;
case OMAP_ECC_BCH8_CODE_HW:
-   oinfo-nand.ecc.bytes= 4 * 13;
-   oinfo-nand.ecc.size = 4 * 512;
+   oinfo-nand.ecc.bytes= 13;
+   oinfo-nand.ecc.size = 512;
oinfo-nand.ecc.strength = BCH8_MAX_ERROR;
omap_oobinfo.oobfree-offset = offset;
omap_oobinfo.oobfree-length = minfo-oobsize -
@@ -826,8 +826,8 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
omap_oobinfo.eccpos[i] = i + offset;
break;
case OMAP_ECC_BCH8_CODE_HW_ROMCODE:
-   oinfo-nand.ecc.bytes= 4 * 13;
-   oinfo-nand.ecc.size = 4 * 512;
+   oinfo-nand.ecc.bytes= 13;
+   oinfo-nand.ecc.size = 512;
oinfo-nand.ecc.strength = BCH8_MAX_ERROR;
nand-ecc.read_page = omap_gpmc_read_page_bch_rom_mode;
omap_oobinfo.oobfree-length = 0;
-- 
2.0.1


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[PATCH 7/7] ARM: AM3355x: Update defconfig

2014-08-01 Thread Sascha Hauer 
Most diffstat comes from refreshing the config. The only real change
is that the NAND xload update handler is enabled now.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/configs/am335x_defconfig | 83 ---
 1 file changed, 42 insertions(+), 41 deletions(-)

diff --git a/arch/arm/configs/am335x_defconfig 
b/arch/arm/configs/am335x_defconfig
index 0c92c96..d3feb10 100644
--- a/arch/arm/configs/am335x_defconfig
+++ b/arch/arm/configs/am335x_defconfig
@@ -1,11 +1,11 @@
 CONFIG_ARCH_OMAP=y
 CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO=y
+CONFIG_BAREBOX_UPDATE_AM33XX_NAND_XLOADSLOTS=y
 CONFIG_OMAP_MULTI_BOARDS=y
 CONFIG_MACH_BEAGLEBONE=y
 CONFIG_MACH_PCM051=y
 CONFIG_THUMB2_BAREBOX=y
 CONFIG_ARM_BOARD_APPEND_ATAG=y
-CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y
 CONFIG_ARM_UNWIND=y
 CONFIG_MMU=y
@@ -15,7 +15,6 @@ CONFIG_MALLOC_TLSF=y
 CONFIG_KALLSYMS=y
 CONFIG_RELOCATABLE=y
 CONFIG_PROMPT=barebox 
-CONFIG_LONGHELP=y
 CONFIG_HUSH_FANCY_PROMPT=y
 CONFIG_CMDLINE_EDITING=y
 CONFIG_AUTO_COMPLETE=y
@@ -25,61 +24,63 @@ CONFIG_BLSPEC=y
 CONFIG_CONSOLE_ACTIVATE_NONE=y
 CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y
 CONFIG_DEBUG_INFO=y
-CONFIG_CMD_EDIT=y
-CONFIG_CMD_SLEEP=y
-CONFIG_CMD_MSLEEP=y
-CONFIG_CMD_SAVEENV=y
-CONFIG_CMD_LOADENV=y
-CONFIG_CMD_EXPORT=y
-CONFIG_CMD_PRINTENV=y
-CONFIG_CMD_READLINE=y
-CONFIG_CMD_READF=y
-CONFIG_CMD_LET=y
-CONFIG_CMD_MENU=y
-CONFIG_CMD_MENUTREE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_LN=y
-CONFIG_CMD_TFTP=y
-CONFIG_CMD_FILETYPE=y
-CONFIG_CMD_ECHO_E=y
-CONFIG_CMD_LOADB=y
-CONFIG_CMD_MEMINFO=y
+CONFIG_LONGHELP=y
 CONFIG_CMD_IOMEM=y
-CONFIG_CMD_MM=y
-CONFIG_CMD_CRC=y
-CONFIG_CMD_CRC_CMP=y
-CONFIG_CMD_MD5SUM=y
-CONFIG_CMD_FLASH=y
-CONFIG_CMD_UBIFORMAT=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_ARM_MMUINFO=y
 CONFIG_CMD_BOOTM_SHOW_TYPE=y
 CONFIG_CMD_BOOTM_VERBOSE=y
 CONFIG_CMD_BOOTM_INITRD=y
 CONFIG_CMD_BOOTM_OFTREE=y
-CONFIG_CMD_UIMAGE=y
-CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTU is not set
-CONFIG_CMD_RESET=y
+CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GO=y
-CONFIG_CMD_OFTREE=y
-CONFIG_CMD_OF_PROPERTY=y
-CONFIG_CMD_OF_NODE=y
-CONFIG_CMD_BAREBOX_UPDATE=y
-CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_LOADB=y
+CONFIG_CMD_RESET=y
+CONFIG_CMD_UIMAGE=y
 CONFIG_CMD_PARTITION=y
+CONFIG_CMD_UBIFORMAT=y
+CONFIG_CMD_EXPORT=y
+CONFIG_CMD_LOADENV=y
+CONFIG_CMD_PRINTENV=y
 CONFIG_CMD_MAGICVAR=y
 CONFIG_CMD_MAGICVAR_HELP=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_SAVEENV=y
+CONFIG_CMD_FILETYPE=y
+CONFIG_CMD_LN=y
+CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_UNCOMPRESS=y
+CONFIG_CMD_LET=y
+CONFIG_CMD_MSLEEP=y
+CONFIG_CMD_READF=y
+CONFIG_CMD_SLEEP=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MIITOOL=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTP=y
+CONFIG_CMD_ECHO_E=y
+CONFIG_CMD_EDIT=y
+CONFIG_CMD_MENU=y
+CONFIG_CMD_MENUTREE=y
+CONFIG_CMD_READLINE=y
+CONFIG_CMD_TIMEOUT=y
+CONFIG_CMD_CRC=y
+CONFIG_CMD_CRC_CMP=y
+CONFIG_CMD_MM=y
+CONFIG_CMD_DETECT=y
+CONFIG_CMD_FLASH=y
+CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
-CONFIG_CMD_SPI=y
 CONFIG_CMD_LED=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_LED_TRIGGER=y
-CONFIG_CMD_MIITOOL=y
-CONFIG_CMD_DETECT=y
+CONFIG_CMD_BAREBOX_UPDATE=y
+CONFIG_CMD_OF_NODE=y
+CONFIG_CMD_OF_PROPERTY=y
+CONFIG_CMD_OFTREE=y
+CONFIG_CMD_TIME=y
 CONFIG_NET=y
-CONFIG_CMD_DHCP=y
 CONFIG_NET_NFS=y
-CONFIG_CMD_PING=y
 CONFIG_NET_NETCONSOLE=y
 CONFIG_NET_RESOLV=y
 CONFIG_OFDEVICE=y
-- 
2.0.1


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[PATCH 3/7] ARM: phyCORE-am335x: Add support for more SDRAM configurations

2014-08-01 Thread Sascha Hauer 
This adds support for 256MB and 128MB RAM configurations of the
phyCORE-AM335x. This is done as new images.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 109 ++-
 images/Makefile.am33xx   |  14 ++-
 2 files changed, 100 insertions(+), 23 deletions(-)

diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c 
b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
index 200cf57..ff1f04e 100644
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
@@ -15,7 +15,7 @@
 #include mach/wdt.h
 #include debug_ll.h
 
-static const struct am33xx_cmd_control MT41J256M16HA15EIT_1x512MB_cmd = {
+static const struct am33xx_cmd_control pcm051_cmd = {
.slave_ratio0 = 0x40,
.dll_lock_diff0 = 0x0,
.invert_clkout0 = 0x1,
@@ -27,21 +27,74 @@ static const struct am33xx_cmd_control 
MT41J256M16HA15EIT_1x512MB_cmd = {
.invert_clkout2 = 0x1,
 };
 
-static const struct am33xx_emif_regs MT41J256M16HA15EIT_1x512MB_regs = {
-   .emif_read_latency  = 0x6,
-   .emif_tim1  = 0x0888A39B,
-   .emif_tim2  = 0x26517FDA,
-   .emif_tim3  = 0x501F84EF,
-   .sdram_config   = 0x61C04B32,
-   .zq_config  = 0x50074BE4,
-   .sdram_ref_ctrl = 0x093B,
+struct pcm051_sdram_timings {
+   struct am33xx_emif_regs regs;
+   struct am33xx_ddr_data data;
 };
 
-static const struct am33xx_ddr_data MT41J256M16HA15EIT_1x512MB_data = {
-   .rd_slave_ratio0= 0x3B,
-   .wr_dqs_slave_ratio0= 0x3B,
-   .fifo_we_slave_ratio0   = 0x96,
-   .wr_slave_ratio0= 0x76,
+enum {
+   MT41J128M16125IT_1x256M16,
+   MT41J64M1615IT_1x128M16,
+   MT41J256M16HA15EIT_1x512M16,
+};
+
+struct pcm051_sdram_timings timings[] = {
+   /* 1x256M16 */
+   [MT41J128M16125IT_1x256M16] = {
+   .regs = {
+   .emif_read_latency  = 0x6,
+   .emif_tim1  = 0x0888A39B,
+   .emif_tim2  = 0x26337FDA,
+   .emif_tim3  = 0x501F830F,
+   .sdram_config   = 0x61C04AB2,
+   .zq_config  = 0x50074BE4,
+   .sdram_ref_ctrl = 0x093B,
+   },
+   .data = {
+   .rd_slave_ratio0= 0x3B,
+   .wr_dqs_slave_ratio0= 0x3B,
+   .fifo_we_slave_ratio0   = 0x97,
+   .wr_slave_ratio0= 0x76,
+   },
+   },
+
+   /* 1x128M16 */
+   [MT41J64M1615IT_1x128M16] = {
+   .regs =  {
+   .emif_read_latency  = 0x6,
+   .emif_tim1  = 0x0888A39B,
+   .emif_tim2  = 0x26247FDA,
+   .emif_tim3  = 0x501F821F,
+   .sdram_config   = 0x61C04A32,
+   .zq_config  = 0x50074BE4,
+   .sdram_ref_ctrl = 0x093B,
+   },
+   .data = {
+   .rd_slave_ratio0= 0x3A,
+   .wr_dqs_slave_ratio0= 0x36,
+   .fifo_we_slave_ratio0   = 0xA2,
+   .wr_slave_ratio0= 0x74,
+   },
+   },
+
+   /* 1x512MB */
+   [MT41J256M16HA15EIT_1x512M16] = {
+   .regs = {
+   .emif_read_latency  = 0x6,
+   .emif_tim1  = 0x0888A39B,
+   .emif_tim2  = 0x26517FDA,
+   .emif_tim3  = 0x501F84EF,
+   .sdram_config   = 0x61C04B32,
+   .zq_config  = 0x50074BE4,
+   .sdram_ref_ctrl = 0x093B,
+   },
+   .data = {
+   .rd_slave_ratio0= 0x3B,
+   .wr_dqs_slave_ratio0= 0x3B,
+   .fifo_we_slave_ratio0   = 0x96,
+   .wr_slave_ratio0= 0x76,
+   },
+   },
 };
 
 extern char __dtb_am335x_phytec_phycore_start[];
@@ -55,9 +108,10 @@ extern char __dtb_am335x_phytec_phycore_start[];
  *
  * @return void
  */
-static noinline void pcm051_board_init(void)
+static noinline void pcm051_board_init(int sdram)
 {
void *fdt;
+   struct pcm051_sdram_timings *timing = timings[sdram];
 
/* WDT1 is already running when the bootloader gets control
 * Disable it to avoid random resets
@@ -70,9 +124,9 @@ static noinline void pcm051_board_init(void)
 
am33xx_pll_init(MPUPLL_M_600, 25, DDRPLL_M_303);
 
-   am335x_sdram_init(0x18B,

[PATCH 6/7] mtd: omap gpmc: fix bch8 nand-ecc-opt property

2014-08-01 Thread Sascha Hauer 
We interpret the ECC option bch8 as OMAP_ECC_BCH8_CODE_HW, but the
Kernel uses OMAP_ECC_BCH8_CODE_HW_ROMCODE in this case instead. To make
the interpretation of the ti,nand-ecc-opt property compatible to the
Kernel we have to use OMAP_ECC_BCH8_CODE_HW_ROMCODE for bch8

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 drivers/bus/omap-gpmc.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/bus/omap-gpmc.c b/drivers/bus/omap-gpmc.c
index ad21af2..d7b02cf 100644
--- a/drivers/bus/omap-gpmc.c
+++ b/drivers/bus/omap-gpmc.c
@@ -382,9 +382,6 @@ static struct dt_eccmode modes[] = {
.mode = OMAP_ECC_BCH4_CODE_HW,
}, {
.name = bch8,
-   .mode = OMAP_ECC_BCH8_CODE_HW,
-   }, {
-   .name = bch8-romcode,
.mode = OMAP_ECC_BCH8_CODE_HW_ROMCODE,
},
 };
-- 
2.0.1


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[PATCH 5/7] mtd: omap gpmc: reserve 14 byte/subpage for ECC in BCH8 romcode

2014-08-01 Thread Sascha Hauer 
As done in the Kernel. The Kernel has a comment this is done to
be compatible with the ROM code.

Signed-off-by: Sascha Hauer s.ha...@pengutronix.de
---
 drivers/mtd/nand/nand_omap_gpmc.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/drivers/mtd/nand/nand_omap_gpmc.c 
b/drivers/mtd/nand/nand_omap_gpmc.c
index 5ff1647..b1d266f 100644
--- a/drivers/mtd/nand/nand_omap_gpmc.c
+++ b/drivers/mtd/nand/nand_omap_gpmc.c
@@ -826,19 +826,13 @@ static int omap_gpmc_eccmode(struct gpmc_nand_info *oinfo,
omap_oobinfo.eccpos[i] = i + offset;
break;
case OMAP_ECC_BCH8_CODE_HW_ROMCODE:
-   oinfo-nand.ecc.bytes= 13;
+   oinfo-nand.ecc.bytes= 13 + 1;
oinfo-nand.ecc.size = 512;
oinfo-nand.ecc.strength = BCH8_MAX_ERROR;
nand-ecc.read_page = omap_gpmc_read_page_bch_rom_mode;
omap_oobinfo.oobfree-length = 0;
j = 0;
-   for (i = 2; i  15; i++)
-   omap_oobinfo.eccpos[j++] = i;
-   for (i = 16; i  29; i++)
-   omap_oobinfo.eccpos[j++] = i;
-   for (i = 30; i  43; i++)
-   omap_oobinfo.eccpos[j++] = i;
-   for (i = 44; i  57; i++)
+   for (i = 2; i  58; i++)
omap_oobinfo.eccpos[j++] = i;
break;
case OMAP_ECC_SOFT:
-- 
2.0.1


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Re: 'commands: add hwclock' partially apllied!

2014-08-01 Thread Sascha Hauer 
On Fri, Aug 01, 2014 at 03:55:02PM +0400, Antony Pavlov wrote:
 Sascha!
 
 I have just got recent barebox 'next' branch with this commit:

Fixed, sorry. I lost this while resolving conflicts.

Sascha


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[PATCH 2/2] dts: at91: initial support of at91sam9m10g45ek dts

2014-08-01 Thread Raphael Poggi 
From: Raphaël Poggi poggi.r...@gmail.com

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 arch/arm/dts/Makefile |1 +
 arch/arm/dts/at91sam9g45.dtsi |  105 +
 arch/arm/dts/at91sam9m10g45ek.dts |   22 
 3 files changed, 128 insertions(+)
 create mode 100644 arch/arm/dts/at91sam9g45.dtsi
 create mode 100644 arch/arm/dts/at91sam9m10g45ek.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9bff8a0..5a3405e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1,6 +1,7 @@
 BUILTIN_DTB := $(patsubst %,%,$(CONFIG_BUILTIN_DTB_NAME))
 obj-dtb-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o
 
+pbl-dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb.o
 pbl-dtb-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o 
am335x-bone-common.dtb.o
 pbl-dtb-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o 
imx6dl-dfi-fs700-m60-6s.dtb.o
 pbl-dtb-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o
diff --git a/arch/arm/dts/at91sam9g45.dtsi b/arch/arm/dts/at91sam9g45.dtsi
new file mode 100644
index 000..5b287f2
--- /dev/null
+++ b/arch/arm/dts/at91sam9g45.dtsi
@@ -0,0 +1,105 @@
+/*
+ * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
+ *applies to AT91SAM9G45, AT91SAM9M10,
+ *AT91SAM9G46, AT91SAM9M11 SoC
+ *
+ *  Copyright (C) 2011 Atmel,
+ *2011 Nicolas Ferre nicolas.fe...@atmel.com
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include skeleton.dtsi
+#include dt-bindings/pinctrl/at91.h
+
+/ {
+   model = Atmel AT91SAM9G45 family SoC;
+   compatible = atmel,at91sam9g45;
+
+   aliases {
+   gpio0 = pioA;
+   gpio1 = pioB;
+   gpio2 = pioC;
+   gpio3 = pioD;
+   gpio4 = pioE;
+   };
+
+   pinctrl@f200 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = atmel,at91rm9200-pinctrl, simple-bus;
+   ranges = 0xf200 0xf200 0xa00;
+
+   atmel,mux-mask = 
+ /*A B */
+  0x 0xffc003ff  /* pioA */
+  0x 0x800f8f00  /* pioB */
+  0x 0x0e00  /* pioC */
+  0x 0xff0c1381  /* pioD */
+  0x 0x8181  /* pioE */
+ ;
+
+   i2c0 {
+   pinctrl_i2c0: i2c0-0 {
+   atmel,pins =
+   AT91_PIOA 21 AT91_PERIPH_A 
AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
+AT91_PIOA 20 AT91_PERIPH_A 
AT91_PINCTRL_NONE; /* PA20 periph A TWD0 */
+   };
+   };
+
+   i2c1 {
+   pinctrl_i2c1: i2c1-0 {
+   atmel,pins =
+   AT91_PIOB 11 AT91_PERIPH_A 
AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
+AT91_PIOB 10 AT91_PERIPH_A 
AT91_PINCTRL_NONE; /* PB10 periph A TWD1 */
+   };
+   };
+
+   };
+
+
+   pioA: gpio@f200 {
+   compatible = atmel,at91rm9200-gpio;
+   reg = 0xf200 0x200;
+   #gpio-cells = 2;
+   gpio-controller;
+   };
+
+   pioB: gpio@f400 {
+   compatible = atmel,at91rm9200-gpio;
+   reg = 0xf400 0x200;
+   #gpio-cells = 2;
+   gpio-controller;
+   };
+
+   pioC: gpio@f600 {
+   compatible = atmel,at91rm9200-gpio;
+   reg = 0xf600 0x200;
+   #gpio-cells = 2;
+   gpio-controller;
+   };
+
+   pioD: gpio@f800 {
+   compatible = atmel,at91rm9200-gpio;
+   reg = 0xf800 0x200;
+   #gpio-cells = 2;
+   gpio-controller;
+   };
+
+   pioE: gpio@fa00 {
+   compatible = atmel,at91rm9200-gpio;
+   reg = 0xfa00 0x200;
+   #gpio-cells = 2;
+   gpio-controller;
+   };
+
+   i2c0: i2c@fff84000 {
+   compatible = atmel,at91sam9g10-i2c;
+   reg = 0xfff84000 0x100;
+   pinctrl-names = default;
+   pinctrl-0 = pinctrl_i2c0;
+   #address-cells = 1;
+   #size-cells = 0;
+   status = disabled;
+   };
+};
diff --git a/arch/arm/dts/at91sam9m10g45ek.dts 
b/arch/arm/dts/at91sam9m10g45ek.dts
new file mode 100644
index 000..df0da9d
--- /dev/null
+++ b/arch/arm/dts/at91sam9m10g45ek.dts
@@ -0,0 +1,22 @@
+/*
+* at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
+*
+*  Copyright (C) 2011 Atmel,
+*2011 Nicolas Ferre

[PATCH 1/2] dt-bindings: pinctrl: add at91 file

2014-08-01 Thread Raphael Poggi 
From: Raphaël Poggi poggi.r...@gmail.com

Signed-off-by: Raphaël Poggi poggi.r...@gmail.com
---
 include/dt-bindings/pinctrl/at91.h |   35 +++
 1 file changed, 35 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/at91.h

diff --git a/include/dt-bindings/pinctrl/at91.h 
b/include/dt-bindings/pinctrl/at91.h
new file mode 100644
index 000..0fee6ff
--- /dev/null
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -0,0 +1,35 @@
+/*
+ * This header provides constants for most at91 pinctrl bindings.
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
+#define __DT_BINDINGS_AT91_PINCTRL_H__
+
+#define AT91_PINCTRL_NONE  (0  0)
+#define AT91_PINCTRL_PULL_UP   (1  0)
+#define AT91_PINCTRL_MULTI_DRIVE   (1  1)
+#define AT91_PINCTRL_DEGLITCH  (1  2)
+#define AT91_PINCTRL_PULL_DOWN (1  3)
+#define AT91_PINCTRL_DIS_SCHMIT(1  4)
+#define AT91_PINCTRL_DEBOUNCE  (1  16)
+#define AT91_PINCTRL_DEBOUNCE_VAL(x)   (x  17)
+
+#define AT91_PINCTRL_PULL_UP_DEGLITCH  (AT91_PINCTRL_PULL_UP | 
AT91_PINCTRL_DEGLITCH)
+
+#define AT91_PIOA  0
+#define AT91_PIOB  1
+#define AT91_PIOC  2
+#define AT91_PIOD  3
+#define AT91_PIOE  4
+
+#define AT91_PERIPH_GPIO   0
+#define AT91_PERIPH_A  1
+#define AT91_PERIPH_B  2
+#define AT91_PERIPH_C  3
+#define AT91_PERIPH_D  4
+
+#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
-- 
1.7.9.5


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[PATCH 0/2] Add initial support of at91sam9m10g45ek device tree

2014-08-01 Thread Raphael Poggi 
This patchset add the initial support of the at91sam9m10g45ek device tree, and
add the pinctrl device tree binding file.

Raphaël Poggi (2) :
(1) dt-bindings: pinctrl: add at91 file
(2) dts: at91: initial support of at91sam9m10g45ek dts


arch/arm/dts/Makefile  |1 +
arch/arm/dts/at91sam9g45.dtsi  |  105 
arch/arm/dts/at91sam9m10g45ek.dts  |   22 
include/dt-bindings/pinctrl/at91.h |   35 
4 files changed, 163 insertions(+)


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Re: [PATCH] ARM: atmel: sama5d3_xplained: import smc timing from U-Boot

2014-08-01 Thread Sascha Hauer 
On Fri, Aug 01, 2014 at 04:06:36PM +0800, Bo Shen wrote:
 From: Matteo Fortini matteo.fort...@gmail.com
 
 The configuration for NAND has been aligned with values
 from U-Boot and completed with TIMINGS initialization
 
 Signed-off-by: Matteo Fortini matteo.fort...@gmail.com
 [voice.s...@atmel.com: apply this patch from Matteo Fortini for
  sama5d3xek to sama5d3_xplained board]
 Signed-off-by: Bo Shen voice.s...@atmel.com

Applied, thanks

Sascha

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Re: [PATCH] fixup! ARM: add Canon A1100 ROM image generation

2014-08-01 Thread Sascha Hauer 
On Fri, Aug 01, 2014 at 04:11:30PM +0400, Antony Pavlov wrote:
 Signed-off-by: Antony Pavlov antonynpav...@gmail.com
 ---
  scripts/canon-a1100-image | 0
  1 file changed, 0 insertions(+), 0 deletions(-)
  mode change 100644 = 100755 scripts/canon-a1100-image
 
 diff --git a/scripts/canon-a1100-image b/scripts/canon-a1100-image
 old mode 100644
 new mode 100755

Squashed into the original commit.

Sascha

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Re: [PATCH 0/2] Add initial support of at91sam9m10g45ek device tree

2014-08-01 Thread Sascha Hauer 
On Fri, Aug 01, 2014 at 03:42:16PM +0200, Raphael Poggi wrote:
 This patchset add the initial support of the at91sam9m10g45ek device tree, and
 add the pinctrl device tree binding file.
 
 Raphaël Poggi (2) :
 (1) dt-bindings: pinctrl: add at91 file
 (2) dts: at91: initial support of at91sam9m10g45ek dts
 
 
 arch/arm/dts/Makefile  |1 +
 arch/arm/dts/at91sam9g45.dtsi  |  105 
 arch/arm/dts/at91sam9m10g45ek.dts  |   22 
 include/dt-bindings/pinctrl/at91.h |   35 

We already have all these files in the tree. You shouldn't have to
duplicate them. Just create a stub under arch/arm/dts/ including the
real files.

Sascha

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Re: [PATCH 0/2] Add initial support of at91sam9m10g45ek device tree

2014-08-01 Thread Raphaël Poggi 
Ah yes, sorry. I'll send a v2 to correct this.

Thanks,
Raphaël

2014-08-01 18:59 GMT+02:00 Sascha Hauer s.ha...@pengutronix.de:
 On Fri, Aug 01, 2014 at 03:42:16PM +0200, Raphael Poggi wrote:
 This patchset add the initial support of the at91sam9m10g45ek device tree, 
 and
 add the pinctrl device tree binding file.

 Raphaël Poggi (2) :
 (1) dt-bindings: pinctrl: add at91 file
 (2) dts: at91: initial support of at91sam9m10g45ek dts


 arch/arm/dts/Makefile  |1 +
 arch/arm/dts/at91sam9g45.dtsi  |  105 
 
 arch/arm/dts/at91sam9m10g45ek.dts  |   22 
 include/dt-bindings/pinctrl/at91.h |   35 

 We already have all these files in the tree. You shouldn't have to
 duplicate them. Just create a stub under arch/arm/dts/ including the
 real files.

 Sascha

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[PATCH] bus: mvebu: fix ranges fixup

2014-08-01 Thread Ezequiel Garcia 
The current fixup code is slightly wrong, and only works when the
root address cell number is one.

However, Armada XP has a root address cell number of two. In this case
we are currently applying the fixup on the child high base address,
while it should be applied on the child low base address.

Fix it and add some detailed explanation to avoid having to figure this
out each time.

Signed-off-by: Ezequiel Garcia ezequiel.gar...@free-electrons.com
---
Without this patch, the Plathome Openblocks AX3-4 board wouldn't
boot on -next. It should affect every Armada XP board that require this
fixup.

 drivers/bus/mvebu-mbus.c | 17 -
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
index b1e407a..b7f7836 100644
--- a/drivers/bus/mvebu-mbus.c
+++ b/drivers/bus/mvebu-mbus.c
@@ -788,6 +788,21 @@ static int mvebu_mbus_of_fixup(struct device_node *root, 
void *context)
ranges = xzalloc(lenp);
of_property_read_u32_array(np, ranges, ranges, lenp/4);
 
+   /*
+* Iterate through each ranges tuple and fixup the custom
+* window ranges low base address. Because Armada XP supports
+* LPAE, it has 2 cells for the parent address:
+*   windowid child_base high_base low_base size
+*
+* whereas for Armada 370, there's just one:
+*   windowid child_base base size
+*
+* For instance, the following tuple:
+*   MBUS_ID(0xf0, 0x01) child_base {0} base 0x10
+*
+* would be fixed-up like:
+*   MBUS_ID(0xf0, 0x01) child_base {0} remap 0x10
+*/
for (n = 0; n  lenp/4; n += size) {
struct mbus_range *r;
u32 mbusid = ranges[n];
@@ -797,7 +812,7 @@ static int mvebu_mbus_of_fixup(struct device_node *root, 
void *context)
 
list_for_each_entry(r, mbus_ranges, list) {
if (r-mbusid == mbusid)
-   ranges[n + na] = r-remap;
+   ranges[n + na + pa - 1] = r-remap;
}
}
 
-- 
2.0.1


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[PATCH 0/3] MIPS: add support for metadata in pbl-enabled barebox images

2014-08-01 Thread Antony Pavlov 
This patch series make it possible to use metadata
in big-endian qemu-malta barebox images.

The first patch fixes up metadata for big-endian targets.

Antony Pavlov (3):
  fixup! Add support for metadata in barebox images
  MIPS: add support for metadata in barebox images
  MIPS: qemu-malta_defconfig: enable metadata in barebox image (IMD)

 arch/mips/configs/qemu-malta_defconfig | 1 +
 arch/mips/lib/barebox.lds.S| 2 ++
 arch/mips/pbl/zbarebox.lds.S   | 2 ++
 common/imd-barebox.c   | 4 ++--
 4 files changed, 7 insertions(+), 2 deletions(-)

-- 
2.0.1


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[PATCH 2/3] MIPS: add support for metadata in barebox images

2014-08-01 Thread Antony Pavlov 
Signed-off-by: Antony Pavlov antonynpav...@gmail.com
---
 arch/mips/lib/barebox.lds.S  | 2 ++
 arch/mips/pbl/zbarebox.lds.S | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/mips/lib/barebox.lds.S b/arch/mips/lib/barebox.lds.S
index 4ee4252..c690e71 100644
--- a/arch/mips/lib/barebox.lds.S
+++ b/arch/mips/lib/barebox.lds.S
@@ -49,6 +49,8 @@ SECTIONS
. = ALIGN(4);
.data : { *(.data*) }
 
+   .barebox_imd : { BAREBOX_IMD }
+
. = ALIGN(4);
.got : { *(.got*) }
 
diff --git a/arch/mips/pbl/zbarebox.lds.S b/arch/mips/pbl/zbarebox.lds.S
index 3a26942..a883fdb 100644
--- a/arch/mips/pbl/zbarebox.lds.S
+++ b/arch/mips/pbl/zbarebox.lds.S
@@ -44,6 +44,8 @@ SECTIONS
. = ALIGN(4);
.rodata : { *(.rodata*) }
 
+   .barebox_imd : { BAREBOX_IMD }
+
_etext = .; /* End of text and rodata section */
 
. = ALIGN(4);
-- 
2.0.1


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[PATCH 1/3] fixup! Add support for metadata in barebox images

2014-08-01 Thread Antony Pavlov 
---
 common/imd-barebox.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/imd-barebox.c b/common/imd-barebox.c
index 7122740..e9cd37d 100644
--- a/common/imd-barebox.c
+++ b/common/imd-barebox.c
@@ -13,12 +13,12 @@ void imd_used(const void *used)
 
 struct imd_header imd_start_header
 __BAREBOX_IMD_SECTION(.barebox_imd_start) = {
-   .type = IMD_TYPE_START,
+   .type = cpu_to_le32(IMD_TYPE_START),
 };
 
 struct imd_header imd_end_header
 __BAREBOX_IMD_SECTION(.barebox_imd_end) = {
-   .type = IMD_TYPE_END,
+   .type = cpu_to_le32(IMD_TYPE_END),
 };
 
 BAREBOX_IMD_TAG_STRING(imd_build_tag, IMD_TYPE_BUILD, UTS_VERSION, 1);
-- 
2.0.1


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