Re: [PATCH] i2c-omap: Update driver
On Mon, 2013-09-30 at 10:16 +0200, Sascha Hauer wrote: On Thu, Sep 26, 2013 at 01:40:24PM +0200, Jan Weitzel wrote: The driver didn't work well with at24 driver. NACKS are lost. Errors are lost in isr due to the local variable err. Also we didn't wait for bus free in omap_i2c_xfer_msg. Fix issues and get other improvements from linux kernel Tested on OMAP4 and AM335x Signed-off-by: Jan Weitzel j.weit...@phytec.de Applied, thanks When booting my BeagleBone with this, I see: i2c-omap i2c-am33xx0: bus 0 rev84148224.11 at 100 kHz The revision entry looks strange, but the at24 EEPROM continues to be accessible. I've not yet looked at it in detail. Jan, do you have an idea? Regards, Jan ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] i2c-omap: Update driver
On Thu, Sep 26, 2013 at 01:40:24PM +0200, Jan Weitzel wrote: The driver didn't work well with at24 driver. NACKS are lost. Errors are lost in isr due to the local variable err. Also we didn't wait for bus free in omap_i2c_xfer_msg. Fix issues and get other improvements from linux kernel Tested on OMAP4 and AM335x Signed-off-by: Jan Weitzel j.weit...@phytec.de Applied, thanks Sascha --- arch/arm/mach-omap/include/mach/generic.h |9 +- drivers/i2c/busses/i2c-omap.c | 635 - include/i2c/i2c.h |1 + 3 files changed, 454 insertions(+), 191 deletions(-) diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h index ece8c2b..31ab100 100644 --- a/arch/arm/mach-omap/include/mach/generic.h +++ b/arch/arm/mach-omap/include/mach/generic.h @@ -2,12 +2,13 @@ #define _MACH_GENERIC_H /* I2C controller revisions */ -#define OMAP_I2C_REV_2 0x20 +#define OMAP_I2C_OMAP1_REV_20x20 /* I2C controller revisions present on specific hardware */ -#define OMAP_I2C_REV_ON_2430 0x36 -#define OMAP_I2C_REV_ON_3430 0x3C -#define OMAP_I2C_REV_ON_4430 0x40 +#define OMAP_I2C_REV_ON_2430 0x0036 +#define OMAP_I2C_REV_ON_3430_3530 0x003C +#define OMAP_I2C_REV_ON_36300x0040 +#define OMAP_I2C_REV_ON_4430_PLUS 0x5042 #ifdef CONFIG_ARCH_OMAP #define cpu_is_omap2430()(1) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 2eb5133..bec3b29 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -131,29 +131,41 @@ #define SYSC_IDLEMODE_SMART 0x2 #define SYSC_CLOCKACTIVITY_FCLK 0x2 +/* Errata definitions */ +#define I2C_OMAP_ERRATA_I207 (1 0) +#define I2C_OMAP_ERRATA_I462 (1 1) + /* i2c driver flags from kernel */ -#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLEBIT(3) +#define OMAP_I2C_FLAG_NO_FIFOBIT(0) +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) #define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 #define OMAP_I2C_FLAG_BUS_SHIFT_1BIT(7) #define OMAP_I2C_FLAG_BUS_SHIFT_2BIT(8) #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 +/* timeout waiting for the controller to respond */ +#define OMAP_I2C_TIMEOUT (1000 * MSECOND)/* ms */ + struct omap_i2c_struct { void*base; u8 reg_shift; struct omap_i2c_driver_data *data; struct resource *ioarea; u32 speed; /* Speed of bus in Khz */ + u16 scheme; u16 cmd_err; u8 *buf; + u8 *regs; size_t buf_len; struct i2c_adapter adapter; + u8 threshold; u8 fifo_size; /* use as flag and value * fifo_size==0 implies no fifo * if set, should be trsh+1 */ - u8 rev; + u32 rev; unsignedb_hw:1; /* bad h/w fixes */ + unsignedreceiver:1; /* true for receiver mode */ u16 iestate;/* Saved interrupt register */ u16 pscstate; u16 scllstate; @@ -161,6 +173,7 @@ struct omap_i2c_struct { u16 bufstate; u16 syscstate; u16 westate; + u16 errata; }; #define to_omap_i2c_struct(a)container_of(a, struct omap_i2c_struct, adapter) @@ -183,14 +196,15 @@ enum { OMAP_I2C_SCLH_REG, OMAP_I2C_SYSTEST_REG, OMAP_I2C_BUFSTAT_REG, - OMAP_I2C_REVNB_LO, - OMAP_I2C_REVNB_HI, - OMAP_I2C_IRQSTATUS_RAW, - OMAP_I2C_IRQENABLE_SET, - OMAP_I2C_IRQENABLE_CLR, + /* only on OMAP4430 */ + OMAP_I2C_IP_V2_REVNB_LO, + OMAP_I2C_IP_V2_REVNB_HI, + OMAP_I2C_IP_V2_IRQSTATUS_RAW, + OMAP_I2C_IP_V2_IRQENABLE_SET, + OMAP_I2C_IP_V2_IRQENABLE_CLR, }; -static const u8 reg_map[] = { +static const u8 reg_map_ip_v1[] = { [OMAP_I2C_REV_REG] = 0x00, [OMAP_I2C_IE_REG] = 0x01, [OMAP_I2C_STAT_REG] = 0x02, @@ -211,7 +225,7 @@ static const u8 reg_map[] = { [OMAP_I2C_BUFSTAT_REG] = 0x10, }; -static const u8 omap4_reg_map[] = { +static const u8 reg_map_ip_v2[] = { [OMAP_I2C_REV_REG] = 0x04, [OMAP_I2C_IE_REG] = 0x2c, [OMAP_I2C_STAT_REG] = 0x28, @@ -230,92 +244,104 @@ static const u8 omap4_reg_map[] = {
[PATCH] i2c-omap: Update driver
The driver didn't work well with at24 driver. NACKS are lost. Errors are lost in isr due to the local variable err. Also we didn't wait for bus free in omap_i2c_xfer_msg. Fix issues and get other improvements from linux kernel Tested on OMAP4 and AM335x Signed-off-by: Jan Weitzel j.weit...@phytec.de --- arch/arm/mach-omap/include/mach/generic.h |9 +- drivers/i2c/busses/i2c-omap.c | 635 - include/i2c/i2c.h |1 + 3 files changed, 454 insertions(+), 191 deletions(-) diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h index ece8c2b..31ab100 100644 --- a/arch/arm/mach-omap/include/mach/generic.h +++ b/arch/arm/mach-omap/include/mach/generic.h @@ -2,12 +2,13 @@ #define _MACH_GENERIC_H /* I2C controller revisions */ -#define OMAP_I2C_REV_2 0x20 +#define OMAP_I2C_OMAP1_REV_20x20 /* I2C controller revisions present on specific hardware */ -#define OMAP_I2C_REV_ON_2430 0x36 -#define OMAP_I2C_REV_ON_3430 0x3C -#define OMAP_I2C_REV_ON_4430 0x40 +#define OMAP_I2C_REV_ON_2430 0x0036 +#define OMAP_I2C_REV_ON_3430_3530 0x003C +#define OMAP_I2C_REV_ON_36300x0040 +#define OMAP_I2C_REV_ON_4430_PLUS 0x5042 #ifdef CONFIG_ARCH_OMAP #define cpu_is_omap2430() (1) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 2eb5133..bec3b29 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -131,29 +131,41 @@ #define SYSC_IDLEMODE_SMART0x2 #define SYSC_CLOCKACTIVITY_FCLK0x2 +/* Errata definitions */ +#define I2C_OMAP_ERRATA_I207 (1 0) +#define I2C_OMAP_ERRATA_I462 (1 1) + /* i2c driver flags from kernel */ -#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) +#define OMAP_I2C_FLAG_NO_FIFO BIT(0) +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) #define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 #define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) #define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) #define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 +/* timeout waiting for the controller to respond */ +#define OMAP_I2C_TIMEOUT (1000 * MSECOND)/* ms */ + struct omap_i2c_struct { void*base; u8 reg_shift; struct omap_i2c_driver_data *data; struct resource *ioarea; u32 speed; /* Speed of bus in Khz */ + u16 scheme; u16 cmd_err; u8 *buf; + u8 *regs; size_t buf_len; struct i2c_adapter adapter; + u8 threshold; u8 fifo_size; /* use as flag and value * fifo_size==0 implies no fifo * if set, should be trsh+1 */ - u8 rev; + u32 rev; unsignedb_hw:1; /* bad h/w fixes */ + unsignedreceiver:1; /* true for receiver mode */ u16 iestate;/* Saved interrupt register */ u16 pscstate; u16 scllstate; @@ -161,6 +173,7 @@ struct omap_i2c_struct { u16 bufstate; u16 syscstate; u16 westate; + u16 errata; }; #define to_omap_i2c_struct(a) container_of(a, struct omap_i2c_struct, adapter) @@ -183,14 +196,15 @@ enum { OMAP_I2C_SCLH_REG, OMAP_I2C_SYSTEST_REG, OMAP_I2C_BUFSTAT_REG, - OMAP_I2C_REVNB_LO, - OMAP_I2C_REVNB_HI, - OMAP_I2C_IRQSTATUS_RAW, - OMAP_I2C_IRQENABLE_SET, - OMAP_I2C_IRQENABLE_CLR, + /* only on OMAP4430 */ + OMAP_I2C_IP_V2_REVNB_LO, + OMAP_I2C_IP_V2_REVNB_HI, + OMAP_I2C_IP_V2_IRQSTATUS_RAW, + OMAP_I2C_IP_V2_IRQENABLE_SET, + OMAP_I2C_IP_V2_IRQENABLE_CLR, }; -static const u8 reg_map[] = { +static const u8 reg_map_ip_v1[] = { [OMAP_I2C_REV_REG] = 0x00, [OMAP_I2C_IE_REG] = 0x01, [OMAP_I2C_STAT_REG] = 0x02, @@ -211,7 +225,7 @@ static const u8 reg_map[] = { [OMAP_I2C_BUFSTAT_REG] = 0x10, }; -static const u8 omap4_reg_map[] = { +static const u8 reg_map_ip_v2[] = { [OMAP_I2C_REV_REG] = 0x04, [OMAP_I2C_IE_REG] = 0x2c, [OMAP_I2C_STAT_REG] = 0x28, @@ -230,92 +244,104 @@ static const u8 omap4_reg_map[] = { [OMAP_I2C_SCLH_REG] = 0xb8, [OMAP_I2C_SYSTEST_REG] = 0xbc, [OMAP_I2C_BUFSTAT_REG] = 0xc0, -