[PATCH 1/3] Add support for OMAP4460 TPS62361

2012-08-14 Thread Jan Weitzel 
based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: F. Gasnier fabrice.gasn...@cenosys.com
Signed-off-by: Jan Weitzel 
---
 arch/arm/boards/panda/lowlevel.c|4 ++-
 arch/arm/boards/pcm049/lowlevel.c   |4 ++-
 arch/arm/boards/phycard-a-xl2/lowlevel.c|4 ++-
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   15 +
 arch/arm/mach-omap/include/mach/omap4-silicon.h |9 +-
 arch/arm/mach-omap/omap4_clock.c|   19 +++
 arch/arm/mach-omap/omap4_generic.c  |   39 +-
 7 files changed, 88 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c
index 8591fff..0b4b199 100644
--- a/arch/arm/boards/panda/lowlevel.c
+++ b/arch/arm/boards/panda/lowlevel.c
@@ -28,6 +28,8 @@
 #include 
 #include 
 
+#define TPS62361_VSEL0_GPIO7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_400_mhz_2cs = {
@@ -70,7 +72,7 @@ static void noinline panda_init_lowlevel(void)
omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
board_init_lowlevel_return();
 }
diff --git a/arch/arm/boards/pcm049/lowlevel.c 
b/arch/arm/boards/pcm049/lowlevel.c
index 5b91098..5e591fa 100644
--- a/arch/arm/boards/pcm049/lowlevel.c
+++ b/arch/arm/boards/pcm049/lowlevel.c
@@ -28,6 +28,8 @@
 #include 
 #include 
 
+#define TPS62361_VSEL0_GPIO182
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -57,7 +59,7 @@ static void noinline pcm049_init_lowlevel(void)
omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c 
b/arch/arm/boards/phycard-a-xl2/lowlevel.c
index b8de2aa..2aa79a8 100644
--- a/arch/arm/boards/phycard-a-xl2/lowlevel.c
+++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c
@@ -28,6 +28,8 @@
 #include 
 #include 
 
+#define TPS62361_VSEL0_GPIO7
+
 void set_muxconf_regs(void);
 
 static const struct ddr_regs ddr_regs_mt42L64M64_25_400_mhz = {
@@ -57,7 +59,7 @@ static noinline void pcaaxl2_init_lowlevel(void)
omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core);
 
/* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
-   omap4_scale_vcores();
+   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
 
writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h 
b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 0a31d09..391ee63 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -271,6 +271,20 @@
 #define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
 #define PLL_LOCK   7 /* MPU, IVA, CORE & PER */
 
+/* TPS */
+#define TPS62361_I2C_SLAVE_ADDR0x60
+#define TPS62361_REG_ADDR_SET0 0x0
+#define TPS62361_REG_ADDR_SET1 0x1
+#define TPS62361_REG_ADDR_SET2 0x2
+#define TPS62361_REG_ADDR_SET3 0x3
+#define TPS62361_REG_ADDR_CTRL 0x4
+#define TPS62361_REG_ADDR_TEMP 0x5
+#define TPS62361_REG_ADDR_RMP_CTRL 0x6
+#define TPS62361_REG_ADDR_CHIP_ID  0x8
+#define TPS62361_REG_ADDR_CHIP_ID_20x9
+
+#define TPS62361_BASE_VOLT_MV  500
+
 /* Used to index into DPLL parameter tables */
 struct dpll_param {
unsigned int m;
@@ -317,4 +331,5 @@ void omap4_configure_core_dpll_no_lock(const struct 
dpll_param *param);
 void omap4_lock_core_dpll(void);
 void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
 void omap4_enable_all_clocks(void);
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index c785475..d5517c5 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -60,6 +60,13 @@
 #define OMAP44XX_PRM_VC_VAL_BYPASS (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba0)
 #define OMAP44XX_PRM_VC_CFG_I2C_MODE   (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba8)
 #define OMAP44XX_PRM_VC_CFG_I2C_CLK(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7bac)
+#define OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT   0x100
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_MASK  0x7F
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT   8
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_MASK0xFF
+#define OMAP44XX_PRM_VC_VAL_B

Re: [PATCH 1/3] Add support for OMAP4460 TPS62361

2012-08-03 Thread Sascha Hauer 
On Fri, Jul 27, 2012 at 03:40:02PM +0200, Jan Weitzel wrote:
> based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
> TPS62361 is the new power supply used in OMAP4460 that
> supplies vdd_mpu.
> 
>  
> -noinline int omap4_scale_vcores(void)
> +noinline int omap4_scale_vcores(unsigned vsel0_pin)

Please fix the users of omap4_scale_vcores in this patch aswell.

Sascha

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[PATCH 1/3] Add support for OMAP4460 TPS62361

2012-07-27 Thread Jan Weitzel 
based on: [U-Boot] [PATCH v 4/5] omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: F. Gasnier fabrice.gasn...@cenosys.com
Signed-off-by: Jan Weitzel 
---
 arch/arm/mach-omap/include/mach/omap4-clock.h   |   15 +
 arch/arm/mach-omap/include/mach/omap4-silicon.h |9 +-
 arch/arm/mach-omap/omap4_clock.c|   19 +++
 arch/arm/mach-omap/omap4_generic.c  |   39 +-
 4 files changed, 79 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-omap/include/mach/omap4-clock.h 
b/arch/arm/mach-omap/include/mach/omap4-clock.h
index 0a31d09..391ee63 100644
--- a/arch/arm/mach-omap/include/mach/omap4-clock.h
+++ b/arch/arm/mach-omap/include/mach/omap4-clock.h
@@ -271,6 +271,20 @@
 #define PLL_FAST_RELOCK_BYPASS 6 /* CORE */
 #define PLL_LOCK   7 /* MPU, IVA, CORE & PER */
 
+/* TPS */
+#define TPS62361_I2C_SLAVE_ADDR0x60
+#define TPS62361_REG_ADDR_SET0 0x0
+#define TPS62361_REG_ADDR_SET1 0x1
+#define TPS62361_REG_ADDR_SET2 0x2
+#define TPS62361_REG_ADDR_SET3 0x3
+#define TPS62361_REG_ADDR_CTRL 0x4
+#define TPS62361_REG_ADDR_TEMP 0x5
+#define TPS62361_REG_ADDR_RMP_CTRL 0x6
+#define TPS62361_REG_ADDR_CHIP_ID  0x8
+#define TPS62361_REG_ADDR_CHIP_ID_20x9
+
+#define TPS62361_BASE_VOLT_MV  500
+
 /* Used to index into DPLL parameter tables */
 struct dpll_param {
unsigned int m;
@@ -317,4 +331,5 @@ void omap4_configure_core_dpll_no_lock(const struct 
dpll_param *param);
 void omap4_lock_core_dpll(void);
 void omap4_lock_core_dpll_shadow(const struct dpll_param *param);
 void omap4_enable_all_clocks(void);
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv);
 
diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h 
b/arch/arm/mach-omap/include/mach/omap4-silicon.h
index c785475..d5517c5 100644
--- a/arch/arm/mach-omap/include/mach/omap4-silicon.h
+++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h
@@ -60,6 +60,13 @@
 #define OMAP44XX_PRM_VC_VAL_BYPASS (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba0)
 #define OMAP44XX_PRM_VC_CFG_I2C_MODE   (OMAP44XX_WAKEUP_L4_IO_BASE + 0x7ba8)
 #define OMAP44XX_PRM_VC_CFG_I2C_CLK(OMAP44XX_WAKEUP_L4_IO_BASE + 0x7bac)
+#define OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT   0x100
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT 0
+#define OMAP44XX_PRM_VC_VAL_BYPASS_SLAVEADDR_MASK  0x7F
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT   8
+#define OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_MASK0xFF
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT  16
+#define OMAP44XX_PRM_VC_VAL_BYPASS_DATA_MASK   0xFF
 
 /* IRQ */
 #define OMAP44XX_PRM_IRQSTATUS_MPU_A9  (OMAP44XX_WAKEUP_L4_IO_BASE + 0x6010)
@@ -178,6 +185,6 @@ struct dpll_param;
 void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *);
 void omap4_power_i2c_send(u32);
 unsigned int omap4_revision(void);
-noinline int omap4_scale_vcores(void);
+noinline int omap4_scale_vcores(unsigned vsel0_pin);
 
 #endif
diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
index 3ab01f0..564a748 100644
--- a/arch/arm/mach-omap/omap4_clock.c
+++ b/arch/arm/mach-omap/omap4_clock.c
@@ -1,6 +1,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define LDELAY 1200
@@ -378,3 +379,21 @@ void omap4_enable_all_clocks(void)
sr32(CM_L3INIT_USBPHY_CLKCTRL, 0, 32, 0x301);
 }
 
+void omap4_do_scale_tps62361(u32 reg, u32 volt_mv)
+{
+   u32 temp, step;
+
+   step = volt_mv - TPS62361_BASE_VOLT_MV;
+   step /= 10;
+
+   temp = TPS62361_I2C_SLAVE_ADDR |
+   (reg << OMAP44XX_PRM_VC_VAL_BYPASS_REGADDR_SHIFT) |
+   (step << OMAP44XX_PRM_VC_VAL_BYPASS_DATA_SHIFT) |
+   OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT;
+   debug("do_scale_tps62361: volt - %d step - 0x%x\n", volt_mv, step);
+
+   writel(temp, OMAP44XX_PRM_VC_VAL_BYPASS);
+   if (!wait_on_value(OMAP44XX_PRM_VC_VAL_BYPASS_VALID_BIT, 0,
+   OMAP44XX_PRM_VC_VAL_BYPASS, LDELAY))
+   puts("Scaling voltage failed for vdd_mpu from TPS\n");
+}
diff --git a/arch/arm/mach-omap/omap4_generic.c 
b/arch/arm/mach-omap/omap4_generic.c
index de69934..07aa2b4 100644
--- a/arch/arm/mach-omap/omap4_generic.c
+++ b/arch/arm/mach-omap/omap4_generic.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  *  The following several lines are taken from U-Boot to support
@@ -466,7 +467,7 @@ enum omap_boot_src omap4_bootsrc(void)
 
 #define I2C_SLAVE 0x12
 
-noinline int omap4_scale_vcores(void)
+noinline int omap4_scale_vcores(unsigned vsel0_pin)
 {
unsigned int rev = omap4_revision();
 
@@ -476,8 +477,41 @@ noinline int omap4_scale_vcores(void)
writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE);
w