Re: [PATCH 14/14] Add support for Archos G9 tablet

2012-10-22 Thread Jan Weitzel 
Am Sonntag, den 21.10.2012, 03:00 +0200 schrieb vj:
> On Fri, Oct 19, 2012 at 1:10 PM, Jan Weitzel  wrote:
> >> diff --git a/arch/arm/boards/archosg9/lowlevel.c 
> >> b/arch/arm/boards/archosg9/lowlevel.c
> >> new file mode 100644
> >> index 000..fa5be1d
> >> --- /dev/null
> >> +++ b/arch/arm/boards/archosg9/lowlevel.c
> >> @@ -0,0 +1,79 @@
> >> +/*
> >> + * This program is free software; you can redistribute it and/or
> >> + * modify it under the terms of the GNU General Public License as
> >> + * published by the Free Software Foundation; either version 2 of
> >> + * the License, or (at your option) any later version.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + * GNU General Public License for more details.
> >> + */
> >> +
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include "mux.h"
> >> +
> >> +#define TPS62361_VSEL0_GPIO7
> >> +
> >> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> >> + .tim1 = 0x10EB0662,
> >> + .tim2 = 0x20370DD2,
> >> + .tim3 = 0x00B1C33F,
> >> + .phy_ctrl_1   = 0x849FF408,
> >> + .ref_ctrl = 0x0618,
> >> + .config_init  = 0x8EB9,
> >> + .config_final = 0x80001AB9,
> >> + .zq_config= 0xD00B3215,
> >> + .mr1  = 0x83,
> >> + .mr2  = 0x4
> >> +};
> >> +
> >> +static noinline void archosg9_init_lowlevel(void)
> >> +{
> >> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
> >> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
> > This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
> >> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
> >> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
> >> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
> >> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
> >> +
> >> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
> >> +
> >> + /* Configure all DPLL's at 100% OPP */
> >> + omap4_configure_mpu_dpll(&mpu);
> >> + omap4_configure_iva_dpll(&iva);
> >> + omap4_configure_per_dpll(&per);
> >> + omap4_configure_abe_dpll(&abe);
> >> + omap4_configure_usb_dpll(&usb);
> >> +
> >> + /* Enable all clocks */
> >> + omap4_enable_all_clocks();
> >> +
> >> + set_muxconf_regs();
> >> +
> >> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
> >> +
> >> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> >> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
> > According to TIs DM the sequence for going into a higher OPP is to first
> > raise the voltage. I saw this is also wrong on pandaboard.
> > They also say rise core freq before mpu freq so the order should be
> > omap4_scale_vcores
> > omap4_ddr_init
> > omap4_configure_mpu_dpll
> >
> > I'll fix and test the order on PCM049
> >
> > Jan
> 
> The only way I could make it work on archosG9 is with this order:
>   set_muxconf_regs();
>   writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
>   omap4_enable_all_clocks();
>   omap4_scale_vcores(TPS62361_VSEL0_GPIO);
>   omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
>   omap4_configure_mpu_dpll(&mpu);
>   ...
I think you need al least omap4_enable_gpio1_wup_clocks for using 
TPS62361_VSEL0_GPIO.

Jan
> Is this correct? That is, enable_all_clocks can be done before scale_vcores?
> It will depend on the default clock frequencies, I think.
> 
> Vicente



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Re: [PATCH 14/14] Add support for Archos G9 tablet

2012-10-20 Thread vj 
On Fri, Oct 19, 2012 at 1:10 PM, Jan Weitzel  wrote:
>> diff --git a/arch/arm/boards/archosg9/lowlevel.c 
>> b/arch/arm/boards/archosg9/lowlevel.c
>> new file mode 100644
>> index 000..fa5be1d
>> --- /dev/null
>> +++ b/arch/arm/boards/archosg9/lowlevel.c
>> @@ -0,0 +1,79 @@
>> +/*
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include "mux.h"
>> +
>> +#define TPS62361_VSEL0_GPIO7
>> +
>> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
>> + .tim1 = 0x10EB0662,
>> + .tim2 = 0x20370DD2,
>> + .tim3 = 0x00B1C33F,
>> + .phy_ctrl_1   = 0x849FF408,
>> + .ref_ctrl = 0x0618,
>> + .config_init  = 0x8EB9,
>> + .config_final = 0x80001AB9,
>> + .zq_config= 0xD00B3215,
>> + .mr1  = 0x83,
>> + .mr2  = 0x4
>> +};
>> +
>> +static noinline void archosg9_init_lowlevel(void)
>> +{
>> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
>> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
> This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
>> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
>> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
>> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
>> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
>> +
>> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
>> +
>> + /* Configure all DPLL's at 100% OPP */
>> + omap4_configure_mpu_dpll(&mpu);
>> + omap4_configure_iva_dpll(&iva);
>> + omap4_configure_per_dpll(&per);
>> + omap4_configure_abe_dpll(&abe);
>> + omap4_configure_usb_dpll(&usb);
>> +
>> + /* Enable all clocks */
>> + omap4_enable_all_clocks();
>> +
>> + set_muxconf_regs();
>> +
>> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
>> +
>> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
>> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
> According to TIs DM the sequence for going into a higher OPP is to first
> raise the voltage. I saw this is also wrong on pandaboard.
> They also say rise core freq before mpu freq so the order should be
> omap4_scale_vcores
> omap4_ddr_init
> omap4_configure_mpu_dpll
>
> I'll fix and test the order on PCM049
>
> Jan

The only way I could make it work on archosG9 is with this order:
  set_muxconf_regs();
  writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
  omap4_enable_all_clocks();
  omap4_scale_vcores(TPS62361_VSEL0_GPIO);
  omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
  omap4_configure_mpu_dpll(&mpu);
  ...

Is this correct? That is, enable_all_clocks can be done before scale_vcores?
It will depend on the default clock frequencies, I think.

Vicente

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Re: [PATCH 14/14] Add support for Archos G9 tablet

2012-10-19 Thread Jan Weitzel 
> diff --git a/arch/arm/boards/archosg9/lowlevel.c 
> b/arch/arm/boards/archosg9/lowlevel.c
> new file mode 100644
> index 000..fa5be1d
> --- /dev/null
> +++ b/arch/arm/boards/archosg9/lowlevel.c
> @@ -0,0 +1,79 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "mux.h"
> +
> +#define TPS62361_VSEL0_GPIO7
> +
> +static const struct ddr_regs ddr_regs_400_mhz_2cs = {
> + .tim1 = 0x10EB0662,
> + .tim2 = 0x20370DD2,
> + .tim3 = 0x00B1C33F,
> + .phy_ctrl_1   = 0x849FF408,
> + .ref_ctrl = 0x0618,
> + .config_init  = 0x8EB9,
> + .config_final = 0x80001AB9,
> + .zq_config= 0xD00B3215,
> + .mr1  = 0x83,
> + .mr2  = 0x4
> +};
> +
> +static noinline void archosg9_init_lowlevel(void)
> +{
> + struct dpll_param core = OMAP4_CORE_DPLL_PARAM_19M2_DDR400;
> + struct dpll_param mpu = OMAP4_MPU_DPLL_PARAM_19M2_MPU600;
This if OPP100 for 4430, for 4460 OPP100 defines 700MHz.
> + struct dpll_param iva = OMAP4_IVA_DPLL_PARAM_19M2;
> + struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2;
> + struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2;
> + struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2;
> +
> + writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL);
> +
> + /* Configure all DPLL's at 100% OPP */
> + omap4_configure_mpu_dpll(&mpu);
> + omap4_configure_iva_dpll(&iva);
> + omap4_configure_per_dpll(&per);
> + omap4_configure_abe_dpll(&abe);
> + omap4_configure_usb_dpll(&usb);
> +
> + /* Enable all clocks */
> + omap4_enable_all_clocks();
> +
> + set_muxconf_regs();
> +
> + omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core);
> +
> + /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */
> + omap4_scale_vcores(TPS62361_VSEL0_GPIO);
According to TIs DM the sequence for going into a higher OPP is to first
raise the voltage. I saw this is also wrong on pandaboard. 
They also say rise core freq before mpu freq so the order should be
omap4_scale_vcores
omap4_ddr_init
omap4_configure_mpu_dpll

I'll fix and test the order on PCM049

Jan
> + board_init_lowlevel_return();
> +}
> +
> +void __naked __bare_init reset(void)
> +{
> + u32 r;
> +
> + common_reset();
> +
> + r = 0x4030D000;
> + __asm__ __volatile__("mov sp, %0" : : "r"(r));
> +
> + archosg9_init_lowlevel();
> +}
> diff --git a/arch/arm/boards/archosg9/mux.c b/arch/arm/boards/archosg9/mux.c
> new file mode 100644
> index 000..7ca5057
> --- /dev/null
> +++ b/arch/arm/boards/archosg9/mux.c
> @@ -0,0 +1,459 @@
> +/*
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "mux.h"
> +
> +static const struct pad_conf_entry core_padconf_array[] = {
> + /* sdmmc2_dat0 */ /* internal FLASH */
> + { GPMC_AD0,   IEN | PTU | M1 },
> + /* sdmmc2_dat1 */ /* internal FLASH */
> + { GPMC_AD1,   IEN | PTU | M1 },
> + /* sdmmc2_dat2 */ /* internal FLASH */
> + { GPMC_AD2,   IEN | PTU | M1 },
> + /* sdmmc2_dat3 */ /* internal FLASH */
> + { GPMC_AD3,   IEN | PTU | M1 },
> + /* sdmmc2_dat4 */ /* internal FLASH */
> + { GPMC_AD4,   IEN | PTU | M1 },
> + /* sdmmc2_dat5 */ /* internal FLASH */
> + { GPMC_AD5,   IEN | PTU | M1 },
> + /* sdmmc2_dat6 */ /* internal FLASH */
> + { GPMC_AD6,   IEN | PTU | M1 },
> + /* sdmmc2_dat7 */ /* internal FLASH */
> + { GPMC_AD7,   IEN | PTU | M1 },
> + /* gpio_32

[PATCH 14/14] Add support for Archos G9 tablet

2012-10-08 Thread Vicente 

Signed-off-by: Vicente 
---
 arch/arm/Makefile |   1 +
 arch/arm/boards/archosg9/Makefile |   3 +
 arch/arm/boards/archosg9/board.c  |  71 +
 arch/arm/boards/archosg9/config.h |   1 +
 arch/arm/boards/archosg9/env/config   |   1 +
 arch/arm/boards/archosg9/env/init/usbboot |   5 +
 arch/arm/boards/archosg9/lowlevel.c   |  79 +
 arch/arm/boards/archosg9/mux.c| 459 ++
 arch/arm/boards/archosg9/mux.h|   6 +
 arch/arm/configs/archosg9_defconfig   |  70 +
 arch/arm/configs/archosg9_xload_defconfig |  24 ++
 arch/arm/mach-omap/Kconfig|   9 +
 12 files changed, 729 insertions(+)
 create mode 100644 arch/arm/boards/archosg9/Makefile
 create mode 100644 arch/arm/boards/archosg9/board.c
 create mode 100644 arch/arm/boards/archosg9/config.h
 create mode 100644 arch/arm/boards/archosg9/env/config
 create mode 100644 arch/arm/boards/archosg9/env/init/usbboot
 create mode 100644 arch/arm/boards/archosg9/lowlevel.c
 create mode 100644 arch/arm/boards/archosg9/mux.c
 create mode 100644 arch/arm/boards/archosg9/mux.h
 create mode 100644 arch/arm/configs/archosg9_defconfig
 create mode 100644 arch/arm/configs/archosg9_xload_defconfig

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 855043a..de570d7 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -101,6 +101,7 @@ board-$(CONFIG_MACH_OMAP343xSDP):= omap343xdsp
 board-$(CONFIG_MACH_BEAGLE):= beagle
 board-$(CONFIG_MACH_OMAP3EVM)  := omap3evm
 board-$(CONFIG_MACH_PANDA) := panda
+board-$(CONFIG_MACH_ARCHOSG9)  := archosg9
 board-$(CONFIG_MACH_PCM049):= pcm049
 board-$(CONFIG_MACH_PCA100):= phycard-i.MX27
 board-$(CONFIG_MACH_PCAAL1):= phycard-a-l1
diff --git a/arch/arm/boards/archosg9/Makefile 
b/arch/arm/boards/archosg9/Makefile
new file mode 100644
index 000..256eaf6
--- /dev/null
+++ b/arch/arm/boards/archosg9/Makefile
@@ -0,0 +1,3 @@
+obj-y += board.o
+obj-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel.o mux.o
+pbl-$(CONFIG_MACH_DO_LOWLEVEL_INIT) += lowlevel.o mux.o
diff --git a/arch/arm/boards/archosg9/board.c b/arch/arm/boards/archosg9/board.c
new file mode 100644
index 000..7076c6f
--- /dev/null
+++ b/arch/arm/boards/archosg9/board.c
@@ -0,0 +1,71 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static struct NS16550_plat serial_plat = {
+   .clock = 4800, /* 48MHz (APLL96/2) */
+   .shift = 2,
+};
+static int archosg9_console_init(void){
+   if (IS_ENABLED(CONFIG_DRIVER_SERIAL_OMAP4_USBBOOT))
+   add_generic_device("serial_omap4_usbboot", DEVICE_ID_DYNAMIC
+   , NULL, 0, 0, 0, NULL);
+   if (IS_ENABLED(CONFIG_DRIVER_SERIAL_NS16550)) {
+   gpio_direction_output(41, 0); /* gps_disable */
+   gpio_direction_output(34, 1); /* 1v8_pwron */
+   add_ns16550_device(DEVICE_ID_DYNAMIC, OMAP44XX_UART1_BASE, 1024,
+   IORESOURCE_MEM_8BIT, &serial_plat);
+   }
+   return 0;
+}
+console_initcall(archosg9_console_init);
+
+static int archosg9_mem_init(void){
+   arm_add_mem_device("ram0", 0x8000, SZ_1G);
+   return 0;
+}
+mem_initcall(archosg9_mem_init);
+
+static struct i2c_board_info i2c_devices[] = {
+   { I2C_BOARD_INFO("twl6030", 0x48), },
+};
+
+static int archosg9_devices_init(void){
+   i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices));
+   add_generic_device("i2c-omap"  , DEVICE_ID_DYNAMIC, NULL,
+   OMAP44XX_I2C1_BASE, 0x100, IORESOURCE_MEM, NULL);
+   add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL,
+   OMAP44XX_MMC1_BASE, SZ_4K, IORESOURCE_MEM, NULL);
+   add_generic_device("omap-hsmmc", DEVICE_ID_DYNAMIC, NULL,
+   OMAP44XX_MMC2_BASE, SZ_4K, IORESOURCE_MEM, NULL);
+
+   armlinux_set_bootparams((void *)0x8100);
+   /*
+* This should be:
+* armlinux_set_architecture(MACH_TYPE_OMAP4_ARCHOSG9);
+* But Archos has not registered it's board to arch/arm/tools/mach-types
+* So here there is the hardcoded value
+*/
+   armlinux_set_architecture(5032);
+
+   return 0;
+}
+device_initcall(archosg9_devices_init);
diff --git a/arch/arm/boards/archosg9/co