The generic DT image for RISC-V mimics a kernel image and specifies
a load offset that it expects to be honoured. The stack should then
grow down from the load address. This didn't work as intended though
with riscv64-linux-gnu-gcc (Debian 10.2.1-6), because of the entry
point's __naked attribute: local variables overwrote the first bytes
of the entry point. Fix this by using a noinline nonnaked function.
Signed-off-by: Ahmad Fatoum
---
arch/riscv/boot/board-dt-2nd.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/boot/board-dt-2nd.c b/arch/riscv/boot/board-dt-2nd.c
index f31c48a906c2..8b78e1b11d31 100644
--- a/arch/riscv/boot/board-dt-2nd.c
+++ b/arch/riscv/boot/board-dt-2nd.c
@@ -40,7 +40,8 @@ static const struct fdt_device_id console_ids[] = {
{ /* sentinel */ }
};
-ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2)
+static void noinline __noreturn start_dt_2nd_nonnaked(unsigned long hartid,
+ unsigned long _fdt)
{
unsigned long membase, memsize, endmem, endfdt, uncompressed_len;
struct fdt_header *fdt = (void *)_fdt;
@@ -75,3 +76,8 @@ ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2)
barebox_riscv_supervisor_entry(membase, memsize, hartid, fdt);
}
+
+ENTRY_FUNCTION(start_dt_2nd, hartid, _fdt, a2)
+{
+ start_dt_2nd_nonnaked(hartid, _fdt);
+}
--
2.30.2
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