date:20160204

[Beignet] [Printf v2][PATCH 07/12] Implement emision of printf instruction.

2016-02-04 Thread yan . wang

From: Yan Wang 

Contributor: Junyan He 
Signed-off-by: Yan Wang 
---
 backend/src/llvm/llvm_gen_backend.cpp | 95 +--
 1 file changed, 80 insertions(+), 15 deletions(-)

diff --git a/backend/src/llvm/llvm_gen_backend.cpp 
b/backend/src/llvm/llvm_gen_backend.cpp
index dba9dba..4870285 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -486,6 +486,9 @@ namespace gbe
 typedef map>::iterator PtrOrigMapIter;
 // map pointer source to bti
 map BtiMap;
+// map printf pointer source to bti
+int printfBti;
+uint32_t printfNum;
 // map ptr to its bti register
 map BtiValueMap;
 // map ptr to it's base
@@ -520,6 +523,8 @@ namespace gbe
 unit(unit),
 ctx(unit),
 regTranslator(ctx),
+printfBti(-1),
+printfNum(0),
 LI(0),
 TheModule(0),
 btiBase(BTI_RESERVED_NUM),
@@ -586,6 +591,7 @@ namespace gbe
   addrStoreInst.clear();
   // Reset for next function
   btiBase = BTI_RESERVED_NUM;
+  printfBti = -1;
   return false;
 }
 /*! Given a possible pointer value, find out the interested escape like
@@ -594,7 +600,7 @@ namespace gbe
 /*! For all possible pointers, GlobalVariable, function pointer argument,
 alloca instruction, find their pointer escape points */
 void analyzePointerOrigin(Function );
-unsigned getNewBti(Value *origin, bool isImage);
+unsigned getNewBti(Value *origin, bool force);
 void assignBti(Function );
 bool isSingleBti(Value *Val);
 Value *getBtiRegister(Value *v);
@@ -717,11 +723,10 @@ namespace gbe
 // handle load of dword/qword with unaligned address
 void emitUnalignedDQLoadStore(ir::Register ptr, Value *llvmValues, 
ir::AddressSpace addrSpace, ir::Register bti, bool isLoad, bool dwAligned, bool 
fixedBTI);
 void visitInstruction(Instruction ) {NOT_SUPPORTED;}
-void* getPrintfInfo(CallInst* inst)
-{
-  if ([inst])
-return (void*)[inst];
-  return NULL;
+ir::PrintfSet::PrintfFmt* getPrintfInfo(CallInst* inst) {
+  if (unit.printfs.find(inst) == unit.printfs.end())
+return NULL;
+  return [inst];
 }
 private:
   void setDebugInfo_CTX(llvm::Instruction * insn); // store the debug 
infomation in context for subsequently passing to Gen insn
@@ -1127,21 +1132,15 @@ namespace gbe
 }
   }
 
-  unsigned GenWriter::getNewBti(Value *origin, bool isImage) {
+  unsigned GenWriter::getNewBti(Value *origin, bool force) {
 unsigned new_bti = 0;
-if (isImage) {
+if (force) {
   new_bti = btiBase;
   incBtiBase();
   return new_bti;
 }
 
-if(origin->getName().equals(StringRef("__gen_ocl_printf_buf"))) {
-  new_bti = btiBase;
-  incBtiBase();
-} else if 
(origin->getName().equals(StringRef("__gen_ocl_printf_index_buf"))) {
-  new_bti = btiBase;
-  incBtiBase();
-} else if (origin->getName().equals(StringRef("__gen_ocl_profiling_buf"))) 
{
+if (origin->getName().equals(StringRef("__gen_ocl_profiling_buf"))) {
   new_bti = btiBase;
   incBtiBase();
 }
@@ -3716,6 +3715,16 @@ namespace gbe
 this->newRegister();
 break;
   case GEN_OCL_PRINTF:
+this->newRegister();  // fall through
+  case GEN_OCL_PUTS:
+  {
+ // We need a new BTI as printf output.
+ if (printfBti < 0) {
+   printfBti = this->getNewBti(, true);
+   ctx.getFunction().getPrintfSet()->setBufBTI(printfBti);
+ }
+ break;
+  }
   case GEN_OCL_CALC_TIMESTAMP:
   case GEN_OCL_STORE_PROFILING:
   case GEN_OCL_DEBUGWAIT:
@@ -4527,6 +4536,62 @@ namespace gbe
 
   case GEN_OCL_PRINTF:
   {
+ir::PrintfSet::PrintfFmt* fmt = getPrintfInfo();
+if (fmt == NULL)
+  break;
+
+ctx.getFunction().getPrintfSet()->append(printfNum, fmt);
+
+vector tupleData;
+vector tupleTypeData;
+int argNum = static_cast(I.getNumOperands());
+argNum -= 2; // no fmt and last NULL.
+int realArgNum = argNum;
+
+for (int n = 0; n < argNum; n++) {
+  /* First, ignore %s, the strings are recorded and not passed to 
GPU. */
+  llvm::Constant* args = 
dyn_cast(I.getOperand(n + 1));
+  llvm::Constant* args_ptr = NULL;
+  if (args)
+args_ptr = dyn_cast(args->getOperand(0));
+
+  if (args_ptr) {
+ConstantDataSequential* fmt_arg = 
dyn_cast(args_ptr->getOperand(0));
+if (fmt_arg && fmt_arg->isCString()) {
+  realArgNum--;
+  continue;
+}
+  }
+
+  Type * type = I.getOperand(n + 1)->getType();
+  if (type->isVectorTy()) {
+

[Beignet] [PATCH V2] correct ASM output for byte scattered read/write

2016-02-04 Thread Guo Yejun

v2: correct the simd mode output SIMD8 instead of SIMD4*2
Signed-off-by: Guo Yejun 
---
 backend/src/backend/gen/gen_mesa_disasm.c | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/backend/src/backend/gen/gen_mesa_disasm.c 
b/backend/src/backend/gen/gen_mesa_disasm.c
index 94bae48..26393f4 100644
--- a/backend/src/backend/gen/gen_mesa_disasm.c
+++ b/backend/src/backend/gen/gen_mesa_disasm.c
@@ -409,6 +409,18 @@ static const char *math_function_gen8[16] = {
   [GEN8_MATH_FUNCTION_RSQRTM] = "rsqrtm",
 };
 
+static const char *data_port_data_cache_data_size[] = {
+  "1 byte",
+  "2 bytes",
+  "4 bytes",
+  "Reserved"
+};
+
+static const char *data_port_data_cache_byte_scattered_simd_mode[] = {
+  "SIMD8",
+  "SIMD16",
+};
+
 static const char *data_port_data_cache_simd_mode[] = {
   "SIMD4x2",
   "SIMD16",
@@ -549,6 +561,8 @@ static int gen_version;
 #define UNTYPED_RW_SIMD_MODE(inst) GEN_BITS_FIELD(inst, 
bits3.gen7_untyped_rw.simd_mode)
 #define UNTYPED_RW_CATEGORY(inst)  GEN_BITS_FIELD(inst, 
bits3.gen7_untyped_rw.category)
 #define UNTYPED_RW_MSG_TYPE(inst)  GEN_BITS_FIELD(inst, 
bits3.gen7_untyped_rw.msg_type)
+#define BYTE_RW_SIMD_MODE(inst)GEN_BITS_FIELD(inst, 
bits3.gen7_byte_rw.simd_mode)
+#define BYTE_RW_DATA_SIZE(inst)GEN_BITS_FIELD(inst, 
bits3.gen7_byte_rw.data_size)
 #define SCRATCH_RW_OFFSET(inst)GEN_BITS_FIELD(inst, 
bits3.gen7_scratch_rw.offset)
 #define SCRATCH_RW_BLOCK_SIZE(inst) GEN_BITS_FIELD(inst, 
bits3.gen7_scratch_rw.block_size)
 #define SCRATCH_RW_INVALIDATE_AFTER_READ(inst) GEN_BITS_FIELD(inst, 
bits3.gen7_scratch_rw.invalidate_after_read)
@@ -1455,12 +1469,22 @@ int gen_disasm (FILE *file, const void *inst, uint32_t 
deviceID, uint32_t compac
   break;
 case GEN_SFID_DATAPORT_DATA:
   if(UNTYPED_RW_CATEGORY(inst) == 0) {
-format(file, " (bti: %d, rgba: %d, %s, %s, %s)",
+if(UNTYPED_RW_MSG_TYPE(inst) == 5 || UNTYPED_RW_MSG_TYPE(inst) == 
13)
+  format(file, " (bti: %d, rgba: %d, %s, %s, %s)",
UNTYPED_RW_BTI(inst),
UNTYPED_RW_RGBA(inst),
data_port_data_cache_simd_mode[UNTYPED_RW_SIMD_MODE(inst)],
data_port_data_cache_category[UNTYPED_RW_CATEGORY(inst)],
data_port_data_cache_msg_type[UNTYPED_RW_MSG_TYPE(inst)]);
+else if(UNTYPED_RW_MSG_TYPE(inst) == 4 || 
UNTYPED_RW_MSG_TYPE(inst) == 12)
+  format(file, " (bti: %d, data size: %s, %s, %s, %s)",
+   UNTYPED_RW_BTI(inst),
+   data_port_data_cache_data_size[BYTE_RW_DATA_SIZE(inst)],
+   
data_port_data_cache_byte_scattered_simd_mode[BYTE_RW_SIMD_MODE(inst)],
+   data_port_data_cache_category[UNTYPED_RW_CATEGORY(inst)],
+   data_port_data_cache_msg_type[UNTYPED_RW_MSG_TYPE(inst)]);
+else
+  format(file, " not implemented");
   } else {
 format(file, " (addr: %d, blocks: %s, %s, mode: %s, %s)",
SCRATCH_RW_OFFSET(inst),
-- 
1.9.1

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Re: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of printf ir instruction.

2016-02-04 Thread yan . wang

Sorry. I have re-sent 7/12.

Yan Wang

> patch of 06 and 07 have the same title?
> I think it is a typo here.
> Please correct it.
> All the other things are OK, just rename this one and
> the whole patchset can be pushed later.
>
> Also can push my patch about printf test cases together.
>
> On Mon, Feb 01, 2016 at 03:42:16PM +0800, yan.w...@linux.intel.com wrote:
>> Date: Mon,  1 Feb 2016 15:42:16 +0800
>> From: yan.w...@linux.intel.com
>> To: beignet@lists.freedesktop.org
>> Cc: Yan Wang 
>> Subject: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of
>>  printf ir instruction.
>> X-Mailer: git-send-email 2.5.0
>>
>> From: Yan Wang 
>>
>> Contributor: Junyan He 
>> Signed-off-by: Yan Wang 
>> ---
>>  backend/src/llvm/llvm_gen_backend.cpp | 95
>> +--
>>  1 file changed, 80 insertions(+), 15 deletions(-)
>>
>> diff --git a/backend/src/llvm/llvm_gen_backend.cpp
>> b/backend/src/llvm/llvm_gen_backend.cpp
>> index dba9dba..4870285 100644
>> --- a/backend/src/llvm/llvm_gen_backend.cpp
>> +++ b/backend/src/llvm/llvm_gen_backend.cpp
>> @@ -486,6 +486,9 @@ namespace gbe
>>  typedef map>::iterator
>> PtrOrigMapIter;
>>  // map pointer source to bti
>>  map BtiMap;
>> +// map printf pointer source to bti
>> +int printfBti;
>> +uint32_t printfNum;
>>  // map ptr to its bti register
>>  map BtiValueMap;
>>  // map ptr to it's base
>> @@ -520,6 +523,8 @@ namespace gbe
>>  unit(unit),
>>  ctx(unit),
>>  regTranslator(ctx),
>> +printfBti(-1),
>> +printfNum(0),
>>  LI(0),
>>  TheModule(0),
>>  btiBase(BTI_RESERVED_NUM),
>> @@ -586,6 +591,7 @@ namespace gbe
>>addrStoreInst.clear();
>>// Reset for next function
>>btiBase = BTI_RESERVED_NUM;
>> +  printfBti = -1;
>>return false;
>>  }
>>  /*! Given a possible pointer value, find out the interested escape
>> like
>> @@ -594,7 +600,7 @@ namespace gbe
>>  /*! For all possible pointers, GlobalVariable, function pointer
>> argument,
>>  alloca instruction, find their pointer escape points */
>>  void analyzePointerOrigin(Function );
>> -unsigned getNewBti(Value *origin, bool isImage);
>> +unsigned getNewBti(Value *origin, bool force);
>>  void assignBti(Function );
>>  bool isSingleBti(Value *Val);
>>  Value *getBtiRegister(Value *v);
>> @@ -717,11 +723,10 @@ namespace gbe
>>  // handle load of dword/qword with unaligned address
>>  void emitUnalignedDQLoadStore(ir::Register ptr, Value *llvmValues,
>> ir::AddressSpace addrSpace, ir::Register bti, bool isLoad, bool
>> dwAligned, bool fixedBTI);
>>  void visitInstruction(Instruction ) {NOT_SUPPORTED;}
>> -void* getPrintfInfo(CallInst* inst)
>> -{
>> -  if ([inst])
>> -return (void*)[inst];
>> -  return NULL;
>> +ir::PrintfSet::PrintfFmt* getPrintfInfo(CallInst* inst) {
>> +  if (unit.printfs.find(inst) == unit.printfs.end())
>> +return NULL;
>> +  return [inst];
>>  }
>>  private:
>>void setDebugInfo_CTX(llvm::Instruction * insn); // store the
>> debug infomation in context for subsequently passing to Gen insn
>> @@ -1127,21 +1132,15 @@ namespace gbe
>>  }
>>}
>>
>> -  unsigned GenWriter::getNewBti(Value *origin, bool isImage) {
>> +  unsigned GenWriter::getNewBti(Value *origin, bool force) {
>>  unsigned new_bti = 0;
>> -if (isImage) {
>> +if (force) {
>>new_bti = btiBase;
>>incBtiBase();
>>return new_bti;
>>  }
>>
>> -if(origin->getName().equals(StringRef("__gen_ocl_printf_buf"))) {
>> -  new_bti = btiBase;
>> -  incBtiBase();
>> -} else if
>> (origin->getName().equals(StringRef("__gen_ocl_printf_index_buf"))) {
>> -  new_bti = btiBase;
>> -  incBtiBase();
>> -} else if
>> (origin->getName().equals(StringRef("__gen_ocl_profiling_buf"))) {
>> +if (origin->getName().equals(StringRef("__gen_ocl_profiling_buf")))
>> {
>>new_bti = btiBase;
>>incBtiBase();
>>  }
>> @@ -3716,6 +3715,16 @@ namespace gbe
>>  this->newRegister();
>>  break;
>>case GEN_OCL_PRINTF:
>> +this->newRegister();  // fall through
>> +  case GEN_OCL_PUTS:
>> +  {
>> + // We need a new BTI as printf output.
>> + if (printfBti < 0) {
>> +   printfBti = this->getNewBti(, true);
>> +   ctx.getFunction().getPrintfSet()->setBufBTI(printfBti);
>> + }
>> + break;
>> +  }
>>case GEN_OCL_CALC_TIMESTAMP:
>>case GEN_OCL_STORE_PROFILING:
>>case GEN_OCL_DEBUGWAIT:
>> @@ -4527,6 +4536,62 @@ namespace gbe
>>
>>case GEN_OCL_PRINTF:
>>{
>> +ir::PrintfSet::PrintfFmt* fmt = getPrintfInfo();
>> +if (fmt == NULL)
>> +

[Beignet] [PATCH 1/3] correct the dst type to ud instead of uw for byte scattered read

2016-02-04 Thread Guo Yejun

the destination type is ud, not uw. Correct it to make the ASM more readable.

Signed-off-by: Guo Yejun 
---
 backend/src/backend/gen_encoder.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/backend/src/backend/gen_encoder.cpp 
b/backend/src/backend/gen_encoder.cpp
index 9f9e420..31afa67 100644
--- a/backend/src/backend/gen_encoder.cpp
+++ b/backend/src/backend/gen_encoder.cpp
@@ -451,7 +451,7 @@ namespace gbe
 this->setHeader(insn);
 insn->header.destreg_or_condmod = GEN_SFID_DATAPORT_DATA;
 
-this->setDst(insn, GenRegister::uw16grf(dst.nr, 0));
+this->setDst(insn, GenRegister::ud8grf(dst.nr, 0));
 this->setSrc0(insn, GenRegister::ud8grf(src.nr, 0));
 
 if (bti.file == GEN_IMMEDIATE_VALUE) {
-- 
1.9.1

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Re: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of printf ir instruction.

2016-02-04 Thread He Junyan

patch of 06 and 07 have the same title?
I think it is a typo here.
Please correct it.
All the other things are OK, just rename this one and
the whole patchset can be pushed later.

Also can push my patch about printf test cases together.

On Mon, Feb 01, 2016 at 03:42:16PM +0800, yan.w...@linux.intel.com wrote:
> Date: Mon,  1 Feb 2016 15:42:16 +0800
> From: yan.w...@linux.intel.com
> To: beignet@lists.freedesktop.org
> Cc: Yan Wang 
> Subject: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of
>  printf ir instruction.
> X-Mailer: git-send-email 2.5.0
> 
> From: Yan Wang 
> 
> Contributor: Junyan He 
> Signed-off-by: Yan Wang 
> ---
>  backend/src/llvm/llvm_gen_backend.cpp | 95 
> +--
>  1 file changed, 80 insertions(+), 15 deletions(-)
> 
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp 
> b/backend/src/llvm/llvm_gen_backend.cpp
> index dba9dba..4870285 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -486,6 +486,9 @@ namespace gbe
>  typedef map>::iterator PtrOrigMapIter;
>  // map pointer source to bti
>  map BtiMap;
> +// map printf pointer source to bti
> +int printfBti;
> +uint32_t printfNum;
>  // map ptr to its bti register
>  map BtiValueMap;
>  // map ptr to it's base
> @@ -520,6 +523,8 @@ namespace gbe
>  unit(unit),
>  ctx(unit),
>  regTranslator(ctx),
> +printfBti(-1),
> +printfNum(0),
>  LI(0),
>  TheModule(0),
>  btiBase(BTI_RESERVED_NUM),
> @@ -586,6 +591,7 @@ namespace gbe
>addrStoreInst.clear();
>// Reset for next function
>btiBase = BTI_RESERVED_NUM;
> +  printfBti = -1;
>return false;
>  }
>  /*! Given a possible pointer value, find out the interested escape like
> @@ -594,7 +600,7 @@ namespace gbe
>  /*! For all possible pointers, GlobalVariable, function pointer argument,
>  alloca instruction, find their pointer escape points */
>  void analyzePointerOrigin(Function );
> -unsigned getNewBti(Value *origin, bool isImage);
> +unsigned getNewBti(Value *origin, bool force);
>  void assignBti(Function );
>  bool isSingleBti(Value *Val);
>  Value *getBtiRegister(Value *v);
> @@ -717,11 +723,10 @@ namespace gbe
>  // handle load of dword/qword with unaligned address
>  void emitUnalignedDQLoadStore(ir::Register ptr, Value *llvmValues, 
> ir::AddressSpace addrSpace, ir::Register bti, bool isLoad, bool dwAligned, 
> bool fixedBTI);
>  void visitInstruction(Instruction ) {NOT_SUPPORTED;}
> -void* getPrintfInfo(CallInst* inst)
> -{
> -  if ([inst])
> -return (void*)[inst];
> -  return NULL;
> +ir::PrintfSet::PrintfFmt* getPrintfInfo(CallInst* inst) {
> +  if (unit.printfs.find(inst) == unit.printfs.end())
> +return NULL;
> +  return [inst];
>  }
>  private:
>void setDebugInfo_CTX(llvm::Instruction * insn); // store the debug 
> infomation in context for subsequently passing to Gen insn
> @@ -1127,21 +1132,15 @@ namespace gbe
>  }
>}
>  
> -  unsigned GenWriter::getNewBti(Value *origin, bool isImage) {
> +  unsigned GenWriter::getNewBti(Value *origin, bool force) {
>  unsigned new_bti = 0;
> -if (isImage) {
> +if (force) {
>new_bti = btiBase;
>incBtiBase();
>return new_bti;
>  }
>  
> -if(origin->getName().equals(StringRef("__gen_ocl_printf_buf"))) {
> -  new_bti = btiBase;
> -  incBtiBase();
> -} else if 
> (origin->getName().equals(StringRef("__gen_ocl_printf_index_buf"))) {
> -  new_bti = btiBase;
> -  incBtiBase();
> -} else if 
> (origin->getName().equals(StringRef("__gen_ocl_profiling_buf"))) {
> +if (origin->getName().equals(StringRef("__gen_ocl_profiling_buf"))) {
>new_bti = btiBase;
>incBtiBase();
>  }
> @@ -3716,6 +3715,16 @@ namespace gbe
>  this->newRegister();
>  break;
>case GEN_OCL_PRINTF:
> +this->newRegister();  // fall through
> +  case GEN_OCL_PUTS:
> +  {
> + // We need a new BTI as printf output.
> + if (printfBti < 0) {
> +   printfBti = this->getNewBti(, true);
> +   ctx.getFunction().getPrintfSet()->setBufBTI(printfBti);
> + }
> + break;
> +  }
>case GEN_OCL_CALC_TIMESTAMP:
>case GEN_OCL_STORE_PROFILING:
>case GEN_OCL_DEBUGWAIT:
> @@ -4527,6 +4536,62 @@ namespace gbe
>  
>case GEN_OCL_PRINTF:
>{
> +ir::PrintfSet::PrintfFmt* fmt = getPrintfInfo();
> +if (fmt == NULL)
> +  break;
> +
> +ctx.getFunction().getPrintfSet()->append(printfNum, fmt);
> +
> +vector tupleData;
> +vector tupleTypeData;
> +int argNum

[Beignet] [Printf v2][PATCH 07/12] Implement emision of printf instruction.

[Beignet] [PATCH V2] correct ASM output for byte scattered read/write

Re: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of printf ir instruction.

[Beignet] [PATCH 1/3] correct the dst type to ud instead of uw for byte scattered read

Re: [Beignet] [Printf v2][PATCH 07/12] Add the implementation of printf ir instruction.

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