[Bug ld/4437] ld check all files are present and indicate those missing

2010-01-21 Thread nickc at redhat dot com

--- Additional Comments From nickc at redhat dot com  2010-01-21 10:24 
---
Created an attachment (id=4547)
 -- (http://sourceware.org/bugzilla/attachment.cgi?id=4547action=view)
Also continue after missing object files and missing sysrooted libraries


-- 
   What|Removed |Added

Attachment #4541 is|0   |1
   obsolete||
 AssignedTo|jg at jguk dot org  |nickc at redhat dot com


http://sourceware.org/bugzilla/show_bug.cgi?id=4437

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[Bug ld/4437] ld check all files are present and indicate those missing

2010-01-21 Thread nickc at redhat dot com

--- Additional Comments From nickc at redhat dot com  2010-01-21 10:25 
---
Hi Jon,

  Thanks for the problem report and patch.  I have taken the liberty of
extending your patch to cover a few more areas (missing object files and missing
sysrooted libraries) as well as fixing up the formatting to conform to the GNU
Coding Standards.  I am going to check in this revised patch shortly.

Cheers
  Nick


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[Bug ld/4437] ld check all files are present and indicate those missing

2010-01-21 Thread cvs-commit at gcc dot gnu dot org

--- Additional Comments From cvs-commit at gcc dot gnu dot org  2010-01-21 
10:31 ---
Subject: Bug 4437

CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2010-01-21 10:31:32

Modified files:
ld : ChangeLog ldfile.c ldlang.c ldlang.h 

Log message:
PR 4437
* ldfile.c: (ldfile_open_file): Do not stop link upon encountering
a missing file or library.  Instead mark the entry as missing and
set the global flag to indicate that missing files were
encountered.
* ldlang.c (missing_files): New exported variable.
(load_symbols): Skip loading if the file is missing.
(open_input_bfds): Terminate link if any input files were
missing.
* ldlang.h (struct lang_input_statement_struct): Add missing_file
field.
Add export of missing_file variable.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/ChangeLog.diff?cvsroot=srcr1=1.2100r2=1.2101
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/ldfile.c.diff?cvsroot=srcr1=1.53r2=1.54
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/ldlang.c.diff?cvsroot=srcr1=1.327r2=1.328
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/ld/ldlang.h.diff?cvsroot=srcr1=1.87r2=1.88



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[Bug ld/4437] ld check all files are present and indicate those missing

2010-01-21 Thread nickc at redhat dot com

--- Additional Comments From nickc at redhat dot com  2010-01-21 10:34 
---
Patch checked in.

-- 
   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution||FIXED


http://sourceware.org/bugzilla/show_bug.cgi?id=4437

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Re: ARM NEON instruction vcvt is encoded wrong

2010-01-21 Thread Nick Clifton

Hi André,


I found a bug in gas when assembling the arm neon instruction vcvt.


In which case please could you fill out a bug report on the binutils bug 
reporting web page here:


  http://sourceware.org/bugzilla


The data type specifiers of the vcvt instruction are encoded in the wrong
order.


Which version of the assembler are you using ?  If it is not the one 
built from the current mainline development sources then please try 
this.  There has been some bug fixing in this area of the assembler 
recently and the problem may already be fixed.



I was writing some code using the instruction vcvt.s32.f32 q1,q0


What binary value do you see for this instruction ?  I see this:

  0xf3bb2740

Which looks OK to me.  (I am using the ARM Architecture Reference Manual 
version ARM DDI 0406B_errata_2009_Q3 as my guide).



which should convert a float value in q0 to an integer in q1.


Well strictly speaking it converts the four signed floating point values 
in the q0 quad-word vector into four signed integers in the q1 quad-word 
vector.  But lets not be pedantic. :-)



However, running the same binary on the device (Nokia N900 in my case) I'm
getting wrong results.


Wrong how specifically ?  Are all of the conversions bogus ?


When I exchange the specifiers to vcvt.f32.s32 I'm getting the same wrong
results as on the device now within scratchbox and the correct result on
the device. Thus the opcodes are assembled in wrong order.


Or there is a hardware bug...

According to the ARM ARM mentioned above the encoding for this VCVT 
instruction is as follows:


  Assembler syntax:
VCVTcq.Td.Tm  Qd, Qm   Encoded as Q = 1
VCVTcq.Td.Tm  Dd, Dm   Encoded as Q = 0

  where:
.Td.Tm  The data types for the elements of the vectors
They must be one of:

.S32.F32encoded as op = 0b10, size = 0b10
.U32.F32encoded as op = 0b11, size = 0b10
.F32.S32encoded as op = 0b00, size = 0b10
.F32.U32encoded as op = 0b01, size = 0b10.

So for a VCVT.S32.F32 instruction I would expect the op field to be 
encoded as 0b10.  Which matches the instruction encoding:


   31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
   ---
1  1  1  1  0  0  1  1  1  D  1  1  size  1  1

   15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
   ---
  Vd0  1  1   op   Q  M  0  Vm

So bits 7 and 8 make up the op, and these are indeed 0b10 in the 
0xf3bb2740 encoding that I get from GAS.


Cheers
  Nick



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Re: Porting Binutils to A New Target And Getting Error.

2010-01-21 Thread Prashant Purohit

Hi all,


Now, I am able to generate header files for /binutils-2.19/bfd/ and
also, I am able to build libiberty, bfd, opcodes.
 But now, while building binutils-2.19/binutils, I am getting the following
linker error even after modifying Makefile.am and readelf.c files in
/binutils-2.19/binutils/ for the new target :

.
.
../bfd/.libs/libbfd.a(targets.o):(.data+0x4): undefined reference to
`bfd_elf32_my_target_vec'
../bfd/.libs/libbfd.a(targets.o):(.rodata+0x8): undefined reference to
`bfd_elf32_my_target_vec'
../bfd/.libs/libbfd.a(targets.o):(.rodata+0x20): undefined reference to
`bfd_elf32_my_target_vec'
collect2: ld returned 1 exit status
make[2]: *** [size] Error 1
make[2]: Leaving directory `/root/temp/binutils'
make[1]: *** [all-recursive] Error 1
make[1]: Leaving directory `/root/temp/binutils'
make: *** [all] Error 2

Thanks  Regards,
Prashant
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Re: ARM NEON instruction vcvt is encoded wrong

2010-01-21 Thread André Bergner
I'm sorry I made a mistake. The assembler is assembling correctly, but the
emulator (I think it's called qemu) is doing it wrong. I will make a bug
report there. Sorry again.

regards, André Bergner

2010/1/19 André Bergner andre.bergne...@googlemail.com

 Hi everybody,

 I found a bug in gas when assembling the arm neon instruction vcvt.
 The data type specifiers of the vcvt instruction are encoded in the wrong
 order.
 I was writing some code using the instruction  vcvt.s32.f32   q1,q0 which
 should convert a float value
 in q0 to an integer in q1. I'm testing my code using the scratchbox
 environment. Here I get the correct result.
 However, running the same binary on the device (Nokia N900 in my case) I'm
 getting wrong results.
 When I exchange the specifiers to vcvt.f32.s32 I'm getting the same wrong
 results as on the device now
 within scratchbox and the correct result on the device. Thus the opcodes
 are assembled in wrong order.
 Interestingly this bug exists on all levels: the assembler, the
 disassembler (objdumb) and the scratchbox ARM-emulator.

 I haven't tested other instructions using two type specifiers yet, but I
 assume this to be a general bug concerning all such instructions.

 best regrads,
 André Bergner


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[Bug ld/4437] ld check all files are present and indicate those missing

2010-01-21 Thread jg at jguk dot org

--- Additional Comments From jg at jguk dot org  2010-01-21 22:03 ---
Hi Nick. Thanks for updating for other files + applying the patch. Cheers, Jon

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