Re: [casper] ROACH boards

2009-11-18 Thread Stan Kurtz

On Wed, 18 Nov 2009, Karl Warnick wrote:


Hi all,

I'd like to get in touch with Mo at Digicom to see if there are any boards 
currently available. Could someone provide contact information (or 
information on available boards from the most recent run)?


Thanks,
Karl


Hi Karl,

I was in touch with Mo just over a month ago.
His data are:  Mo Ohady,  e-mail  m...@digicom.org.
He sent me the current price list, which I've attached.

Best regards,
Stan

ROACH_PRICE_LIST.doc
Description: MS-Word document


Re: [casper] ROACH boards

2009-11-18 Thread Karl Warnick

Stan,
Since this is my first post to the casper list, I'm going to reply with 
a thanks. I'll be less verbose in the future :).

Karl

Stan Kurtz wrote:

On Wed, 18 Nov 2009, Karl Warnick wrote:


Hi all,

I'd like to get in touch with Mo at Digicom to see if there are any 
boards currently available. Could someone provide contact information 
(or information on available boards from the most recent run)?


Thanks,
Karl


Hi Karl,

I was in touch with Mo just over a month ago.
His data are:  Mo Ohady,  e-mail  m...@digicom.org.
He sent me the current price list, which I've attached.

Best regards,
Stan


--
Karl F. Warnick  email:  warn...@byu.edu
Associate Professor  Tel:(801) 422-1732
Department of Electrical  Computer Engineering  FAX:(801) 422-0201
Brigham Young University
459 Clyde Building
Provo, UT 84602









Re: [casper] ROACH boards

2009-11-18 Thread Dan Werthimer



mo ohady   m...@digicom.org



On 11/18/2009 10:46 AM, Karl Warnick wrote:

Hi all,

I'd like to get in touch with Mo at Digicom to see if there are any
boards currently available. Could someone provide contact information
(or information on available boards from the most recent run)?

Thanks,
Karl






Re: [casper] over mapping

2009-11-18 Thread Mark Wagner
Hi Laura,

For FPGA utilization, I look at the file:
sysgen/synth_model/modelfilename_cw.syr

Mark


On Wed, Nov 18, 2009 at 2:26 PM, Laura Spitler laura.spit...@gmail.comwrote:

 Hi everyone,

 I have a general question about over mapping a design. What's the
 easiest way to determine by how much I've over utilized the chip?
 The log files don't seem to give a resource summary when mapping fails
 with an error.

 Thanks!
 Laura