Re: [casper] 10gbe switch
And don't forget that the switches that are XFP and SFP+ sometimes (usually?) don't include the optics for each port in the switch price. With CX4, all you need is a cable, if you're within a few meters. Yes - that list is years old. Those Fujitsu and HP switches have been tested with the CASPER hardware and found to work as advertised. There are lots of new products available. More announced all the time. We are in contact with a number of vendors in hopes of getting demo units to try in house with the CASPER hardware before listing them as recommended for use. Our tests will include running at full line rates all ports continuously as that's what our intended applications require. Less demanding applications will have many more, and cheaper, options for suitable switch vendor and model. I have no prediction for when I will be able to add more switch models will to that list. Matt On Thu, 5 Aug 2010, Andrew Lutomirski wrote: On Thu, Aug 5, 2010 at 3:21 PM, Matt Dexter mdex...@berkeley.edu wrote: Hi Tom, were you aware of these ? http://casper.berkeley.edu/wiki/Recommended_10_GbE_Hardware Sadly the list is out of date: some of the switches are no longer in production. The XG700, for example, is great and cheap but you can't buy one without great difficulty. I'm not sure that manufacturers really care about CX4 anymore now that SFP+ parts are available. --Andy http://casper.berkeley.edu/wiki/Equipment_Cables Matt Dexter On Thu, 5 Aug 2010, Tom Downes wrote: Casper-folks: Hoping to short-circuit a fair amount of research here in the hope that someone has had to do this already. I'll soon be looking to connect 10-20 ROACH boards by 10 gbe to a data acquisition computer(s). It seems like the smartest way of doing that is getting a 16-port switch or potentially two 8-port switches. But the 10 Gbe port on the ROACH seems to be CX4 which I take to be a less popular connector variety. What kind of switches have ROACH users out there used to connect up a bunch of boards? Are there switches out there to convert CX4 to something with a reach longer than the 15m Wikipedia quotes as the limit of CX4. 15m is very borderline for our needs. The prices seem to vary widely. We do not need network admin tools or anything fancy. In fact our data rates could probably go over 10Mb cabling, but the 10Gbe interface of the ROACH is more convenient from the firmware perspective. This is more of a multiplexer than a switch. Tom
Re: [casper] 10gbe switch
Yes - when pricing switches, or any sort of (sub-)system, a full BOM must be used to make a meaningful comparison. Matt On Mon, 9 Aug 2010, John Ford wrote: And don't forget that the switches that are XFP and SFP+ sometimes (usually?) don't include the optics for each port in the switch price. With CX4, all you need is a cable, if you're within a few meters. Yes - that list is years old. Those Fujitsu and HP switches have been tested with the CASPER hardware and found to work as advertised. There are lots of new products available. More announced all the time. We are in contact with a number of vendors in hopes of getting demo units to try in house with the CASPER hardware before listing them as recommended for use. Our tests will include running at full line rates all ports continuously as that's what our intended applications require. Less demanding applications will have many more, and cheaper, options for suitable switch vendor and model. I have no prediction for when I will be able to add more switch models will to that list. Matt On Thu, 5 Aug 2010, Andrew Lutomirski wrote: On Thu, Aug 5, 2010 at 3:21 PM, Matt Dexter mdex...@berkeley.edu wrote: Hi Tom, were you aware of these ? http://casper.berkeley.edu/wiki/Recommended_10_GbE_Hardware Sadly the list is out of date: some of the switches are no longer in production. The XG700, for example, is great and cheap but you can't buy one without great difficulty. I'm not sure that manufacturers really care about CX4 anymore now that SFP+ parts are available. --Andy http://casper.berkeley.edu/wiki/Equipment_Cables Matt Dexter On Thu, 5 Aug 2010, Tom Downes wrote: Casper-folks: Hoping to short-circuit a fair amount of research here in the hope that someone has had to do this already. I'll soon be looking to connect 10-20 ROACH boards by 10 gbe to a data acquisition computer(s). It seems like the smartest way of doing that is getting a 16-port switch or potentially two 8-port switches. But the 10 Gbe port on the ROACH seems to be CX4 which I take to be a less popular connector variety. What kind of switches have ROACH users out there used to connect up a bunch of boards? Are there switches out there to convert CX4 to something with a reach longer than the 15m Wikipedia quotes as the limit of CX4. 15m is very borderline for our needs. The prices seem to vary widely. We do not need network admin tools or anything fancy. In fact our data rates could probably go over 10Mb cabling, but the 10Gbe interface of the ROACH is more convenient from the firmware perspective. This is more of a multiplexer than a switch. Tom
[casper] ADC block error
Hi all. We are trying to build models on 11.X for the roach, and they are failing. Here are the error messages: Yes, Master752 cat /tmp/jmf.txt Undefined function or method 'reuse_line' for input arguments of type 'char'. Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot be evaluated. Error due to multiple causes: -- Undefined function or method 'reuse_line' for input arguments of type 'char'. -- Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot be evaluated. I've seen this error in the mail archives, but I don't see the solution... Thanks. John
Re: [casper] ADC block error
Hi John, The 'reuse_line' function is located in casper_library/simulink_drawing_fns. MATLAB is missing it because the addpath function isn't recursive. -Suraj Hi all. We are trying to build models on 11.X for the roach, and they are failing. Here are the error messages: Yes, Master752 cat /tmp/jmf.txt Undefined function or method 'reuse_line' for input arguments of type 'char'. Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot be evaluated. Error due to multiple causes: -- Undefined function or method 'reuse_line' for input arguments of type 'char'. -- Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot be evaluated. I've seen this error in the mail archives, but I don't see the solution... Thanks. John
Re: [casper] ADC block error
Suraj,
So from what I understand, anyone that wants to use the 3gsps adc, now needs
to add line
addpath('PATH_TO_MLIB_DEVEL/mlib_devel/casper_library/simulink_drawing_fns')
to their startup.m script?
Mark
On Mon, Aug 9, 2010 at 2:43 PM, surajgo...@berkeley.edu wrote:
Hi John,
The 'reuse_line' function is located in
casper_library/simulink_drawing_fns. MATLAB is missing it because the
addpath function isn't recursive.
-Suraj
Hi all. We are trying to build models on 11.X for the roach, and they
are
failing. Here are the error messages:
Yes, Master752 cat /tmp/jmf.txt
Undefined function or method 'reuse_line' for input arguments of type
'char'.
Error in 'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot
be evaluated.
Error due to multiple causes: -- Undefined function or method
'reuse_line' for input arguments of type 'char'. -- Error in
'test_jmf/adc083000x2/adc0_sim': Initialization commands cannot be
evaluated.
I've seen this error in the mail archives, but I don't see the
solution...
Thanks.
John
[casper] bee_xps fails when building tutorial 3 for Roach
Hi, I am trying to build the wideband spectrometer mdl file for Roach and when I run bee_xps, it fails. Errors are listed below. I tried this with the latest mlib_devel10.1 from svn and also with mlib_devel cloned from git and they both fail the same way. (I can not locate 'ref_designs_tutorials' directory in git, but I assume the latest svn version is fine). I noticed that when I open the tut3 mdl file, there are broken links in the fft and pfb blocks, so I deleted these blocks and replaced them with new ones from the library. The PFB block has an additional parameter: Fold adders into DSPs and I leave it as checked! Any chance you have seen this error before? Please advise. Thanks Mandana ps I can successfully build tutorial 1 and iADC tutorial pss For Tutorial 3, if I just go to system Generator block and press generate, it finishes with comiled successfully. However, bee_xps fails - Version Log - Version Path System Generator 11.5.2275 /opt/Xilinx/11.1/DSP_Tools/lin64/sysgen AccelDSP 11.5.2275 /opt/Xilinx/11.1/DSP_Tools/lin64/AccelDSP Matlab 7.7.0.471 (R2008b)/usr/local/matlab_2008b ISE 11.5.i /opt/Xilinx/11.1/ISE and in xflow.log I have: snip ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map9/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map8/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map7/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map6/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map5/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map4/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map3/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
Re: [casper] bee_xps fails when building tutorial 3 for Roach
Hi Mandana, Thanks for trying this out. I just looked at the design, and it appears I didn't update it with the newest fft and pfb. I just now did this. Can you svn co http://casper.berkeley.edu/svn/trunk/ref_designs_tutorials/workshop_2010/roach_tut3_wideband_spec/ and using the newest clone of mlib_dewel, try and compile the r105 model file? It just worked for me. If you're still having issues, let me know. Thanks, Mark On Mon, Aug 9, 2010 at 3:22 PM, mand...@phas.ubc.ca wrote: Hi, I am trying to build the wideband spectrometer mdl file for Roach and when I run bee_xps, it fails. Errors are listed below. I tried this with the latest mlib_devel10.1 from svn and also with mlib_devel cloned from git and they both fail the same way. (I can not locate 'ref_designs_tutorials' directory in git, but I assume the latest svn version is fine). I noticed that when I open the tut3 mdl file, there are broken links in the fft and pfb blocks, so I deleted these blocks and replaced them with new ones from the library. The PFB block has an additional parameter: Fold adders into DSPs and I leave it as checked! Any chance you have seen this error before? Please advise. Thanks Mandana ps I can successfully build tutorial 1 and iADC tutorial pss For Tutorial 3, if I just go to system Generator block and press generate, it finishes with comiled successfully. However, bee_xps fails - Version Log - Version Path System Generator 11.5.2275 /opt/Xilinx/11.1/DSP_Tools/lin64/sysgen AccelDSP 11.5.2275 /opt/Xilinx/11.1/DSP_Tools/lin64/AccelDSP Matlab 7.7.0.471 (R2008b)/usr/local/matlab_2008b ISE 11.5.i /opt/Xilinx/11.1/ISE and in xflow.log I have: snip ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map9/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map8/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map7/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map6/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map5/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target 'virtex5'. ERROR:NgdBuild:604 - logical block 'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204 8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b a0a1129/map4/comp5.core_instance5/BU2' with type 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, or the misspelling of a type name. Symbol 'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported in target
