Re: [casper] ADC calibration issue
I like the triumphant "done!" at the end :) Next questions -- What version of the adc repo and mlib_devel repos are you using? Do you have other hardware you can test on? (It's very unlikely to be a hardware problem, IMO, but worth checking if you can). What ADC clock rate are you using? Cheers Jack On Wed, 29 Mar 2017 at 14:39 vijay kumar wrote: > Yes ! I assume the clock has been clocked. For convenience, I have > included the output script i get after I run the initialization script. > > > Programming 192.168.10.2 with direct_mar_29_2017_Mar_29_1500.bof.gz... > Design built for ROACH2 rev2 with 4 ADCs (ZDOK rev2) > Gateware supports demux modes (using demux by 1) > Resetting ADC, power cycling ADC, and reprogramming FPGA... > ZDOK0 clock OK > Calibrating SERDES blocks...calibrating chips ["A", "B", "C", "D"] > chip A chan 1 lane 0 no good taps found > chip A chan 1 lane 1 no good taps found > chip A chan 2 lane 0 no good taps found > chip A chan 2 lane 1 no good taps found > chip A chan 3 lane 0 no good taps found > chip A chan 3 lane 1 no good taps found > chip A chan 4 lane 0 no good taps found > chip A chan 4 lane 1 no good taps found > chip B chan 1 lane 0 no good taps found > chip B chan 1 lane 1 no good taps found > chip B chan 2 lane 0 no good taps found > chip B chan 2 lane 1 no good taps found > chip B chan 3 lane 0 no good taps found > chip B chan 3 lane 1 no good taps found > chip B chan 4 lane 0 no good taps found > chip B chan 4 lane 1 no good taps found > chip C chan 1 lane 0 no good taps found > chip C chan 1 lane 1 no good taps found > chip C chan 2 lane 0 no good taps found > chip C chan 2 lane 1 no good taps found > chip C chan 3 lane 0 no good taps found > chip C chan 3 lane 1 no good taps found > chip C chan 4 lane 0 no good taps found > chip C chan 4 lane 1 no good taps found > chip D chan 1 lane 0 no good taps found > chip D chan 1 lane 1 no good taps found > chip D chan 2 lane 0 no good taps found > chip D chan 2 lane 1 no good taps found > chip D chan 3 lane 0 no good taps found > chip D chan 3 lane 1 no good taps found > chip D chan 4 lane 0 no good taps found > chip D chan 4 lane 1 no good taps found > > ERROR: SERDES calibration failed for ADC A. > ERROR: SERDES calibration failed for ADC B. > ERROR: SERDES calibration failed for ADC C. > ERROR: SERDES calibration failed for ADC D. > Selecting analog inputs... > Using default digital gain of 1... > Done! > > > On Wed, Mar 29, 2017 at 5:33 PM, Jack Hickish > wrote: > > Further, is the board clocking OK? -- I believe the initialization script > should give feedback on whether of not the FPGA's PLL has successfully > locked to the ADC clock, and what the current measured board clock is. > > Cheers > Jack > > On Wed, 29 Mar 2017 at 14:28 Matt Dexter wrote: > > Is the design and lab setup consistent with the limitations documented at > > https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations > ? > > More information on the clock requirements may be found at > > https://casper.berkeley.edu/wiki/ADC16x250-8_coax_rev_2#ADC16x250-8_coax_rev_2_Inputs > > Matt > > On Wed, 29 Mar 2017, vijay kumar wrote: > > > Date: Wed, 29 Mar 2017 17:16:34 -0400 > > From: vijay kumar > > To: casper@lists.berkeley.edu > > Subject: [casper] ADC calibration issue > > > > Hello Casperites, > > I have been working on the ROACH-2 casper for the past few months. Now i > have started to capture values from the ADC > > 16x250-8 block. But, when I am trying to run the initialization script, > it gives me an error saying that "chip 'x' > > chan 'x' lane 'x' no good taps found ". I am unable to figure out what > might be causing this error. I would be glad > > if I could get help from you guys. > > > > Thank you. > > > > > > With regards > > Vijay > > > > -- > > You received this message because you are subscribed to the Google > Groups "casper@lists.berkeley.edu" group. > > To unsubscribe from this group and stop receiving emails from it, send > an email to > > casper+unsubscr...@lists.berkeley.edu. > > To post to this group, send email to casper@lists.berkeley.edu. > > > > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > > > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berke
Re: [casper] ADC calibration issue
Yes ! I assume the clock has been clocked. For convenience, I have included the output script i get after I run the initialization script. Programming 192.168.10.2 with direct_mar_29_2017_Mar_29_1500.bof.gz... Design built for ROACH2 rev2 with 4 ADCs (ZDOK rev2) Gateware supports demux modes (using demux by 1) Resetting ADC, power cycling ADC, and reprogramming FPGA... ZDOK0 clock OK Calibrating SERDES blocks...calibrating chips ["A", "B", "C", "D"] chip A chan 1 lane 0 no good taps found chip A chan 1 lane 1 no good taps found chip A chan 2 lane 0 no good taps found chip A chan 2 lane 1 no good taps found chip A chan 3 lane 0 no good taps found chip A chan 3 lane 1 no good taps found chip A chan 4 lane 0 no good taps found chip A chan 4 lane 1 no good taps found chip B chan 1 lane 0 no good taps found chip B chan 1 lane 1 no good taps found chip B chan 2 lane 0 no good taps found chip B chan 2 lane 1 no good taps found chip B chan 3 lane 0 no good taps found chip B chan 3 lane 1 no good taps found chip B chan 4 lane 0 no good taps found chip B chan 4 lane 1 no good taps found chip C chan 1 lane 0 no good taps found chip C chan 1 lane 1 no good taps found chip C chan 2 lane 0 no good taps found chip C chan 2 lane 1 no good taps found chip C chan 3 lane 0 no good taps found chip C chan 3 lane 1 no good taps found chip C chan 4 lane 0 no good taps found chip C chan 4 lane 1 no good taps found chip D chan 1 lane 0 no good taps found chip D chan 1 lane 1 no good taps found chip D chan 2 lane 0 no good taps found chip D chan 2 lane 1 no good taps found chip D chan 3 lane 0 no good taps found chip D chan 3 lane 1 no good taps found chip D chan 4 lane 0 no good taps found chip D chan 4 lane 1 no good taps found ERROR: SERDES calibration failed for ADC A. ERROR: SERDES calibration failed for ADC B. ERROR: SERDES calibration failed for ADC C. ERROR: SERDES calibration failed for ADC D. Selecting analog inputs... Using default digital gain of 1... Done! On Wed, Mar 29, 2017 at 5:33 PM, Jack Hickish wrote: > Further, is the board clocking OK? -- I believe the initialization script > should give feedback on whether of not the FPGA's PLL has successfully > locked to the ADC clock, and what the current measured board clock is. > > Cheers > Jack > > On Wed, 29 Mar 2017 at 14:28 Matt Dexter wrote: > >> Is the design and lab setup consistent with the limitations documented at >> https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_ >> Rate_vs_Virtex-6_MMCM_Limitations >> ? >> >> More information on the clock requirements may be found at >> https://casper.berkeley.edu/wiki/ADC16x250-8_coax_rev_2# >> ADC16x250-8_coax_rev_2_Inputs >> >> Matt >> >> On Wed, 29 Mar 2017, vijay kumar wrote: >> >> > Date: Wed, 29 Mar 2017 17:16:34 -0400 >> > From: vijay kumar >> > To: casper@lists.berkeley.edu >> > Subject: [casper] ADC calibration issue >> > >> > Hello Casperites, >> > I have been working on the ROACH-2 casper for the past few months. Now >> i have started to capture values from the ADC >> > 16x250-8 block. But, when I am trying to run the initialization script, >> it gives me an error saying that "chip 'x' >> > chan 'x' lane 'x' no good taps found ". I am unable to figure out what >> might be causing this error. I would be glad >> > if I could get help from you guys. >> > >> > Thank you. >> > >> > >> > With regards >> > Vijay >> > >> > -- >> > You received this message because you are subscribed to the Google >> Groups "casper@lists.berkeley.edu" group. >> > To unsubscribe from this group and stop receiving emails from it, send >> an email to >> > casper+unsubscr...@lists.berkeley.edu. >> > To post to this group, send email to casper@lists.berkeley.edu. >> > >> > >> >> -- >> You received this message because you are subscribed to the Google Groups >> "casper@lists.berkeley.edu" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to casper+unsubscr...@lists.berkeley.edu. >> To post to this group, send email to casper@lists.berkeley.edu. >> > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] ADC calibration issue
Further, is the board clocking OK? -- I believe the initialization script should give feedback on whether of not the FPGA's PLL has successfully locked to the ADC clock, and what the current measured board clock is. Cheers Jack On Wed, 29 Mar 2017 at 14:28 Matt Dexter wrote: > Is the design and lab setup consistent with the limitations documented at > > https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations > ? > > More information on the clock requirements may be found at > > https://casper.berkeley.edu/wiki/ADC16x250-8_coax_rev_2#ADC16x250-8_coax_rev_2_Inputs > > Matt > > On Wed, 29 Mar 2017, vijay kumar wrote: > > > Date: Wed, 29 Mar 2017 17:16:34 -0400 > > From: vijay kumar > > To: casper@lists.berkeley.edu > > Subject: [casper] ADC calibration issue > > > > Hello Casperites, > > I have been working on the ROACH-2 casper for the past few months. Now i > have started to capture values from the ADC > > 16x250-8 block. But, when I am trying to run the initialization script, > it gives me an error saying that "chip 'x' > > chan 'x' lane 'x' no good taps found ". I am unable to figure out what > might be causing this error. I would be glad > > if I could get help from you guys. > > > > Thank you. > > > > > > With regards > > Vijay > > > > -- > > You received this message because you are subscribed to the Google > Groups "casper@lists.berkeley.edu" group. > > To unsubscribe from this group and stop receiving emails from it, send > an email to > > casper+unsubscr...@lists.berkeley.edu. > > To post to this group, send email to casper@lists.berkeley.edu. > > > > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] ADC calibration issue
Is the design and lab setup consistent with the limitations documented at https://casper.berkeley.edu/wiki/ADC16x250-8#ADC16_Sample_Rate_vs_Virtex-6_MMCM_Limitations ? More information on the clock requirements may be found at https://casper.berkeley.edu/wiki/ADC16x250-8_coax_rev_2#ADC16x250-8_coax_rev_2_Inputs Matt On Wed, 29 Mar 2017, vijay kumar wrote: Date: Wed, 29 Mar 2017 17:16:34 -0400 From: vijay kumar To: casper@lists.berkeley.edu Subject: [casper] ADC calibration issue Hello Casperites, I have been working on the ROACH-2 casper for the past few months. Now i have started to capture values from the ADC 16x250-8 block. But, when I am trying to run the initialization script, it gives me an error saying that "chip 'x' chan 'x' lane 'x' no good taps found ". I am unable to figure out what might be causing this error. I would be glad if I could get help from you guys. Thank you. With regards Vijay -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu. -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
[casper] ADC calibration issue
Hello Casperites, I have been working on the ROACH-2 casper for the past few months. Now i have started to capture values from the ADC 16x250-8 block. But, when I am trying to run the initialization script, it gives me an error saying that "chip 'x' chan 'x' lane 'x' no good taps found ". I am unable to figure out what might be causing this error. I would be glad if I could get help from you guys. Thank you. With regards Vijay -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] Re: Can't open tut3
Hi Claudio, This is a classic problem -- the library version you are using is not compatible with the version the tutorials were designed in. The particular error you have can be solved by deleting the XSG yellow block and pulling a new one from the library (I believe it is now called XSG_core_config, without spaces(!)). In fact, deleting and replacing problematic blocks fixes a wealth of strange Simulink errors. Having fixed the XSG block, you might find that you run into similar problems with other blocks. In this case there are two options -- 1. Figure out what version of mlib_devel the tutorial was made with -- if you're lucky the author will have put this information on the tutorials wiki page. 2. Update all the blocks in the model to their latest versions. There is an automated script to do this. After opening the model, from the MATLAB prompt run "update_casper_blocks(bdroot)". bdroot -- block diagram root -- is a shortcut to the top level of your model, this script will recurse through all your blocks and replace all casper blocks with their most up-to-date versions from your copy of the mlib_devel library. In future (at the next workshop) I would suggest we maintain an mlib_devel git submodule in the tutorials repository, so it's easy to build them against the correct library version. Cheers Jack On Wed, 29 Mar 2017 at 08:52 Claudio Rivera wrote: > Hi everyone, thanks you for your comments. > I have installed matlab 2013a, and tut3.slx was oppened, but when I > compile it (run xps) I get the following error > - > Failed to find 'XSG core config' in library 'xps_library' referenced by > 'tut3/XSG > core config' > - > So I'm working in it. > With respect to tut3.mdl, it shows the same error > > 2017-03-27 5:54 GMT-03:00 Wesley New : > > Hi Claudio, > > 2012b does not support the newer slx file format. Try using an older > version of the tutorials with an mdl file. > > You can try the mdl files from this commit: > https://github.com/casper-astro/tutorials_devel/tree/c195b501f67c4f2a4f051f258453e0751f9825fa/tut3 > > Wesley New > South African SKA Project > +2721 506 7300 <+27%2021%20506%207300> > www.ska.ac.za > > > > On Sat, Mar 25, 2017 at 4:49 PM, Claudio Rivera > wrote: > > Hi everyone > It would be great if you could help me with this problem... > I just install matlab r2012a and xilinx 14.7 (design suite: system > edition), the license of xilinx was "vivado design suite no ise", (in > ubuntu 12.04, 64 bit), I download the mlib_devel_master from casper and > create the startsg.local file with the following path > > #!/bin/bash > export MATLAB_PATH=/usr/local/MATLAB/R2012a > export XILINX_PATH=/opt/Xilinx/14.7/ISE_DS > export XILINX_PLATFORM=lin64 > export MLIB_DEVEL_PATH=/home/roach/Casper/mlib_devel-master > > > > Then, in matlab I start simulink, and when I try to open tut3.slx, it > stays stuck. > Any idea? > > 2017-03-25 11:41 GMT-03:00 Claudio Rivera : > > Hi everyone > It would be great if you could help me with this problem... > I just install matlab r2012a and xilinx 14.7 (design suite: system > edition), the license of xilinx was "vivado design suite no ise", (in > ubuntu 12.04, 64 bit), I download the mlib_devel_master from casper and > create the startsg.local file with the following path > > #!/bin/bash > export MATLAB_PATH=/usr/local/MATLAB/R2012a > export XILINX_PATH=/opt/Xilinx/14.7/ISE_DS > export XILINX_PLATFORM=lin64 > export MLIB_DEVEL_PATH=/home/roach/Casper/mlib_devel-master > > > > Then, in matlab I start simulink, and when I try to open tut3.slx, it > stays stuck. > Any idea? > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to casper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] Re: Can't open tut3
Hi everyone, thanks you for your comments. I have installed matlab 2013a, and tut3.slx was oppened, but when I compile it (run xps) I get the following error - Failed to find 'XSG core config' in library 'xps_library' referenced by 'tut3/XSG core config' - So I'm working in it. With respect to tut3.mdl, it shows the same error 2017-03-27 5:54 GMT-03:00 Wesley New : > Hi Claudio, > > 2012b does not support the newer slx file format. Try using an older > version of the tutorials with an mdl file. > > You can try the mdl files from this commit: https://github.com/ > casper-astro/tutorials_devel/tree/c195b501f67c4f2a4f051f258453e0 > 751f9825fa/tut3 > > Wesley New > South African SKA Project > +2721 506 7300 <+27%2021%20506%207300> > www.ska.ac.za > > > > On Sat, Mar 25, 2017 at 4:49 PM, Claudio Rivera > wrote: > >> Hi everyone >> It would be great if you could help me with this problem... >> I just install matlab r2012a and xilinx 14.7 (design suite: system >> edition), the license of xilinx was "vivado design suite no ise", (in >> ubuntu 12.04, 64 bit), I download the mlib_devel_master from casper and >> create the startsg.local file with the following path >> >> #!/bin/bash >> export MATLAB_PATH=/usr/local/MATLAB/R2012a >> export XILINX_PATH=/opt/Xilinx/14.7/ISE_DS >> export XILINX_PLATFORM=lin64 >> export MLIB_DEVEL_PATH=/home/roach/Casper/mlib_devel-master >> >> >> >> Then, in matlab I start simulink, and when I try to open tut3.slx, it >> stays stuck. >> Any idea? >> >> 2017-03-25 11:41 GMT-03:00 Claudio Rivera : >> >>> Hi everyone >>> It would be great if you could help me with this problem... >>> I just install matlab r2012a and xilinx 14.7 (design suite: system >>> edition), the license of xilinx was "vivado design suite no ise", (in >>> ubuntu 12.04, 64 bit), I download the mlib_devel_master from casper and >>> create the startsg.local file with the following path >>> >>> #!/bin/bash >>> export MATLAB_PATH=/usr/local/MATLAB/R2012a >>> export XILINX_PATH=/opt/Xilinx/14.7/ISE_DS >>> export XILINX_PLATFORM=lin64 >>> export MLIB_DEVEL_PATH=/home/roach/Casper/mlib_devel-master >>> >>> >>> >>> Then, in matlab I start simulink, and when I try to open tut3.slx, it >>> stays stuck. >>> Any idea? >>> >> >> -- >> You received this message because you are subscribed to the Google Groups >> "casper@lists.berkeley.edu" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to casper+unsubscr...@lists.berkeley.edu. >> To post to this group, send email to casper@lists.berkeley.edu. >> > > -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
Re: [casper] ROACH1 serial to USB connection
Hi Jason I got my hands on a JTAG. I went through the CASPER debricking tutorial page but I dont understand how to use the converter script? Do you perhaps know how to use it? Thanks for all of your help Heystek On Mon, Mar 27, 2017 at 11:54 AM, Heystek Grobler wrote: > Hi Jason > > Yes, all flow control is off. both the (Xon/Xoff or DC1/DC3) is off. > > On Mon, Mar 27, 2017 at 11:32 AM, Jason Manley wrote: > >> You've checked that hardware flow control is turned off on your serial >> port? >> >> Jason >> >> >> On 27 Mar 2017, at 11:29, Heystek Grobler >> wrote: >> >> > Hi Jason >> > >> > The ROACH1 is a brand new board that we just unboxed. I tried connecing >> to it using two diffirent serial to usb cables and both gave the same >> result, a connection to the board, but the terminal only displays a black >> screen. No Uboot sequence or any kind of output. >> > >> > I will double check by shorting pins 2 & 3 and see if I get anyyhing on >> the terminal. >> > >> > If I am right if I say I think that the roach might be bricked? >> > >> > Thanks for all the help >> > >> > Heystek >> > >> > On Wed, Mar 22, 2017 at 9:23 PM, Jason Ray wrote: >> > Heystek, >> > >> > Is this a known good roach1 board? Could it have been bricked by >> chance? If so it will behave like you describe and you may need to do this: >> > >> > https://casper.berkeley.edu/wiki/ROACH_Debricking >> > >> > Another thing you can try if you haven't already is to swap pins 2 & >> 3. Even if you have a null modem cable, something else could be going on >> (with the adapter perhaps.?) and it never hurts to just swap 2 & 3 and give >> it another try. >> > >> > Also, a simple thing you can do to verify your serial adapter is >> working is to do a loopback, short pins 2 & 3 together, then type something >> in the terminal and see if it displays on the screen. >> > >> > Good luck, >> > Jason >> > >> > >> > >> > >> > On 3/22/2017 3:08 PM, Heystek Grobler wrote: >> >> Hi >> >> >> >> When I use dev/tty* I can see the adapter. This is the adapter Im using >> >> >> >> https://www.unitek-products.com/en/product_detail.php?id=12 >> >> >> >> >> >> On Wed, 22 Mar 2017 at 9:05 PM Jack Hickish >> wrote: >> >> H. And the adapter definitely works? >> >> >> >> Sorry, I think you're going to need someone smarter than me. >> >> >> >> On Wed, 22 Mar 2017 at 11:06 Heystek Grobler >> wrote: >> >> Hi Jack >> >> >> >> Jip it is the null-modem type with the 9 pins. If I open up an >> terminal connection through putty or minicom I can open up an connection >> with the 115200 8N1 settings, but I cant see Uboot. I can only see 'n blank >> terminal window. >> >> >> >> >> >> On Wed, 22 Mar 2017 at 7:24 PM Jack Hickish >> wrote: >> >> Hi Heystek, >> >> >> >> Just to be clear, you're connecting to the 9 pin serial connector on >> the ROACH (not the USB port)? >> >> If you're using a serial cable between the ROACH and your USB adapter, >> is it the correct null-modem type? >> >> Do you have the correct comms settings? -- roach1 is 115200 8N1 >> >> >> >> Some info which might help is at https://casper.berkeley.edu/wi >> ki/ROACH_NFS_guide#Preliminary_setup_1:_The_serial_connection >> >> >> >> Cheers >> >> Jack >> >> >> >> On Wed, 22 Mar 2017 at 05:39 Heystek Grobler >> wrote: >> >> Good day everyone >> >> >> >> I am trying to connect to a ROACH1 board with a serial to usb cable. I >> have tried the connection through putty and minicom. I can open up a serial >> connection but I can not see the U-Boot loader kicking in and watch the >> start up sequence. I also have ROACH2 and I can see U-Boot and the start up >> sequence fine in it with a USB cable. >> >> >> >> Do you perhaps know what the problem could be that I am not getting is >> right on the ROACH1? >> >> >> >> Have a great day >> >> >> >> Heystek Grobler >> >> -- >> >> You received this message because you are subscribed to the Google >> Groups "casper@lists.berkeley.edu" group. >> >> To unsubscribe from this group and stop receiving emails from it, send >> an email to casper+unsubscr...@lists.berkeley.edu. >> >> To post to this group, send email to casper@lists.berkeley.edu. >> >> -- >> >> You received this message because you are subscribed to the Google >> Groups "casper@lists.berkeley.edu" group. >> >> To unsubscribe from this group and stop receiving emails from it, send >> an email to casper+unsubscr...@lists.berkeley.edu. >> >> To post to this group, send email to casper@lists.berkeley.edu. >> > >> > >> > -- >> > You received this message because you are subscribed to the Google >> Groups "casper@lists.berkeley.edu" group. >> > To unsubscribe from this group and stop receiving emails from it, send >> an email to casper+unsubscr...@lists.berkeley.edu. >> > To post to this group, send email to casper@lists.berkeley.edu. >> > >> > >> > -- >> > You received this message because you are subscribed to the Google >> Groups "casper@lists.berkeley.edu" group. >> > To unsubscribe from this group and stop rece
