Re: PCI floppy controller

[Chuck Guzis via cctalk]

On 4/21/22 18:01, Charles Dickman wrote:
> On Thu, Apr 21, 2022 at 8:02 PM Chuck Guzis via cctalk


> I was at that point and looking at DP3T switches to have an external
> connection as well. DP3T switches are mess.

You could also bring the floppy cable out to a standard DC-37 connector
on a bracket, then use a ABCD switchbox to select whatever external
DC-37-cabled floppy drive you wanted.

They appear to still be offered in 2-way and 4-way varieties.

--Chuck

Re: PCI floppy controller

[Grant Taylor via cctalk]

On 4/21/22 5:47 PM, Charles Dickman via cctalk wrote:

Were there ever any floppy controllers for the (parallel) PCI bus?


Didn't some of the Adaptec SCSI cards have a floppy controller on them?

Could that be made to work?



--
Grant. . . .
unix || die

Re: PCI floppy controller

[Fred Cisin via cctalk]

On Thu, 21 Apr 2022, Charles Dickman via cctalk wrote:

Were there ever any floppy controllers for the (parallel) PCI bus? I
Googled a bunch and haven't found any.
I am trying to outfit a computer for the long haul that can run a bunch of
older software in virtual machines and do things like duplicate floppies in
different formats. The motherboard I have supports all the formats I have
tried, but only supports one drive. It also only has PCI and PCIe slots.


If you have floppy support already, couldn't you intercept the floppy 
cable and switch the drive selects?
OK, ideal would be software controlled switching, but even a physical 
toggle switch in the cable would let you change to another drive, 
including a DC37 connector for externals.



Didn't some of the Giga-Byte Technology GA series (GA-108) of PCI SCSI 
controllers have floppy support?

https://arvutimuuseum.ee/th99/c/E-H/20876.htm

Tyan S1363?
Tyan S1366?


'course FINDING one might not be possible

I've heard of a PCI to ISA bridge, but I've never seen one.  Did any such 
thing ever exist?Wouldn't something like that be necessary to get 
adequate compatability?

Re: PCI floppy controller

[Charles Dickman via cctalk]

On Thu, Apr 21, 2022 at 8:30 PM Mike Loewen via cctalk <
cctalk@classiccmp.org> wrote:

> On Thu, 21 Apr 2022, Charles Dickman via cctalk wrote:
> > I am trying to outfit a computer for the long haul that can run a bunch
> of
> > older software in virtual machines and do things like duplicate floppies
> in
> > different formats. The motherboard I have supports all the formats I have
> > tried, but only supports one drive. It also only has PCI and PCIe slots.
>
> You might consider going with a different (older) motherboard with a
> floppy
> controller that supports
>

I thought about that too, but I'm trying to stick with the hardware that I
have. It is an ASUS board and an AMD Phenom II X955 processor. I have found
a sweet spot between the Ubuntu version, kernel version and VMWARE version
that run my virtual machines.


> Mike Loewen mloe...@cpumagic.scol.pa.us
> Old Technology  http://q7.neurotica.com/Oldtech/


-chuck

Re: PCI floppy controller

[Charles Dickman via cctalk]

On Thu, Apr 21, 2022 at 8:02 PM Chuck Guzis via cctalk <
cctalk@classiccmp.org> wrote:

> On 4/21/22 16:47, Charles Dickman via cctalk wrote:
> > Were there ever any floppy controllers for the (parallel) PCI bus? I
> > Googled a bunch and haven't found any.
>


> external one.Works a treat--recall that you need only switch the
> drive select and motor enable lines, so a DPDT switch suffices.  I like
>

I was at that point and looking at DP3T switches to have an external
connection as well. DP3T switches are mess.


> --Chuck
>

-chuck

RX50 checkouts, different firmware?

[Chris Zach via cctalk]

I've been working through my old RX50 drives figuring out what works, 
what needs cleaning, and what destroys disks.


Using some scratch floppies I have found a couple of them were dirty, 
one had a head with something embedded (that I managed to get out), and 
one RX50 drive totally flunks the diagnostics on my Pro/380 (but does 
sort of work on the Rainbow).


However I have noticed something: As part of my tests I am creating two 
floppies with two 350 block files on them. At first I was testing each 
floppy by writing the files, then doing a diff to compare them with the 
disk. Then I realized I can just have one floppy read and another write 
at the same time with a copy dz1:(file) dz2: and doing a diff both ways.


Two of the RX50's do the Diff silently and quickly. The third however 
clicks the head pad load each track, each disk. I was wondering if this 
is because of firmware differences. When I do a compare to disk there is 
one smooth read from the floppy, but when going from floppy to floppy it 
seems to want to do the head pad each time it switches floppy disks.


Thoughts? Good news is after cleaning and testing I have three RX50's 
which can read from each other, write the disks, and don't leave any 
track marks in the disk oxide. Now I can do a bit of reading of some old 
disks and go from there...


Chris

Re: PCI floppy controller

[Mike Loewen via cctalk]

On Thu, 21 Apr 2022, Charles Dickman via cctalk wrote:


Were there ever any floppy controllers for the (parallel) PCI bus? I
Googled a bunch and haven't found any.

I am trying to outfit a computer for the long haul that can run a bunch of
older software in virtual machines and do things like duplicate floppies in
different formats. The motherboard I have supports all the formats I have
tried, but only supports one drive. It also only has PCI and PCIe slots.


   You might consider going with a different (older) motherboard with a floppy 
controller that supports two drives and single-density (FM). I'm using an Abit 
KV8PRO with a 1.8GHz Athlon CPU, onboard 10/100/1000 ethernet, 1 AGP 8X/4X 
slot, 5 PCI slots, SATA and IDE drive support, and 4 USB ports. The floppy 
controller passes all of Dave Dunfield's TESTFDC tests except the 
double-density 128-byte sector tests. I haven't yet found a need for that 
format. I use this system to image and create 3-1/2", 5-1/4" and 8" diskettes, 
single and double-density.



Mike Loewen mloe...@cpumagic.scol.pa.us
Old Technology  http://q7.neurotica.com/Oldtech/

Re: PCI floppy controller

[Chuck Guzis via cctalk]

On 4/21/22 16:47, Charles Dickman via cctalk wrote:
> Were there ever any floppy controllers for the (parallel) PCI bus? I
> Googled a bunch and haven't found any.
> 
> I am trying to outfit a computer for the long haul that can run a bunch of
> older software in virtual machines and do things like duplicate floppies in
> different formats. The motherboard I have supports all the formats I have
> tried, but only supports one drive. It also only has PCI and PCIe slots.

None that I'm aware of--PC floppy driver software depends very heavily
on the ISA bus DMA and interrupt setup.  Even with no ISA slots, the
typical PC chipset provided the southbridge ISA hooks for a floppy
controller.   Gradually it has disappeared, along with the legacy serial
and parallel ports.

On one of my Socket 939 motherboards, I fashioned a bracket with a DC37F
connector and a switch, so I could switch the single floppy to an
external one.Works a treat--recall that you need only switch the
drive select and motor enable lines, so a DPDT switch suffices.  I like
the motherboard because it can handle MFM and FM encodings, as well as
the 128 byte MFM sectors.

I suppose it might be possible to fashion a legacy floppy controller on
a PCI card with enough supporting logic to make it compatible with
existing software, but I'm not aware of such an effort.

--Chuck

Re: PCI floppy controller

[Zane Healy via cctalk]

> On Apr 21, 2022, at 4:47 PM, Charles Dickman via cctalk 
>  wrote:
> 
> Were there ever any floppy controllers for the (parallel) PCI bus? I
> Googled a bunch and haven't found any.
> 
> I am trying to outfit a computer for the long haul that can run a bunch of
> older software in virtual machines and do things like duplicate floppies in
> different formats. The motherboard I have supports all the formats I have
> tried, but only supports one drive. It also only has PCI and PCIe slots.
> 
> -chuck

Catweasel?

http://wiki.icomp.de/wiki/Catweasel

Zane

PCI floppy controller

[Charles Dickman via cctalk]

Were there ever any floppy controllers for the (parallel) PCI bus? I
Googled a bunch and haven't found any.

I am trying to outfit a computer for the long haul that can run a bunch of
older software in virtual machines and do things like duplicate floppies in
different formats. The motherboard I have supports all the formats I have
tried, but only supports one drive. It also only has PCI and PCIe slots.

-chuck

Re: interesting DEC Pro stuff on eBay

[Sean Conner via cctalk]

It was thus said that the Great Mike Katz via cctalk once stated:
> 
> I could spend pages just describing how the 68K chip just blows away the 
> 8086 considering they were both released at about the same time.

  Agree here.  I loved the 68K and have fond memories of writing programs in
it.  But while the x86 has been Frankensteined into 64 bits, I don't think I
can see the 68K ever being a 64-bit architecture.  I don't think there are
enough unused bits in the instruction formatting for that.

> For crying out loud the 6809 even though it only addresses 64K is a more 
> powerful processor than the 8086.  Even with the 8086 clocking faster 
> than the 6809.

  As much as I like the 6809 [1] I think you are overselling it vs. the
Intel 8086.  Both only support a single IRQ [2], but the 8086 has more
registers, and with the segmentation, you can have split code and data of
64K each.  On the flip side, the 6809 does have some sweet addressing modes
(especially indirect indexed) and easy position independent code (love
that).  

  -spc (And I've written assembly for all three architectures)

[1] I even wrote an emulator: https://github.com/spc476/mc6809

[2] Okay, technically, the 6809 also has a "fast" interrupt, which only
saves the PC and CC registers.

Re: Intel VS Motorola (Was: interesting DEC Pro stuff on eBay

[Chuck Guzis via cctalk]

On 4/21/22 15:14, Fred Cisin via cctalk wrote:
> On Thu, 21 Apr 2022, Mike Katz via cctalk wrote:>> Intel has never understood 
> interrupts or good cpu architecture.
>> Look at the segment:offset architecture of the 8086 and of course it's
>> single interrupt (without the separate interrupt controller chip) vs
>> the 68000 somewhat orthogonal 32 bit architecture and 256 interrupts
>> with 8 levels built into the chip.
>> I could spend pages just describing how the 68K chip just blows away
>> the 8086 considering they were both released at about the same time.
>> For crying out loud the 6809 even though it only addresses 64K is a
>> more powerful processor than the 8086.  Even with the 8086 clocking
>> faster than the 6809.

A lot of it was a matter of "Vass you dere, Shollie?"

To be fair, how to do 8-level interrupts with the 8080 and 8008 was
detailed in several application notes and provided initially by the 8214
PICU; before that, schematics were published on how to use the 74148
priority encoder.  It's noteworthy that the 8085 included an on-chip
priority encoder, as did the 80186.

Initially, the 8086 was never really intended to be in the same target
market as the 68K.  Intel had the iAPX 432 plans for that--the so-called
"micro mainframe".

One thing that Intel did offer was a rich range of support
chips--something that was a concern for early potential adopters of the 68K.

What Intel did realize is that, like it or not, backward compatibility
is very important.  Much of the early IBM PC software was converted 8080
assembly language--Intel even provided a conversion tool.   Given the
expense of developing new software back then, that was a big concern.
Heck, even PC-DOS was a loose rehash of CP/M-80 with a different
filesystem stapled on.

The compatibility lesson came back to haunt Intel recently with the IA64
(Itanium) architecture.

It should be noted that I really, really liked the architecture of the
68000; in the same vein, I really, really liked that of the NSC 32000
chips.  I really liked the PowerPC chips and use ARM MCUs in my embedded
stuff.  But my desktops still use Intel-compatible CPUs.

I'm reminded that almost every car on the road still has a dashboard
fixture called a "glove compartment" to keep your driving gloves safe.

--Chuck

Intel VS Motorola (Was: interesting DEC Pro stuff on eBay

[Fred Cisin via cctalk]

On Thu, 21 Apr 2022, Mike Katz via cctalk wrote:

Intel has never understood interrupts or good cpu architecture.
Look at the segment:offset architecture of the 8086 and of course it's single 
interrupt (without the separate interrupt controller chip) vs the 68000 
somewhat orthogonal 32 bit architecture and 256 interrupts with 8 levels 
built into the chip.
I could spend pages just describing how the 68K chip just blows away the 8086 
considering they were both released at about the same time.
For crying out loud the 6809 even though it only addresses 64K is a more 
powerful processor than the 8086.  Even with the 8086 clocking faster than 
the 6809.


The over-simplification that I gave my beginning students:

Intel's chip design technique was to add features to the currect chip to 
make the next one.  So, starting with the 8008?, they added kludges to 
kludges.  Some of which made some things very awkward, such as the 
segment:offset method to add more memory to a 64K architecture.  BUT, 
whenever they releaased a new chip, the software from the previous chip 
needed only trivial modifications to work.


MS-DOS was based on CP/M (although NOT "plagiarized").
When the 5150(PC) shipped, major third part software packages became 
available right away.
For example, when the 5150 (PC) came out in August 1981, Micropro 
immediately got Wordstar working on it.  'course it took them much longer 
to modify the documentation; we kidded them that that could have been done 
faster with certain word processors.
IBM had Visicalc and Easy-writer; Wordstar (MicroPro) and Supercalc 
(Sorcim) were announced and demonstated immediately.



On the other hand, Motorola did not modify their chips for the next major 
one.  Instead, they redesigned from scratch.  It took a little longer, and 
all software had to be rewritten, but they consistently ended up with THE 
BEST chip ("ichiban").


The 6809 was THE BEST 8 bit processor.  But, marketing??
They handed it to Radio Shack who decided it would be a cartridge based 
home games machine, with chiclet keyboard, RF [ONLY] video, and minimal 
expansion capability.   Users hacked around those limitations.



When Apple made the Lisa, they had to write ALL software from scratch.
Other than some algorithms from the source code, none of their 6502 
software could be simply "ported" to the 68000.
I have heard an anecdeote [from an Apple senior programmer] that during 
development of the Mac, it was mandated that it would ship with FOUR major 
software packages; but, with slipping deadlines, the four consisted of 
Mac-Write, Mac-Paint, Mac-Write, and Mac-Paint.  Apocriphal?  but amusing.


When the Mac shipped, there was a frustratingly long delay for third party 
software.


--
Grumpy Ol' Fred ci...@xenosoft.com

Re: interesting DEC Pro stuff on eBay

[Mike Katz via cctalk]

Intel has never understood interrupts or good cpu architecture.

Look at the segment:offset architecture of the 8086 and of course it's 
single interrupt (without the separate interrupt controller chip) vs the 
68000 somewhat orthogonal 32 bit architecture and 256 interrupts with 8 
levels built into the chip.


I could spend pages just describing how the 68K chip just blows away the 
8086 considering they were both released at about the same time.


For crying out loud the 6809 even though it only addresses 64K is a more 
powerful processor than the 8086.  Even with the 8086 clocking faster 
than the 6809.


On 4/21/2022 1:51 PM, Paul Koning via cctalk wrote:



On Apr 21, 2022, at 2:47 PM, Dave Mitton via cctech  
wrote:

Date: Wed, 20 Apr 2022 14:03:48 -0400
From: Paul Koning 
To: Chris Zach , "cctalk@classiccmp.org"

Subject: Re: interesting DEC Pro stuff on eBay
….

➢ That said, you'd think that DMA would make a 1:1 interleave controller much 
more feasible.  And Bjoren also mentioned Ethernet.  The DECNA is not to 
horrible without DMA because you can use its on-board memory directly as host 
packet buffers, though CT bus based memory is as I recall slower than 
motherboard memory.  Still, one wonders why they didn't use a correctly 
designed Ethernet chip like LANCE, either with local memory or with DMA.

paul

You’d have to ask Bill Duane about that…  He found several dynamic problems 
with the Intel Ethernet chipset.  He was under NDA to them at one time.
I suspect that the Pro team didn’t ask us and just went with that chip for some 
other reason.   We obviously regretted that in the long run.

I sometimes get the feeling that the Pro team grabbed every Intel chip they 
could possibly use, even though every single one of them is badly designed and 
causes piles of problems.  For example, the interrupt structure of the Pro is a 
nightmare, attributable directly to the fact that is what Intel came up with.  
And the 82586 implements bugs that were recognized and fixed 20 years earlier.

paul

Selling my 026/029 IBM punch card control drum ($150)

[Barry Hills via cctalk]

Selling my 026/029 IBM punch card control drum ($150)

Allows tabs, special characters, auto sequences, etc on IBM card punch systems

Works fine.  Good Condition.

Contact me at cct...@gohills.com 

Re: interesting DEC Pro stuff on eBay

[Paul Koning via cctalk]

> On Apr 21, 2022, at 2:47 PM, Dave Mitton via cctech  
> wrote:
> 
> Date: Wed, 20 Apr 2022 14:03:48 -0400
> From: Paul Koning 
> To: Chris Zach , "cctalk@classiccmp.org"
>   
> Subject: Re: interesting DEC Pro stuff on eBay
> ….
> 
> ➢ That said, you'd think that DMA would make a 1:1 interleave controller much 
> more feasible.  And Bjoren also mentioned Ethernet.  The DECNA is not to 
> horrible without DMA because you can use its on-board memory directly as host 
> packet buffers, though CT bus based memory is as I recall slower than 
> motherboard memory.  Still, one wonders why they didn't use a correctly 
> designed Ethernet chip like LANCE, either with local memory or with DMA.
> 
>   paul
> 
> You’d have to ask Bill Duane about that…  He found several dynamic problems 
> with the Intel Ethernet chipset.  He was under NDA to them at one time.
> I suspect that the Pro team didn’t ask us and just went with that chip for 
> some other reason.   We obviously regretted that in the long run.

I sometimes get the feeling that the Pro team grabbed every Intel chip they 
could possibly use, even though every single one of them is badly designed and 
causes piles of problems.  For example, the interrupt structure of the Pro is a 
nightmare, attributable directly to the fact that is what Intel came up with.  
And the 82586 implements bugs that were recognized and fixed 20 years earlier.

paul

Re: interesting DEC Pro stuff on eBay

[Dave Mitton via cctalk]

Date: Wed, 20 Apr 2022 14:03:48 -0400
From: Paul Koning 
To: Chris Zach , "cctalk@classiccmp.org"

Subject: Re: interesting DEC Pro stuff on eBay
….

➢ That said, you'd think that DMA would make a 1:1 interleave controller much 
more feasible.  And Bjoren also mentioned Ethernet.  The DECNA is not to 
horrible without DMA because you can use its on-board memory directly as host 
packet buffers, though CT bus based memory is as I recall slower than 
motherboard memory.  Still, one wonders why they didn't use a correctly 
designed Ethernet chip like LANCE, either with local memory or with DMA.

paul

You’d have to ask Bill Duane about that…  He found several dynamic problems 
with the Intel Ethernet chipset.  He was under NDA to them at one time.
I suspect that the Pro team didn’t ask us and just went with that chip for some 
other reason.   We obviously regretted that in the long run.

Dave.


Sent from Mail for Windows

RE: idea for a universal disk interface

[Tom Gardner via cctalk]

Got me - I was thinking of HDDs which from the beginning had at least 2
heads so, given an appropriately sized Gap1,  it was always faster to switch
heads. 
And FWIW is some later SyQuest cartridge drives employing sectored servos it
was faster to seek than to switch heads so they made a head switch into a
seek, but they masked that all in the drive firmware

In any event, it really doesn't matter for this device emulator if the end
of a track is followed by a seek command; any time there is a seek command
there is lots of time for the device's housekeeping to get ready for the
next read.

Tom

-Original Message-
From: Fred Cisin [mailto:ci...@xenosoft.com] 
Sent: Wednesday, April 20, 2022 11:55 AM
To: General Discussion: On-Topic and Off-Topic Posts
Subject: RE: idea for a universal disk interface

On Wed, 20 Apr 2022, Tom Gardner via cctalk wrote:
> Likewise, I don't know it for certain, but I am pretty sure that it is 
> true that virtually all controllers switch heads sequentially when 
> transferring blocks beyond the end of the track,

Are you implying that data/file that is more than one track long has its
next data on a track that is a different head of the same cylinder?

If that is, indeed what you are saying, . . .
It would make sense, and is common.  Since it is obvious that switching
heads should take less time than stepping to the next cylinder.  BUT, it is
a choice by the file system, not by the controller.

As a simple example, when floppy disks went from single sided to double
sided, SOME OS programmers chose to switch heads before stepping to the 
next cylinder.   (Cylinder 0 side A, cylinder 0 side B, Cylinder 1 side A, 
cylinder 1 side B, etc.)

BUT, some chose to "keep what they had", and use the second side as an
"extension" of the first side, and chose to not switch heads until all
tracks on the first side were exhausted.  (Cylinder 0 side A, Cylinder 1
side A, Cylinder 2 side A . . . )  Of those, most "recalibrated" (seek to
zero) for the second side (cylinder 0 side A, Cylinder 1 side A . . .
Cylinder 75 side A, Cylinder 76 side A, Cylinde 0 side B, Cylinder 1 side B)
(that's for 77 track 8")  while others started using the second side
starting at the high end (to avoid the seek to zero delay).  (cylinder 0
side A, Cylinder 1 side A . . . Cylinder 75 side A, Cylinder 76 side A,
Cylinder 76 side B, cylinder 75 side B, . . .) There were a few more
variations, because it was the programmer making the decision, not the
controller, and we can come up with some amazing cockamamy ideas.

--
Grumpy Ol' Fred ci...@xenosoft.com