[cctalk] Re: What happened to the PDP-8 on ebay?

2023-10-03 Thread jim stephens via cctalk




On 10/3/23 21:23, Bill Degnan via cctalk wrote:

There was a PDP-8 (rack straight 8 with asr33) that was on ebay that
disappeared..anyone know if it was sold?  I can't find it, maybe the seller
pulled the auction to sell privately.
Bill
I trolled thru VCF forum and I think this is the one you recall. It's 
the last straight 8 I saw listed.


https://www.ebay.com/itm/145314563635

I also off your topic have observed a German listing and British listing 
for Olivetti Programma 101s for 40,000 pounds and 60,000 euro, in the 
same fantasy range as this listing which is for $18,000.


This listing shows currently terminated September 20 due to an error in 
the listing.  No relist by this vendor.  He also did something on Sept 2 
with is.


Thanks
jim


[cctalk] What happened to the PDP-8 on ebay?

2023-10-03 Thread Bill Degnan via cctalk
There was a PDP-8 (rack straight 8 with asr33) that was on ebay that
disappeared..anyone know if it was sold?  I can't find it, maybe the seller
pulled the auction to sell privately.
Bill


[cctalk] Re: Microcom S-64 8085 system

2023-10-03 Thread Holm Tiffe via cctalk
Wouter de Waal via cctalk wrote:

> Hi all
> 
> I re-discovered some eurocards I found in a box at a swapmeet long ago.
> 
> It looks like a complete 8085 system. Lots of RAM, 2K EPROM, I/O, FDC.
> 
> The strange thing is that the EPROM is mapped at F800, the code in there
> looks like 8085 code, and looks like it wants to live at F800. And there's
> RAM at .
> 
> The DIN41612 A/C 64 pin bus has provision for 16 bits data.
> 
> Pics here http://retro.co.za/8085/Microcom/
> 
> Anyone maybe have more information on this? I'm curious.
> 
> W

Besides of relocating the entire ROM temporarly to 0x0 there are other
possibilities, for example placing NOP's (0x0) on the data bus until
the bus addresses reaching 0xf800 for the first time. This way a few
extra gates and a flipflop is all what you need.
On Z80 Systems I've mostly used a mechanism that enables writes to the
RAM at 0x0, but the reads came from the ROM until an flipflop was set
by an out instruction (and reset by Reset).

Regards,
Holm
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