Good news in the meantime: I did a fair bit of testing last night and I
have a good terminator, 2 good cables, one good RLV12, and one good RL02.
The second RL02 was odd: It would spin up, come to ready with no
problems. However when I tried to boot it would endlessly seek a few
tracks in a loop and go no further. Odd. So to isolate the problem I
pulled the controller board and lid from my working RL02, put it on the
odd one, and sure enough the odd one works.
Went to the shed and found my spare RL02 controller board I bought on
Ebay an eternity ago. Put it back in the odd drive (putting the good
lid/controller back on the good drive), powered it up, and once again it
works!
RL's are pretty solid little drives. Not much capacity, but after
sitting for 20 years they fire right up and get to work without a lot of
fuss...
So now I have two working RL02's. I'm going to spend some time today
making a few backups of my RSX11M 4.2 install media (wonder if DSC is
still on there), then think about doing a proper SYSGEN in the next few
weeks. I'll have to put in the DZV11 so I can have some serial ports
(and Sysgen is a pain in that you have devices and *that's it*) but if I
can get something running here I should be able to remount the MTI ESDI
disk and get some data back. We shall see....
Chris
On 11/23/2019 3:14 PM, Noel Chiappa via cctalk wrote:
> From: Chris Zach
> The MSV11-QC board ... failed startup diagnostics with what looks like
> a stuck bit. .. now I need engineering schematics for that board so I
> can replace one of the 41256 memory chips. On the positive side it looks
like
> a pretty obvious stuck bit, just need to know which chip is at that
> address and memory location....
I suspect you're out of luck on the prints, I think all there is is the
User Manual. Not to worry, it should be pretty easy to create a bit->chip
table, I did that for the MSV11-J:
https://gunkies.org/wiki/MSV11-J_QBUS_memory#Technical_information
when I needed to repair one; it should be pretty easy to duplicate the
process for the -Q.
I did it with a 2-instruction scope loop, doing a word write to a given
location, floating a '1' bit along a word of '0's, looking at the 'data in'
pin on the DRAM chips. I see the -Q has a 17x8 array of DRAMs, so 16 bits of
data and a parity bit (odd chip out); so in some ways even easier than the -J
(which had ECC). 8 banks, but with a little luck they're in some sort of
logical order.
I have a -QA, of the later etch rev, which is the same etch as your -QC;
so I can help with the mapping process, if you need it; let me know.
Noel
