[PATCH] D86743: [analyzer] Ignore VLASizeChecker case that could cause crash

2020-12-24 Thread Vince Bridgers via Phabricator via cfe-commits 
vabridgers added a comment.

@baloghadamsoftware , these changes do seem to help the case described. This 
patch isn't quite up to date, and needs to be integrated with changes from 
@balazske (my integration is hacky and needs to be cleaned up). I'll continue 
working on this, and get back to you. These changes may also be helpful in 
solving https://bugs.llvm.org/show_bug.cgi?id=48136 (as I had discussed with 
@steakhal). Thanks for looking into these things.


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[PATCH] D93806: [clang-format] PR48569 clang-format fails to align case label with `switch` with Whitesmith Indentation

2020-12-24 Thread Björn Schäpers via Phabricator via cfe-commits 
HazardyKnusperkeks added a reviewer: HazardyKnusperkeks.
HazardyKnusperkeks accepted this revision.
HazardyKnusperkeks added a comment.
This revision is now accepted and ready to land.

If that's how it's supposed to look, than this patch is fine.


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[PATCH] D92936: [Sema] Fix deleted function problem in implicitly movable test

2020-12-24 Thread Arthur O'Dwyer via Phabricator via cfe-commits 
Quuxplusone accepted this revision.
Quuxplusone added a comment.
This revision is now accepted and ready to land.

I don't fully understand the new control flow, but at least the new 
//behavior// (after applying this patch) looks like an improvement to me.
I recommend rebasing on top-of-tree, mainly so that the buildbots will run 
again and presumably be greener this time.

I still doubt that I have the authority to "accept" this patch, and am hoping 
to see someone like @zygoloid weigh in, even if it's only to say "meh." I 
//am// willing and able to //physically// land this patch, if someone says it's 
appropriate for me to do so.




Comment at: clang/lib/Sema/SemaInit.cpp:4181
+  // For deleted functions in other contexts, there is no need to get the
+  // initialization sequence.
+  if (Result == OR_Deleted && Kind.getKind() != InitializationKind::IK_Copy)

IIUC, this comment is explaining the motivation for repeating `if (Result == 
OR_Deleted) // don't return quite yet` twice in the code above — line 4123 and 
line 4146. It might be better to move the comment higher, then.



Comment at: clang/lib/Sema/SemaInit.cpp:5285
+// need the initialization sequence to decide whether to perform the second
+// overload resolution.
+if (!(Result == OR_Deleted &&

Checking my understanding: If the first resolution selects a deleted function 
which is a constructor whose first parameter is an rvalue reference to T, then 
we don't perform the second resolution. If the first resolution selects a 
deleted function which is not a constructor, or whose parameter is of the wrong 
type, then (in C++11 through C++17 but not in C++20) we //do// perform the 
second resolution.


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[PATCH] D93806: [clang-format] PR48569 clang-format fails to align case label with `switch` with Whitesmith Indentation

2020-12-24 Thread MyDeveloperDay via Phabricator via cfe-commits 
MyDeveloperDay created this revision.
MyDeveloperDay added reviewers: krasimir, curdeius, JakeMerdichAMD, jbcoe.
MyDeveloperDay added projects: clang, clang-format.
MyDeveloperDay requested review of this revision.

https://bugs.llvm.org/show_bug.cgi?id=48569

This is a tentative fix which addresses a PR raise regarding Case indentation 
when working with Whitesmiths Indentation

I could not find online any reference sources as to what the case indentation 
for Whitesmith's should be (or be allowed to be)

But according to the documentation, we don't obey the rules for Whitesmith's

  In particular, the documentation states that this option is to "indent case 
labels one level from the switch statement. When false, use the same 
indentation level as for the switch statement."

The behaviour we add here is actually as the TODO in the tests used to state in 
D67627: Clang-format: Add Whitesmiths indentation style 
, but when D82016: [clang-format] [PR462254] 
fix indentation of default and break correctly in whitesmiths style 
 was added and I brought these tests out from 
being TODO I realized I changed the indentation.


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Files:
  clang/lib/Format/UnwrappedLineParser.cpp
  clang/unittests/Format/FormatTest.cpp


Index: clang/unittests/Format/FormatTest.cpp
===
--- clang/unittests/Format/FormatTest.cpp
+++ clang/unittests/Format/FormatTest.cpp
@@ -13538,7 +13538,7 @@
"  {\n"
"  switch (a)\n"
"{\n"
-   "case 2:\n"
+   "  case 2:\n"
"{\n"
"}\n"
"break;\n"
@@ -13550,18 +13550,18 @@
"  {\n"
"  switch (a)\n"
"{\n"
-   "case 0:\n"
+   "  case 0:\n"
"break;\n"
-   "case 1:\n"
+   "  case 1:\n"
"{\n"
"foo();\n"
"break;\n"
"}\n"
-   "case 2:\n"
+   "  case 2:\n"
"{\n"
"}\n"
"break;\n"
-   "default:\n"
+   "  default:\n"
"break;\n"
"}\n"
"  }\n",
@@ -13571,12 +13571,12 @@
"  {\n"
"  switch (a)\n"
"{\n"
-   "case 0:\n"
+   "  case 0:\n"
"{\n"
"foo(x);\n"
"}\n"
"break;\n"
-   "default:\n"
+   "  default:\n"
"{\n"
"foo(1);\n"
"}\n"
Index: clang/lib/Format/UnwrappedLineParser.cpp
===
--- clang/lib/Format/UnwrappedLineParser.cpp
+++ clang/lib/Format/UnwrappedLineParser.cpp
@@ -2244,18 +2244,26 @@
 --Line->Level;
   if (LeftAlignLabel)
 Line->Level = 0;
+
+  bool RemoveWhiteSmithCaseIndent =
+  (!Style.IndentCaseBlocks &&
+   Style.BreakBeforeBraces == FormatStyle::BS_Whitesmiths);
+
+  if (RemoveWhiteSmithCaseIndent)
+--Line->Level;
+
   if (!Style.IndentCaseBlocks && CommentsBeforeNextToken.empty() &&
   FormatTok->Tok.is(tok::l_brace)) {
-CompoundStatementIndenter Indenter(this, Line->Level,
-   Style.BraceWrapping.AfterCaseLabel,
-   Style.BraceWrapping.IndentBraces);
+
+CompoundStatementIndenter Indenter(
+this, Line->Level, Style.BraceWrapping.AfterCaseLabel,
+Style.BraceWrapping.IndentBraces || RemoveWhiteSmithCaseIndent);
 parseBlock(/*MustBeDeclaration=*/false);
 if (FormatTok->Tok.is(tok::kw_break)) {
   if (Style.BraceWrapping.AfterControlStatement ==
   FormatStyle::BWACS_Always) {
 addUnwrappedLine();
-if (!Style.IndentCaseBlocks &&
-Style.BreakBeforeBraces == FormatStyle::BS_Whitesmiths) {
+if (RemoveWhiteSmithCaseIndent) {
   Line->Level++;
 }
   }
@@ -2276,6 +2284,7 @@
 
 void UnwrappedLineParser::parseCaseLabel() {
   assert(FormatTok->Tok.is(tok::kw_case) && "'case' expected");
+
   // FIXME: fix handling of complex expressions here.
   do {
 nextToken();


Index: clang/unittests/Format/FormatTest.cpp
===
--- clang/unittests/Format/FormatTest.cpp
+++ clang/unittests/Format/FormatTest.cpp
@@ -13538,7 +13538,7 @@
"  {\n"
"  switch (a)\n"
"{\n"
-   "case 2:\n"
+   "  case 2:\n"
"{\n"
"}\n"
"

[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Dave Green via Phabricator via cfe-commits 
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Thanks. I think this LGTM now.


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[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Mark Murray via Phabricator via cfe-commits 
MarkMurrayARM updated this revision to Diff 313700.
MarkMurrayARM added a comment.

More review comments.


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Files:
  clang/test/Driver/aarch64-cpus.c
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMSubtarget.cpp
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -308,6 +308,13 @@
  ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
  ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ ARM::AEK_SEC | ARM::AEK_MP |
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
+ ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_FP16 | ARM::AEK_DOTPROD,
+ "8.2-A"),
 ARMCPUTestParams("cortex-a77", "armv8.2-a", "crypto-neon-fp-armv8",
  ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
  ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
@@ -385,7 +392,7 @@
  ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP,
  "7-S")), );
 
-static constexpr unsigned NumARMCPUArchs = 91;
+static constexpr unsigned NumARMCPUArchs = 92;
 
 TEST(TargetParserTest, testARMCPUArchList) {
   SmallVector List;
@@ -962,6 +969,14 @@
  AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
  AArch64::AEK_SSBS,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ AArch64::AEK_RAS | AArch64::AEK_CRC |
+ AArch64::AEK_CRYPTO | AArch64::AEK_FP |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM |
+ AArch64::AEK_FP16 | AArch64::AEK_DOTPROD |
+ AArch64::AEK_RCPC | AArch64::AEK_SSBS,
+ "8.2-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1151,7 +1166,7 @@
  AArch64::AEK_LSE | AArch64::AEK_RDM,
  "8.2-A")), );
 
-static constexpr unsigned NumAArch64CPUArchs = 45;
+static constexpr unsigned NumAArch64CPUArchs = 46;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/ARM/ARMSubtarget.h
===
--- llvm/lib/Target/ARM/ARMSubtarget.h
+++ llvm/lib/Target/ARM/ARMSubtarget.h
@@ -63,6 +63,7 @@
 CortexA76,
 CortexA77,
 CortexA78,
+CortexA78C,
 CortexA8,
 CortexA9,
 CortexM3,
Index: llvm/lib/Target/ARM/ARMSubtarget.cpp
===
--- llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -294,6 +294,7 @@
   case CortexA76:
   case CortexA77:
   case CortexA78:
+  case CortexA78C:
   case CortexR4:
   case CortexR4F:
   case CortexR5:
Index: llvm/lib/Target/ARM/ARM.td
===
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -616,6 +616,8 @@
"Cortex-A77 ARM processors", []>;
 def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
"Cortex-A78 ARM processors", []>;
+def ProcA78C: SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
+   "Cortex-A78C ARM processors", []>;
 def ProcX1  : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
"Cortex-X1 ARM processors", []>;
 
@@ -1308,6 +1310,14 @@
  FeatureFullFP16,
  FeatureDotProd]>;
 
+def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
+ FeatureHWDivThumb,
+ FeatureHWDivARM,
+

[PATCH] D93786: [OpenMP][Fix] Make the arch selector for x86_64 work

2020-12-24 Thread Johannes Doerfert via Phabricator via cfe-commits 
jdoerfert added a comment.

In D93786#2470796 , @tianshilei1992 
wrote:

> Is it because the triple is separated by `-`?

x86 and 64 is separated by - in the architecture list so 
`getArchTypeForLLVMName` will not recognize "x86_64".


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[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Dave Green via Phabricator via cfe-commits 
dmgreen added inline comments.



Comment at: llvm/include/llvm/Support/AArch64TargetParser.def:151
+AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (AArch64::AEK_RAS))
 AARCH64_CPU_NAME("cortex-r82", ARMV8R, FK_CRYPTO_NEON_FP_ARMV8, false,

This needs changing too.



Comment at: llvm/lib/Target/ARM/ARM.td:1313
 
+def : ProcNoItin<"cortex-a78c", [ARMv82a,
+ FeatureHWDivThumb,

+ProcA78C



Comment at: llvm/lib/Target/ARM/ARM.td:1318
+ FeatureCRC,
+ FeatureFullFP16]>;
+

DotProd here too I would think.


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[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Mark Murray via Phabricator via cfe-commits 
MarkMurrayARM updated this revision to Diff 313694.
MarkMurrayARM added a comment.

Address review comments.


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Files:
  clang/test/Driver/aarch64-cpus.c
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMSubtarget.cpp
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -308,6 +308,13 @@
  ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
  ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ ARM::AEK_SEC | ARM::AEK_MP |
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
+ ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_FP16 | ARM::AEK_DOTPROD,
+ "8.2-A"),
 ARMCPUTestParams("cortex-a77", "armv8.2-a", "crypto-neon-fp-armv8",
  ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
  ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
@@ -385,7 +392,7 @@
  ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP,
  "7-S")), );
 
-static constexpr unsigned NumARMCPUArchs = 91;
+static constexpr unsigned NumARMCPUArchs = 92;
 
 TEST(TargetParserTest, testARMCPUArchList) {
   SmallVector List;
@@ -962,6 +969,12 @@
  AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
  AArch64::AEK_SSBS,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ AArch64::AEK_RAS | AArch64::AEK_CRC |
+ AArch64::AEK_CRYPTO | AArch64::AEK_FP |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM,
+ "8.2-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1151,7 +1164,7 @@
  AArch64::AEK_LSE | AArch64::AEK_RDM,
  "8.2-A")), );
 
-static constexpr unsigned NumAArch64CPUArchs = 45;
+static constexpr unsigned NumAArch64CPUArchs = 46;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/ARM/ARMSubtarget.h
===
--- llvm/lib/Target/ARM/ARMSubtarget.h
+++ llvm/lib/Target/ARM/ARMSubtarget.h
@@ -63,6 +63,7 @@
 CortexA76,
 CortexA77,
 CortexA78,
+CortexA78C,
 CortexA8,
 CortexA9,
 CortexM3,
Index: llvm/lib/Target/ARM/ARMSubtarget.cpp
===
--- llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -294,6 +294,7 @@
   case CortexA76:
   case CortexA77:
   case CortexA78:
+  case CortexA78C:
   case CortexR4:
   case CortexR4F:
   case CortexR5:
Index: llvm/lib/Target/ARM/ARM.td
===
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -616,6 +616,8 @@
"Cortex-A77 ARM processors", []>;
 def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
"Cortex-A78 ARM processors", []>;
+def ProcA78C: SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
+   "Cortex-A78C ARM processors", []>;
 def ProcX1  : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
"Cortex-X1 ARM processors", []>;
 
@@ -1308,6 +1310,13 @@
  FeatureFullFP16,
  FeatureDotProd]>;
 
+def : ProcNoItin<"cortex-a78c", [ARMv82a,
+ FeatureHWDivThumb,
+ FeatureHWDivARM,
+ FeatureCrypto,
+ FeatureCRC,
+

[PATCH] D93800: [clangd][WIP] Add caching behaviour for clang-format config

2020-12-24 Thread Nathan James via Phabricator via cfe-commits 
njames93 created this revision.
njames93 added reviewers: sammccall, kadircet, hokein.
Herald added subscribers: usaxena95, arphaman, mgorny.
njames93 requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay, ilya-biryukov.
Herald added a project: clang.

I'm not super happy with this implementation right now, this is more a proof of 
concept, get it working kind of thing.
This does mimick the pattern that clang-format appears to use for grabbing its 
configuration albeit this goes straight to looking for config files in the 
directory rather than using the DefaultFormatStyle.

Although this is a large change. alot of modifications relate to the Tests 
being updated to this interface, I'd like to figure out how to minimise the 
changes and streamline the tests, but I'm not entirely sure the best way to go 
about that.


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Files:
  clang-tools-extra/clangd/CMakeLists.txt
  clang-tools-extra/clangd/ClangdServer.cpp
  clang-tools-extra/clangd/ClangdServer.h
  clang-tools-extra/clangd/CodeComplete.cpp
  clang-tools-extra/clangd/Compiler.h
  clang-tools-extra/clangd/FormatProvider.cpp
  clang-tools-extra/clangd/FormatProvider.h
  clang-tools-extra/clangd/Hover.cpp
  clang-tools-extra/clangd/Hover.h
  clang-tools-extra/clangd/ParsedAST.cpp
  clang-tools-extra/clangd/SourceCode.cpp
  clang-tools-extra/clangd/SourceCode.h
  clang-tools-extra/clangd/tool/Check.cpp
  clang-tools-extra/clangd/tool/ClangdMain.cpp
  clang-tools-extra/clangd/unittests/ClangdTests.cpp
  clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
  clang-tools-extra/clangd/unittests/HoverTests.cpp
  clang-tools-extra/clangd/unittests/PreambleTests.cpp
  clang-tools-extra/clangd/unittests/TestTU.cpp
  clang-tools-extra/clangd/unittests/TestTU.h

Index: clang-tools-extra/clangd/unittests/TestTU.h
===
--- clang-tools-extra/clangd/unittests/TestTU.h
+++ clang-tools-extra/clangd/unittests/TestTU.h
@@ -19,6 +19,7 @@
 
 #include "../TidyProvider.h"
 #include "Compiler.h"
+#include "FormatProvider.h"
 #include "ParsedAST.h"
 #include "TestFS.h"
 #include "index/Index.h"
@@ -60,6 +61,8 @@
   std::vector ExtraArgs;
 
   TidyProvider ClangTidyProvider = {};
+
+  mutable FormatProvider ClangFormatProvider = {};
   // Index to use when building AST.
   const SymbolIndex *ExternalIndex = nullptr;
 
Index: clang-tools-extra/clangd/unittests/TestTU.cpp
===
--- clang-tools-extra/clangd/unittests/TestTU.cpp
+++ clang-tools-extra/clangd/unittests/TestTU.cpp
@@ -9,6 +9,7 @@
 #include "TestTU.h"
 #include "Compiler.h"
 #include "Diagnostics.h"
+#include "FormatProvider.h"
 #include "TestFS.h"
 #include "index/FileIndex.h"
 #include "index/MemIndex.h"
@@ -61,6 +62,9 @@
   Inputs.Opts = ParseOptions();
   if (ClangTidyProvider)
 Inputs.ClangTidyProvider = ClangTidyProvider;
+  ClangFormatProvider =
+  getClangFormatProvider(FS, format::DefaultFallbackStyle);
+  Inputs.ClangFormatProvider = ClangFormatProvider;
   Inputs.Index = ExternalIndex;
   if (Inputs.Index)
 Inputs.Opts.SuggestMissingIncludes = true;
Index: clang-tools-extra/clangd/unittests/PreambleTests.cpp
===
--- clang-tools-extra/clangd/unittests/PreambleTests.cpp
+++ clang-tools-extra/clangd/unittests/PreambleTests.cpp
@@ -393,9 +393,9 @@
 auto FoundMacro = locateMacroAt(*MacroTok, AST->getPreprocessor());
 ASSERT_TRUE(FoundMacro);
 EXPECT_THAT(FoundMacro->Name, "FOO");
-auto HI =
-getHover(*AST, offsetToPosition(Modified.code(), Modified.point()),
- format::getLLVMStyle(), nullptr);
+auto HI = getHover(
+*AST, offsetToPosition(Modified.code(), Modified.point()),
+std::make_shared(format::getLLVMStyle()), nullptr);
 ASSERT_TRUE(HI);
 EXPECT_THAT(HI->Definition, testing::IsEmpty());
   }
@@ -409,7 +409,9 @@
 auto AST = createPatchedAST(Baseline, Modified.code());
 ASSERT_TRUE(AST);
 
-auto HI = getHover(*AST, Modified.point(), format::getLLVMStyle(), nullptr);
+auto HI = getHover(
+*AST, Modified.point(),
+std::make_shared(format::getLLVMStyle()), nullptr);
 ASSERT_TRUE(HI);
 EXPECT_THAT(HI->Definition, "#define BAR");
   }
Index: clang-tools-extra/clangd/unittests/HoverTests.cpp
===
--- clang-tools-extra/clangd/unittests/HoverTests.cpp
+++ clang-tools-extra/clangd/unittests/HoverTests.cpp
@@ -876,7 +876,9 @@
 TU.ExtraArgs.push_back("--target=x86_64-pc-linux-gnu");
 auto AST = TU.build();
 
-auto H = getHover(AST, T.point(), format::getLLVMStyle(), nullptr);
+auto H = getHover(
+AST, T.point(),
+std::make_shared(format::getLLVMStyle()), nullptr);
 ASSERT_TRUE(H);
 HoverInfo Expected;

[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Dave Green via Phabricator via cfe-commits 
dmgreen added inline comments.



Comment at: llvm/include/llvm/Support/ARMTargetParser.def:306
+ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ ARM::AEK_RAS)
 ARM_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,

RAS is already a part of ARMV8_2A. I think this should include ARM::AEK_FP16 | 
ARM::AEK_DOTPROD though, like the cortex-a78.



Comment at: llvm/lib/Target/AArch64/AArch64.td:700
+FeatureFMI,
+FeatureFPARMv8,
+FeatureFuseAES,

There are some missing here too from the above A78, like FeatureRCPC and 
FeatureSSBS (and DotProd)


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[PATCH] D93793: [IR] Let IRBuilder's CreateVectorSplat use poison as inselt's placeholder

2020-12-24 Thread Nuno Lopes via Phabricator via cfe-commits 
nlopes added inline comments.



Comment at: llvm/lib/IR/IRBuilder.cpp:1021
   Value *Zeros = ConstantAggregateZero::get(VectorType::get(I32Ty, EC));
   return CreateShuffleVector(V, Undef, Zeros, Name + ".splat");
 }

while at it, don't you want to change this one to poison as well?


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[PATCH] D92115: AMDGPU - Add diagnostic for compiling modules with AMD HSA OS type and GFX 6 arch

2020-12-24 Thread praveen velliengiri via Phabricator via cfe-commits 
pvellien abandoned this revision.
pvellien added a comment.

This change is wrong, the different patch is landed in llvm to handle global 
address space access in gfx60x for HSA Os. So closing it.


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[PATCH] D93022: [ARM][AArch64] Add Cortex-A78C Support for Clang and LLVM

2020-12-24 Thread Mark Murray via Phabricator via cfe-commits 
MarkMurrayARM updated this revision to Diff 313678.
MarkMurrayARM added a comment.

Incorporate reviewer comments. Rebase.


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Files:
  clang/test/Driver/aarch64-cpus.c
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMSubtarget.cpp
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -308,6 +308,12 @@
  ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
  ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ ARM::AEK_RAS | ARM::AEK_SEC | ARM::AEK_MP |
+ ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP |
+ ARM::AEK_CRC | ARM::AEK_RAS,
+ "8.2-A"),
 ARMCPUTestParams("cortex-a77", "armv8.2-a", "crypto-neon-fp-armv8",
  ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP |
  ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
@@ -385,7 +391,7 @@
  ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP,
  "7-S")), );
 
-static constexpr unsigned NumARMCPUArchs = 91;
+static constexpr unsigned NumARMCPUArchs = 92;
 
 TEST(TargetParserTest, testARMCPUArchList) {
   SmallVector List;
@@ -962,6 +968,12 @@
  AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
  AArch64::AEK_SSBS,
  "8.2-A"),
+ARMCPUTestParams("cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
+ AArch64::AEK_RAS | AArch64::AEK_CRC |
+ AArch64::AEK_CRYPTO | AArch64::AEK_FP |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS |
+ AArch64::AEK_LSE | AArch64::AEK_RDM,
+ "8.2-A"),
 ARMCPUTestParams(
 "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8",
 AArch64::AEK_RAS | AArch64::AEK_SVE | AArch64::AEK_SSBS |
@@ -1151,7 +1163,7 @@
  AArch64::AEK_LSE | AArch64::AEK_RDM,
  "8.2-A")), );
 
-static constexpr unsigned NumAArch64CPUArchs = 45;
+static constexpr unsigned NumAArch64CPUArchs = 46;
 
 TEST(TargetParserTest, testAArch64CPUArchList) {
   SmallVector List;
Index: llvm/lib/Target/ARM/ARMSubtarget.h
===
--- llvm/lib/Target/ARM/ARMSubtarget.h
+++ llvm/lib/Target/ARM/ARMSubtarget.h
@@ -63,6 +63,7 @@
 CortexA76,
 CortexA77,
 CortexA78,
+CortexA78C,
 CortexA8,
 CortexA9,
 CortexM3,
Index: llvm/lib/Target/ARM/ARMSubtarget.cpp
===
--- llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -294,6 +294,7 @@
   case CortexA76:
   case CortexA77:
   case CortexA78:
+  case CortexA78C:
   case CortexR4:
   case CortexR4F:
   case CortexR5:
Index: llvm/lib/Target/ARM/ARM.td
===
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -616,6 +616,8 @@
"Cortex-A77 ARM processors", []>;
 def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
"Cortex-A78 ARM processors", []>;
+def ProcA78C: SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
+   "Cortex-A78C ARM processors", []>;
 def ProcX1  : SubtargetFeature<"cortex-x1", "ARMProcFamily", "CortexX1",
"Cortex-X1 ARM processors", []>;
 
@@ -1308,6 +1310,13 @@
  FeatureFullFP16,
  FeatureDotProd]>;
 
+def : ProcNoItin<"cortex-a78c", [ARMv82a,
+ FeatureHWDivThumb,
+ FeatureHWDivARM,
+ FeatureCrypto,
+ FeatureCRC,
+

[PATCH] D93796: [clangd][fuzzyFind] Do not show stale symbols in the result.

2020-12-24 Thread Aleksandr Platonov via Phabricator via cfe-commits 
ArcsinX created this revision.
ArcsinX added a reviewer: sammccall.
Herald added subscribers: usaxena95, kadircet, arphaman.
ArcsinX requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay, ilya-biryukov.
Herald added a project: clang.

This is follow up to D93393 .
Without this patch `MergedIndex::fuzzyFind()` returns stale symbols from the 
static index even if these symbols were removed.


Repository:
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https://reviews.llvm.org/D93796

Files:
  clang-tools-extra/clangd/index/Merge.cpp
  clang-tools-extra/clangd/index/Merge.h
  clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
  clang-tools-extra/clangd/unittests/IndexTests.cpp

Index: clang-tools-extra/clangd/unittests/IndexTests.cpp
===
--- clang-tools-extra/clangd/unittests/IndexTests.cpp
+++ clang-tools-extra/clangd/unittests/IndexTests.cpp
@@ -335,6 +335,39 @@
   UnorderedElementsAre("ns::A", "ns::B", "ns::C"));
 }
 
+TEST(MergeIndexTest, FuzzyFindRemovedSymbol) {
+  FileIndex DynamicIndex, StaticIndex;
+  MergedIndex Merge(, );
+
+  const char *HeaderCode = "class Foo;";
+  auto HeaderSymbols = TestTU::withHeaderCode(HeaderCode).headerSymbols();
+  auto Foo = findSymbol(HeaderSymbols, "Foo");
+
+  // Build static index for test.cc with Foo symbol
+  TestTU Test;
+  Test.HeaderCode = HeaderCode;
+  Test.Code = "class Foo {};";
+  Test.Filename = "test.cc";
+  auto AST = Test.build();
+  StaticIndex.updateMain(testPath(Test.Filename), AST);
+
+  // Remove Foo symbol, i.e. build dynamic index for test.cc, which is empty.
+  Test.HeaderCode = "";
+  Test.Code = "";
+  AST = Test.build();
+  DynamicIndex.updateMain(testPath(Test.Filename), AST);
+
+  // Merged index should not return removed symbol.
+  FuzzyFindRequest Req;
+  Req.AnyScope = true;
+  Req.Query = "Foo";
+  unsigned SymbolCounter = 0;
+  bool IsIncomplete =
+  Merge.fuzzyFind(Req, [&](const Symbol &) { ++SymbolCounter; });
+  EXPECT_FALSE(IsIncomplete);
+  EXPECT_EQ(SymbolCounter, 0u);
+}
+
 TEST(MergeTest, Merge) {
   Symbol L, R;
   L.ID = R.ID = SymbolID("hello");
Index: clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
===
--- clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
+++ clang-tools-extra/clangd/unittests/FindSymbolsTests.cpp
@@ -52,7 +52,17 @@
   return *SymbolInfos;
 }
 
-TEST(WorkspaceSymbols, Macros) {
+// FIXME: We update two indexes during main file processing:
+//- preamble index (static)
+//- main-file index (dynamic)
+//The macro in this test appears to be in the preamble index and not
+//in the main-file index. According to our logic of indexes merging, we
+//do not take this macro from the static (preamble) index, because it
+//location within the file from the dynamic (main-file) index.
+//
+//Possible solution is to exclude main-file symbols from the preamble
+//index, after that we can enable this test again.
+TEST(WorkspaceSymbols, DISABLED_Macros) {
   TestTU TU;
   TU.Code = R"cpp(
#define MACRO X
Index: clang-tools-extra/clangd/index/Merge.h
===
--- clang-tools-extra/clangd/index/Merge.h
+++ clang-tools-extra/clangd/index/Merge.h
@@ -23,10 +23,6 @@
 //  - the Dynamic index covers few files, but is relatively up-to-date.
 //  - the Static index covers a bigger set of files, but is relatively stale.
 // The returned index attempts to combine results, and avoid duplicates.
-//
-// FIXME: We don't have a mechanism in Index to track deleted symbols and
-// refs in dirty files, so the merged index may return stale symbols
-// and refs from Static index.
 class MergedIndex : public SymbolIndex {
   const SymbolIndex *Dynamic, *Static;
 
Index: clang-tools-extra/clangd/index/Merge.cpp
===
--- clang-tools-extra/clangd/index/Merge.cpp
+++ clang-tools-extra/clangd/index/Merge.cpp
@@ -22,11 +22,6 @@
 namespace clang {
 namespace clangd {
 
-// FIXME: Deleted symbols in dirty files are still returned (from Static).
-//To identify these eliminate these, we should:
-//  - find the generating file from each Symbol which is Static-only
-//  - ask Dynamic if it has that file (needs new SymbolIndex method)
-//  - if so, drop the Symbol.
 bool MergedIndex::fuzzyFind(
 const FuzzyFindRequest ,
 llvm::function_ref Callback) const {
@@ -49,7 +44,13 @@
   SymbolSlab Dyn = std::move(DynB).build();
 
   llvm::DenseSet SeenDynamicSymbols;
+  auto DynamicContainsFile = Dynamic->indexedFiles();
   More |= Static->fuzzyFind(Req, [&](const Symbol ) {
+// We expect the definition to see the canonical declaration, so it seems
+// to be enough to check only the definition if it exists.
+if

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

2020-12-24 Thread LuoYuanke via Phabricator via cfe-commits 
LuoYuanke added a comment.

In D91927#2471140 , @pengfei wrote:

> LGTM. Thanks for the refactors. Maybe better to wait for a few days to see if 
> others have objections.

Thank Pengfei for the review. Sure, I'll wait for a few days.


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[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

2020-12-24 Thread Pengfei Wang via Phabricator via cfe-commits 
pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

LGTM. Thanks for the refactors. Maybe better to wait for a few days to see if 
others have objections.


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[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

2020-12-24 Thread LuoYuanke via Phabricator via cfe-commits 
LuoYuanke updated this revision to Diff 313669.
LuoYuanke added a comment.

Refine comments.


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Files:
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  llvm/include/llvm-c/Core.h
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/IR/DataLayout.h
  llvm/include/llvm/IR/Intrinsics.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/IntrinsicsX86.td
  llvm/include/llvm/IR/Type.h
  llvm/include/llvm/Support/MachineValueType.h
  llvm/lib/Analysis/ConstantFolding.cpp
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/CodeGen/ValueTypes.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/ConstantFold.cpp
  llvm/lib/IR/Core.cpp
  llvm/lib/IR/DataLayout.cpp
  llvm/lib/IR/Function.cpp
  llvm/lib/IR/LLVMContextImpl.cpp
  llvm/lib/IR/LLVMContextImpl.h
  llvm/lib/IR/Type.cpp
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86LowerAMXType.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll
  llvm/test/CodeGen/X86/AMX/amx-config.ll
  llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
  llvm/test/CodeGen/X86/AMX/amx-spill.ll
  llvm/test/CodeGen/X86/AMX/amx-type.ll
  llvm/utils/TableGen/CodeGenTarget.cpp
  llvm/utils/TableGen/IntrinsicEmitter.cpp

Index: llvm/utils/TableGen/IntrinsicEmitter.cpp
===
--- llvm/utils/TableGen/IntrinsicEmitter.cpp
+++ llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -248,7 +248,8 @@
   IIT_V128 = 47,
   IIT_BF16 = 48,
   IIT_STRUCT9 = 49,
-  IIT_V256 = 50
+  IIT_V256 = 50,
+  IIT_AMX  = 51
 };
 
 static void EncodeFixedValueType(MVT::SimpleValueType VT,
@@ -276,6 +277,7 @@
   case MVT::token: return Sig.push_back(IIT_TOKEN);
   case MVT::Metadata: return Sig.push_back(IIT_METADATA);
   case MVT::x86mmx: return Sig.push_back(IIT_MMX);
+  case MVT::x86amx: return Sig.push_back(IIT_AMX);
   // MVT::OtherVT is used to mean the empty struct type here.
   case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
   // MVT::isVoid is used to represent varargs here.
Index: llvm/utils/TableGen/CodeGenTarget.cpp
===
--- llvm/utils/TableGen/CodeGenTarget.cpp
+++ llvm/utils/TableGen/CodeGenTarget.cpp
@@ -76,6 +76,7 @@
   case MVT::f128: return "MVT::f128";
   case MVT::ppcf128:  return "MVT::ppcf128";
   case MVT::x86mmx:   return "MVT::x86mmx";
+  case MVT::x86amx:   return "MVT::x86amx";
   case MVT::Glue: return "MVT::Glue";
   case MVT::isVoid:   return "MVT::isVoid";
   case MVT::v1i1: return "MVT::v1i1";
Index: llvm/test/CodeGen/X86/AMX/amx-type.ll
===
--- llvm/test/CodeGen/X86/AMX/amx-type.ll
+++ llvm/test/CodeGen/X86/AMX/amx-type.ll
@@ -8,18 +8,104 @@
 @buf = dso_local global [1024 x i8] zeroinitializer, align 16
 @buf2 = dso_local global [1024 x i8] zeroinitializer, align 16
 
+; test bitcast x86_amx to <256 x i32>
+define dso_local void @test_user_empty(i16 %m, i16 %n, i8 *%buf, i64 %s) #2 {
+; CHECK-LABEL: @test_user_empty(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[T1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N:%.*]], i8* [[BUF:%.*]], i64 [[S:%.*]]) [[ATTR3:#.*]]
+; CHECK-NEXT:ret void
+;
+entry:
+  %t1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %m, i16 %n, i8* %buf, i64 %s) #3
+  %t2 = bitcast x86_amx %t1 to <256 x i32>
+  ret void
+}
+
+; test bitcast <256 x i32> to x86_amx
+define dso_local void @test_user_empty2(<256 x i32> %in) #2 {
+; CHECK-LABEL: @test_user_empty2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:ret void
+;
+entry:
+  %t = bitcast <256 x i32> %in to x86_amx
+  ret void
+}
+
+define dso_local <256 x i32> @test_amx_load_bitcast(<256 x i32>* %in, i16 %m, i16 %n, i8 *%buf, i64 %s) #2 {
+; CHECK-LABEL: @test_amx_load_bitcast(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[T1:%.*]] = load <256 x i32>, <256 x i32>* [[IN:%.*]], align 64
+; CHECK-NEXT:[[TMP0:%.*]] = bitcast <256 x i32>* [[IN]] to i8*
+; CHECK-NEXT:[[TMP1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N:%.*]], i8* [[TMP0]], i64 64)
+; CHECK-NEXT:call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], i8* [[BUF:%.*]], i64 [[S:%.*]], x86_amx [[TMP1]]) [[ATTR3]]
+; CHECK-NEXT:ret <256 x i32> [[T1]]
+;
+entry:
+  %t1 = load <256 x i32>, <256 x i32>* %in, align 64
+  %t2 = bitcast <256 x i32> %t1 to x86_amx
+  call void @llvm.x86.tilestored64.internal(i16 %m, i16 %n, i8* %buf, i64 %s, x86_amx %t2) #3
+  ret <256 x i32> %t1
+}
+
+define dso_local <256 x i32> @test_amx_bitcast_store(<256 x i32>* %out, i16 %m, i16 %n, i8 *%buf, i64

[PATCH] D93763: [clangd] Add a flag to disable the documentLinks LSP request

2020-12-24 Thread Giulio Girardi via Phabricator via cfe-commits 
rapgenic updated this revision to Diff 313667.
rapgenic added a comment.

Fix formatting


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Files:
  clang-tools-extra/clangd/ClangdLSPServer.cpp
  clang-tools-extra/clangd/ClangdLSPServer.h
  clang-tools-extra/clangd/test/xrefs.test
  clang-tools-extra/clangd/tool/ClangdMain.cpp

Index: clang-tools-extra/clangd/tool/ClangdMain.cpp
===
--- clang-tools-extra/clangd/tool/ClangdMain.cpp
+++ clang-tools-extra/clangd/tool/ClangdMain.cpp
@@ -339,6 +339,15 @@
 Hidden,
 };
 
+opt IncludesAsLinks{
+"includes-as-links",
+cat(Features),
+desc("Provide a document link to the files included with #include "
+ "directive. If set to false, include files can still be opened with "
+ "go to definition feature"),
+init(true),
+};
+
 opt WorkerThreadsCount{
 "j",
 cat(Misc),
@@ -825,6 +834,7 @@
   Opts.PreserveRecoveryASTType = RecoveryASTType;
   Opts.FoldingRanges = FoldingRanges;
   Opts.MemoryCleanup = getMemoryCleanupFunction();
+  Opts.IncludesAsLinks = IncludesAsLinks;
 
   Opts.CodeComplete.IncludeIneligibleResults = IncludeIneligibleResults;
   Opts.CodeComplete.Limit = LimitResults;
Index: clang-tools-extra/clangd/test/xrefs.test
===
--- clang-tools-extra/clangd/test/xrefs.test
+++ clang-tools-extra/clangd/test/xrefs.test
@@ -1,9 +1,9 @@
 # RUN: clangd -lit-test < %s | FileCheck -strict-whitespace %s
 {"jsonrpc":"2.0","id":0,"method":"initialize","params":{"processId":123,"rootPath":"clangd","capabilities":{},"trace":"off"}}
 ---
-{"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"test:///main.cpp","languageId":"cpp","version":1,"text":"extern int x;\nint x = 0;\nint y = x;"}}}
+{"jsonrpc":"2.0","method":"textDocument/didOpen","params":{"textDocument":{"uri":"test:///main.cpp","languageId":"cpp","version":1,"text":"#include \nextern int x;\nint x = 0;\nint y = x;"}}}
 ---
-{"jsonrpc":"2.0","id":1,"method":"textDocument/definition","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":2,"character":8}}}
+{"jsonrpc":"2.0","id":1,"method":"textDocument/definition","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":3,"character":8}}}
 #  CHECK:  "id": 1,
 # CHECK-NEXT:  "jsonrpc": "2.0",
 # CHECK-NEXT:  "result": [
@@ -11,11 +11,11 @@
 # CHECK-NEXT:  "range": {
 # CHECK-NEXT:"end": {
 # CHECK-NEXT:  "character": 5,
-# CHECK-NEXT:  "line": 1
+# CHECK-NEXT:  "line": 2
 # CHECK-NEXT:},
 # CHECK-NEXT:"start": {
 # CHECK-NEXT:  "character": 4,
-# CHECK-NEXT:  "line": 1
+# CHECK-NEXT:  "line": 2
 # CHECK-NEXT:}
 # CHECK-NEXT:  },
 # CHECK-NEXT:  "uri": "file://{{.*}}/{{([A-Z]:/)?}}main.cpp"
@@ -23,7 +23,7 @@
 # CHECK-NEXT:  ]
 ---
 # Toggle: we're on the definition, so jump to the declaration.
-{"jsonrpc":"2.0","id":1,"method":"textDocument/definition","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":1,"character":4}}}
+{"jsonrpc":"2.0","id":1,"method":"textDocument/definition","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":2,"character":4}}}
 #  CHECK:  "id": 1,
 # CHECK-NEXT:  "jsonrpc": "2.0",
 # CHECK-NEXT:  "result": [
@@ -31,18 +31,18 @@
 # CHECK-NEXT:  "range": {
 # CHECK-NEXT:"end": {
 # CHECK-NEXT:  "character": 12,
-# CHECK-NEXT:  "line": 0
+# CHECK-NEXT:  "line": 1
 # CHECK-NEXT:},
 # CHECK-NEXT:"start": {
 # CHECK-NEXT:  "character": 11,
-# CHECK-NEXT:  "line": 0
+# CHECK-NEXT:  "line": 1
 # CHECK-NEXT:}
 # CHECK-NEXT:  },
 # CHECK-NEXT:  "uri": "file://{{.*}}/{{([A-Z]:/)?}}main.cpp"
 # CHECK-NEXT:}
 # CHECK-NEXT:  ]
 ---
-{"jsonrpc":"2.0","id":1,"method":"textDocument/documentHighlight","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":2,"character":8}}}
+{"jsonrpc":"2.0","id":1,"method":"textDocument/documentHighlight","params":{"textDocument":{"uri":"test:///main.cpp"},"position":{"line":3,"character":8}}}
 #  CHECK: "id": 1
 # CHECK-NEXT: "jsonrpc": "2.0",
 # CHECK-NEXT: "result": [
@@ -51,11 +51,11 @@
 # CHECK-NEXT: "range": {
 # CHECK-NEXT:   "end": {
 # CHECK-NEXT: "character": 12,
-# CHECK-NEXT: "line": 0
+# CHECK-NEXT: "line": 1
 # CHECK-NEXT:   },
 # CHECK-NEXT:   "start": {
 # CHECK-NEXT: "character": 11,
-# CHECK-NEXT: "line": 0
+# CHECK-NEXT: "line": 1
 # CHECK-NEXT:   }
 # CHECK-NEXT: }
 # CHECK-NEXT:   },
@@ -64,11 +64,11 @@
 # CHECK-NEXT: "range": {
 # CHECK-NEXT:   "end": {
 # CHECK-NEXT: "character": 5,
-# CHECK-NEXT: "line": 1
+# CHECK-NEXT: "line": 2
 # CHECK-NEXT:   },
 # CHECK-NEXT:

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

2020-12-24 Thread LuoYuanke via Phabricator via cfe-commits 
LuoYuanke updated this revision to Diff 313663.
LuoYuanke added a comment.

Address Pengfei's comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D91927/new/

https://reviews.llvm.org/D91927

Files:
  clang/test/CodeGen/X86/amx_api.c
  llvm/include/llvm-c/Core.h
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/IR/DataLayout.h
  llvm/include/llvm/IR/Intrinsics.h
  llvm/include/llvm/IR/Intrinsics.td
  llvm/include/llvm/IR/IntrinsicsX86.td
  llvm/include/llvm/IR/Type.h
  llvm/include/llvm/Support/MachineValueType.h
  llvm/lib/Analysis/ConstantFolding.cpp
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/CodeGen/ValueTypes.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/ConstantFold.cpp
  llvm/lib/IR/Core.cpp
  llvm/lib/IR/DataLayout.cpp
  llvm/lib/IR/Function.cpp
  llvm/lib/IR/LLVMContextImpl.cpp
  llvm/lib/IR/LLVMContextImpl.h
  llvm/lib/IR/Type.cpp
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86LowerAMXType.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
  llvm/test/CodeGen/X86/AMX/amx-across-func.ll
  llvm/test/CodeGen/X86/AMX/amx-config.ll
  llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
  llvm/test/CodeGen/X86/AMX/amx-spill.ll
  llvm/test/CodeGen/X86/AMX/amx-type.ll
  llvm/utils/TableGen/CodeGenTarget.cpp
  llvm/utils/TableGen/IntrinsicEmitter.cpp

Index: llvm/utils/TableGen/IntrinsicEmitter.cpp
===
--- llvm/utils/TableGen/IntrinsicEmitter.cpp
+++ llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -248,7 +248,8 @@
   IIT_V128 = 47,
   IIT_BF16 = 48,
   IIT_STRUCT9 = 49,
-  IIT_V256 = 50
+  IIT_V256 = 50,
+  IIT_AMX  = 51
 };
 
 static void EncodeFixedValueType(MVT::SimpleValueType VT,
@@ -276,6 +277,7 @@
   case MVT::token: return Sig.push_back(IIT_TOKEN);
   case MVT::Metadata: return Sig.push_back(IIT_METADATA);
   case MVT::x86mmx: return Sig.push_back(IIT_MMX);
+  case MVT::x86amx: return Sig.push_back(IIT_AMX);
   // MVT::OtherVT is used to mean the empty struct type here.
   case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
   // MVT::isVoid is used to represent varargs here.
Index: llvm/utils/TableGen/CodeGenTarget.cpp
===
--- llvm/utils/TableGen/CodeGenTarget.cpp
+++ llvm/utils/TableGen/CodeGenTarget.cpp
@@ -76,6 +76,7 @@
   case MVT::f128: return "MVT::f128";
   case MVT::ppcf128:  return "MVT::ppcf128";
   case MVT::x86mmx:   return "MVT::x86mmx";
+  case MVT::x86amx:   return "MVT::x86amx";
   case MVT::Glue: return "MVT::Glue";
   case MVT::isVoid:   return "MVT::isVoid";
   case MVT::v1i1: return "MVT::v1i1";
Index: llvm/test/CodeGen/X86/AMX/amx-type.ll
===
--- llvm/test/CodeGen/X86/AMX/amx-type.ll
+++ llvm/test/CodeGen/X86/AMX/amx-type.ll
@@ -8,18 +8,104 @@
 @buf = dso_local global [1024 x i8] zeroinitializer, align 16
 @buf2 = dso_local global [1024 x i8] zeroinitializer, align 16
 
+; test bitcast x86_amx to <256 x i32>
+define dso_local void @test_user_empty(i16 %m, i16 %n, i8 *%buf, i64 %s) #2 {
+; CHECK-LABEL: @test_user_empty(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[T1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N:%.*]], i8* [[BUF:%.*]], i64 [[S:%.*]]) [[ATTR3:#.*]]
+; CHECK-NEXT:ret void
+;
+entry:
+  %t1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 %m, i16 %n, i8* %buf, i64 %s) #3
+  %t2 = bitcast x86_amx %t1 to <256 x i32>
+  ret void
+}
+
+; test bitcast <256 x i32> to x86_amx
+define dso_local void @test_user_empty2(<256 x i32> %in) #2 {
+; CHECK-LABEL: @test_user_empty2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:ret void
+;
+entry:
+  %t = bitcast <256 x i32> %in to x86_amx
+  ret void
+}
+
+define dso_local <256 x i32> @test_amx_load_bitcast(<256 x i32>* %in, i16 %m, i16 %n, i8 *%buf, i64 %s) #2 {
+; CHECK-LABEL: @test_amx_load_bitcast(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[T1:%.*]] = load <256 x i32>, <256 x i32>* [[IN:%.*]], align 64
+; CHECK-NEXT:[[TMP0:%.*]] = bitcast <256 x i32>* [[IN]] to i8*
+; CHECK-NEXT:[[TMP1:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[M:%.*]], i16 [[N:%.*]], i8* [[TMP0]], i64 64)
+; CHECK-NEXT:call void @llvm.x86.tilestored64.internal(i16 [[M]], i16 [[N]], i8* [[BUF:%.*]], i64 [[S:%.*]], x86_amx [[TMP1]]) [[ATTR3]]
+; CHECK-NEXT:ret <256 x i32> [[T1]]
+;
+entry:
+  %t1 = load <256 x i32>, <256 x i32>* %in, align 64
+  %t2 = bitcast <256 x i32> %t1 to x86_amx
+  call void @llvm.x86.tilestored64.internal(i16 %m, i16 %n, i8* %buf, i64 %s, x86_amx %t2) #3
+  ret <256 x i32> %t1
+}
+
+define dso_local <256 x i32> @test_amx_bitcast_store(<256 x i32>* %out, i16 %m, i16 %n, i8

[PATCH] D92039: [-Wcalled-once-parameter] Introduce 'called_once' attribute

2020-12-24 Thread Artem Dergachev via Phabricator via cfe-commits 
NoQ accepted this revision.
NoQ added a comment.
This revision is now accepted and ready to land.

Amazing, thank you. I'm happy with the analysis and i have nothing more to say 
really :)




Comment at: clang/lib/Analysis/CalledOnceCheck.cpp:822
+  /// calling the parameter itself, but rather uses it as the argument.
+  template 
+  void checkIndirectCall(const CallLikeExpr *CallOrMessage) {

vsavchenko wrote:
> NoQ wrote:
> > Did you consider `AnyCall`? That's a universal wrapper for all kinds of AST 
> > calls for exactly these cases. It's not super compile-time but it adds a 
> > lot of convenience. (Also uh-oh, its doxygen page seems to be broken). It's 
> > ok if you find it unsuitable but i kind of still want to popularize it.
> It doesn't seem to have iteration over arguments.
If you see some actual benefits and that's the only thing that's holding you 
back, you should add it. Or is it hard to add for whatever reason?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92039/new/

https://reviews.llvm.org/D92039

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