from:"Archibald Elliott via cfe\-commits"

[clang] cb7fb73 - [AArch64] Assembly Support for FEAT_GCS/FEAT_CHK

2023-03-15 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-03-15T11:03:53Z
New Revision: cb7fb737858cdfdc90406f9675c8470ea98417ed

URL: 
https://github.com/llvm/llvm-project/commit/cb7fb737858cdfdc90406f9675c8470ea98417ed
DIFF: 
https://github.com/llvm/llvm-project/commit/cb7fb737858cdfdc90406f9675c8470ea98417ed.diff

LOG: [AArch64] Assembly Support for FEAT_GCS/FEAT_CHK

This implements support for two new 2022 A-profile extensions:
- FEAT_CHK - Check Feature Status Extension
- FEAT_GCS - Guarded Control Stacks

FEAT_CHK is mandatory from armv8.0-a, but is in the hint space so
there's no clang command-line flag for it, and we only print the hint as
`chkfeat x16` at v8.9a and above, to be compatible when using a
non-integrated assembler that might not yet know about the extension.

FEAT_GCS is optional from armv9.4-a onwards. It is enabled using `+gcs`
in a clang `-march=` or `-mcpu=` option string, or using a
`.arch_extension gcs` assembly directive.

This patch includes changes by Ties Stuij, Tomas Matheson, and Keith
Walker.

Differential Revision: https://reviews.llvm.org/D145563

Added: 
llvm/test/MC/AArch64/armv9.4a-chk.s
llvm/test/MC/AArch64/armv9.4a-gcs.s
llvm/test/MC/Disassembler/AArch64/armv9.4a-chk.txt
llvm/test/MC/Disassembler/AArch64/armv9.4a-gcs.txt

Modified: 
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SystemOperands.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/directive-arch_extension-negative.s
llvm/test/MC/AArch64/directive-arch_extension.s
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index b274dd2672268..1711e16b46cdc 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -927,6 +927,8 @@ bool 
AArch64TargetInfo::handleTargetFeatures(std::vector ,
   HasMOPS = true;
 if (Feature == "+d128")
   HasD128 = true;
+if (Feature == "+gcs")
+  HasGCS = true;
   }
 
   // Check features that are manually disabled by command line options.

diff  --git a/clang/lib/Basic/Targets/AArch64.h 
b/clang/lib/Basic/Targets/AArch64.h
index f6e12176a77ec..c973efc21bde2 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -81,6 +81,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public 
TargetInfo {
   bool HasNoNeon = false;
   bool HasNoSVE = false;
   bool HasFMV = true;
+  bool HasGCS = false;
 
   const llvm::AArch64::ArchInfo *ArchInfo = ::AArch64::ARMV8A;
 

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 133d10c11e57b..9cba6b4b19599 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -153,6 +153,7 @@ enum ArchExtKind : uint64_t {
   AEK_SPECRES2 =1ULL << 53, // FEAT_SPECRES2
   AEK_RASv2 =   1ULL << 54, // FEAT_RASv2
   AEK_ITE = 1ULL << 55, // FEAT_ITE
+  AEK_GCS = 1ULL << 56, // FEAT_GCS
 };
 // clang-format on
 
@@ -256,6 +257,7 @@ inline constexpr ExtensionInfo Extensions[] = {
 {"the", AArch64::AEK_THE, "+the", "-the", FEAT_MAX, "", 0},
 {"tme", AArch64::AEK_TME, "+tme", "-tme", FEAT_MAX, "", 0},
 {"wfxt", AArch64::AEK_NONE, {}, {}, FEAT_WFXT, "+wfxt", 550},
+{"gcs", AArch64::AEK_GCS, "+gcs", "-gcs", FEAT_MAX, "", 0},
 // Special cases
 {"none", AArch64::AEK_NONE, {}, {}, FEAT_MAX, "", 
ExtensionInfo::MaxFMVPriority},
 };

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index e113a21d74b93..67b5cf10b14dd 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -522,6 +522,12 @@ def FeatureNoBTIAtReturnTwice : 
SubtargetFeature<"no-bti-at-return-twice",
  "Don't place a BTI 
instruction "
  "after a return-twice">;
 
+def FeatureCHK : SubtargetFeature<"chk", "HasCHK",
+"true", "Enable Armv8.0-A Check Feature Status Extension (FEAT_CHK)">;
+
+def FeatureGCS : SubtargetFeature<"gcs", "HasGCS",
+"true", "Enable Armv9.4-A Guarded Call Stack Extension", [FeatureCHK]>;
+
 def FeatureCLRBHB : SubtargetFeature<"clrbhb", "HasCLRBHB",
 "true", "Enable Clear BHB instruction (FEAT_CLRBHB)">;
 
@@ -603,7 +609,7 @@ def HasV8_8aOps : SubtargetFeature<
 def HasV8_9aOps : SubtargetFeature<
   "v8.9a", "HasV8_9aOps", "true", "Support ARM v8.9a instructions",
   [HasV8_8aOps, FeatureCLRBHB, FeaturePRFM_SLC, FeatureSPECRES2,
-   FeatureCSSC, FeatureRASv2]>;
+   FeatureCSSC, FeatureRASv2,

[clang] 4679d7a - [NFC][ARM][AArch64] Cleanup TargetParser includes

2023-03-03 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-03-03T16:24:55Z
New Revision: 4679d7a26a5f42f1128fac6fdf49488d13066c52

URL: 
https://github.com/llvm/llvm-project/commit/4679d7a26a5f42f1128fac6fdf49488d13066c52
DIFF: 
https://github.com/llvm/llvm-project/commit/4679d7a26a5f42f1128fac6fdf49488d13066c52.diff

LOG: [NFC][ARM][AArch64] Cleanup TargetParser includes

llvm/TargetParser/TargetParser.h now only includes AMDGPU-specific
functionality, the ARM- and AArch64-specific functionality is in other
headers.

Added: 


Modified: 
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Arch/ARM.h
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMSubtarget.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 519da92b09417..0b2ee72f7868e 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -14,7 +14,6 @@
 #include "llvm/Option/ArgList.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
 #include "llvm/TargetParser/Host.h"
-#include "llvm/TargetParser/TargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 0967ffe047579..e75f8a474410c 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -14,7 +14,6 @@
 #include "llvm/Option/ArgList.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
 #include "llvm/TargetParser/Host.h"
-#include "llvm/TargetParser/TargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.h 
b/clang/lib/Driver/ToolChains/Arch/ARM.h
index ef56c8b065df7..18a358c55c1b4 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.h
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.h
@@ -13,7 +13,6 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Option/Option.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
-#include "llvm/TargetParser/TargetParser.h"
 #include "llvm/TargetParser/Triple.h"
 #include 
 #include 

diff  --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp 
b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
index 6241b145f9b50..843c3b78f8758 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -25,7 +25,6 @@
 #include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/IR/GlobalValue.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
-#include "llvm/TargetParser/TargetParser.h"
 
 using namespace llvm;
 

diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 
b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 8393fb1aa9aba..4f2833c1c4230 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -50,7 +50,6 @@
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
-#include "llvm/TargetParser/TargetParser.h"
 #include 
 #include 
 #include 

diff  --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp 
b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index 7cd7ee7543a0e..5ed8f900fb88f 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -46,7 +46,6 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
-#include "llvm/TargetParser/TargetParser.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "asm-printer"

diff  --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp 
b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 9cc9056f408b7..53c03a6b28d7e 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -36,7 +36,6 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
-#include "llvm/TargetParser/TargetParser.h"
 #include "llvm/TargetParser/Triple.h"
 
 using namespace llvm;

diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp 
b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index d694385098583..bf419511b 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -35,7 +35,6 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
 #include "llvm/Support/raw_ostream.h"
-#include

[clang-tools-extra] d768bf9 - [NFC][TargetParser] Replace uses of llvm/Support/Host.h

2023-02-10 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-10T09:59:46Z
New Revision: d768bf994f508d7eaf9541a568be3d71096febf5

URL: 
https://github.com/llvm/llvm-project/commit/d768bf994f508d7eaf9541a568be3d71096febf5
DIFF: 
https://github.com/llvm/llvm-project/commit/d768bf994f508d7eaf9541a568be3d71096febf5.diff

LOG: [NFC][TargetParser] Replace uses of llvm/Support/Host.h

The forwarding header is left in place because of its use in
`polly/lib/External/isl/interface/extract_interface.cc`, but I have
added a GCC warning about the fact it is deprecated, because it is used
in `isl` from where it is included by Polly.

Added: 


Modified: 
clang-tools-extra/clangd/Feature.cpp
clang-tools-extra/modularize/CoverageChecker.h
clang/lib/Driver/Distro.cpp
clang/lib/Driver/Driver.cpp
clang/lib/Driver/OffloadBundler.cpp
clang/lib/Driver/ToolChains/AMDGPU.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Arch/CSKY.cpp
clang/lib/Driver/ToolChains/Arch/M68k.cpp
clang/lib/Driver/ToolChains/Arch/PPC.cpp
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/lib/Driver/ToolChains/Arch/Sparc.cpp
clang/lib/Driver/ToolChains/Arch/SystemZ.cpp
clang/lib/Driver/ToolChains/Arch/X86.cpp
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Driver/ToolChains/CommonArgs.cpp
clang/lib/Driver/ToolChains/Cuda.cpp
clang/lib/Driver/ToolChains/MSVC.cpp
clang/lib/Frontend/CompilerInstance.cpp
clang/lib/Frontend/CompilerInvocation.cpp
clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
clang/lib/Interpreter/Interpreter.cpp
clang/lib/Tooling/CompilationDatabase.cpp
clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp
clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp
clang/lib/Tooling/JSONCompilationDatabase.cpp
clang/lib/Tooling/Tooling.cpp
clang/tools/clang-import-test/clang-import-test.cpp
clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
clang/tools/clang-scan-deps/ClangScanDeps.cpp
clang/tools/driver/cc1as_main.cpp
clang/tools/driver/cc1gen_reproducer_main.cpp
clang/tools/driver/driver.cpp
clang/unittests/AST/StructuralEquivalenceTest.cpp
clang/unittests/ASTMatchers/ASTMatchersInternalTest.cpp
clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
clang/unittests/CodeGen/BufferSourceTest.cpp
clang/unittests/CodeGen/CodeGenExternalTest.cpp
clang/unittests/CodeGen/TestCompiler.h
clang/unittests/Driver/DistroTest.cpp
clang/unittests/Driver/SanitizerArgsTest.cpp
clang/unittests/Frontend/CompilerInvocationTest.cpp
clang/unittests/Interpreter/IncrementalProcessingTest.cpp
clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
clang/unittests/Tooling/ToolingTest.cpp
flang/lib/Frontend/CompilerInvocation.cpp
flang/lib/Optimizer/Support/FIRContext.cpp
flang/tools/bbc/bbc.cpp
flang/tools/flang-driver/driver.cpp
flang/unittests/Frontend/FrontendActionTest.cpp
flang/unittests/Optimizer/FIRContextTest.cpp
libc/benchmarks/LibcBenchmark.cpp
lld/ELF/DriverUtils.cpp
lld/MachO/Driver.cpp
lld/MinGW/Driver.cpp
lld/tools/lld/lld.cpp
lld/wasm/Driver.cpp
lldb/source/Host/common/HostInfoBase.cpp
lldb/source/Host/freebsd/Host.cpp
lldb/source/Host/macosx/objcxx/Host.mm
lldb/source/Host/netbsd/HostNetBSD.cpp
lldb/source/Host/openbsd/Host.cpp
lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
lldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
lldb/unittests/Host/HostInfoTest.cpp
lldb/utils/lit-cpuid/lit-cpuid.cpp
llvm/examples/Kaleidoscope/Chapter8/toy.cpp
llvm/examples/Kaleidoscope/Chapter9/toy.cpp
llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
llvm/include/llvm/ObjectYAML/DWARFEmitter.h
llvm/include/llvm/ProfileData/InstrProf.h
llvm/include/llvm/Support/Host.h
llvm/lib/CodeGen/CommandFlags.cpp
llvm/lib/ExecutionEngine/ExecutionEngine.cpp
llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
llvm/lib/ExecutionEngine/TargetSelect.cpp
llvm/lib/LTO/LTOCodeGenerator.cpp
llvm/lib/LTO/LTOModule.cpp
llvm/lib/MC/ELFObjectWriter.cpp
llvm/lib/Object/Archive.cpp
llvm/lib/Object/MachOObjectFile.cpp
llvm/lib/ObjectYAML/DWARFEmitter.cpp
llvm/lib/ObjectYAML/MachOYAML.cpp

[clang] d768bf9 - [NFC][TargetParser] Replace uses of llvm/Support/Host.h

2023-02-10 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-10T09:59:46Z
New Revision: d768bf994f508d7eaf9541a568be3d71096febf5

URL: 
https://github.com/llvm/llvm-project/commit/d768bf994f508d7eaf9541a568be3d71096febf5
DIFF: 
https://github.com/llvm/llvm-project/commit/d768bf994f508d7eaf9541a568be3d71096febf5.diff

LOG: [NFC][TargetParser] Replace uses of llvm/Support/Host.h

The forwarding header is left in place because of its use in
`polly/lib/External/isl/interface/extract_interface.cc`, but I have
added a GCC warning about the fact it is deprecated, because it is used
in `isl` from where it is included by Polly.

Added: 


Modified: 
clang-tools-extra/clangd/Feature.cpp
clang-tools-extra/modularize/CoverageChecker.h
clang/lib/Driver/Distro.cpp
clang/lib/Driver/Driver.cpp
clang/lib/Driver/OffloadBundler.cpp
clang/lib/Driver/ToolChains/AMDGPU.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Arch/CSKY.cpp
clang/lib/Driver/ToolChains/Arch/M68k.cpp
clang/lib/Driver/ToolChains/Arch/PPC.cpp
clang/lib/Driver/ToolChains/Arch/RISCV.cpp
clang/lib/Driver/ToolChains/Arch/Sparc.cpp
clang/lib/Driver/ToolChains/Arch/SystemZ.cpp
clang/lib/Driver/ToolChains/Arch/X86.cpp
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Driver/ToolChains/CommonArgs.cpp
clang/lib/Driver/ToolChains/Cuda.cpp
clang/lib/Driver/ToolChains/MSVC.cpp
clang/lib/Frontend/CompilerInstance.cpp
clang/lib/Frontend/CompilerInvocation.cpp
clang/lib/Frontend/CreateInvocationFromCommandLine.cpp
clang/lib/Interpreter/Interpreter.cpp
clang/lib/Tooling/CompilationDatabase.cpp
clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
clang/lib/Tooling/DumpTool/ClangSrcLocDump.cpp
clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp
clang/lib/Tooling/JSONCompilationDatabase.cpp
clang/lib/Tooling/Tooling.cpp
clang/tools/clang-import-test/clang-import-test.cpp
clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
clang/tools/clang-scan-deps/ClangScanDeps.cpp
clang/tools/driver/cc1as_main.cpp
clang/tools/driver/cc1gen_reproducer_main.cpp
clang/tools/driver/driver.cpp
clang/unittests/AST/StructuralEquivalenceTest.cpp
clang/unittests/ASTMatchers/ASTMatchersInternalTest.cpp
clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
clang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
clang/unittests/CodeGen/BufferSourceTest.cpp
clang/unittests/CodeGen/CodeGenExternalTest.cpp
clang/unittests/CodeGen/TestCompiler.h
clang/unittests/Driver/DistroTest.cpp
clang/unittests/Driver/SanitizerArgsTest.cpp
clang/unittests/Frontend/CompilerInvocationTest.cpp
clang/unittests/Interpreter/IncrementalProcessingTest.cpp
clang/unittests/Tooling/RecursiveASTVisitorTests/LambdaExpr.cpp
clang/unittests/Tooling/ToolingTest.cpp
flang/lib/Frontend/CompilerInvocation.cpp
flang/lib/Optimizer/Support/FIRContext.cpp
flang/tools/bbc/bbc.cpp
flang/tools/flang-driver/driver.cpp
flang/unittests/Frontend/FrontendActionTest.cpp
flang/unittests/Optimizer/FIRContextTest.cpp
libc/benchmarks/LibcBenchmark.cpp
lld/ELF/DriverUtils.cpp
lld/MachO/Driver.cpp
lld/MinGW/Driver.cpp
lld/tools/lld/lld.cpp
lld/wasm/Driver.cpp
lldb/source/Host/common/HostInfoBase.cpp
lldb/source/Host/freebsd/Host.cpp
lldb/source/Host/macosx/objcxx/Host.mm
lldb/source/Host/netbsd/HostNetBSD.cpp
lldb/source/Host/openbsd/Host.cpp
lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
lldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
lldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
lldb/unittests/Host/HostInfoTest.cpp
lldb/utils/lit-cpuid/lit-cpuid.cpp
llvm/examples/Kaleidoscope/Chapter8/toy.cpp
llvm/examples/Kaleidoscope/Chapter9/toy.cpp
llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
llvm/include/llvm/ObjectYAML/DWARFEmitter.h
llvm/include/llvm/ProfileData/InstrProf.h
llvm/include/llvm/Support/Host.h
llvm/lib/CodeGen/CommandFlags.cpp
llvm/lib/ExecutionEngine/ExecutionEngine.cpp
llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
llvm/lib/ExecutionEngine/TargetSelect.cpp
llvm/lib/LTO/LTOCodeGenerator.cpp
llvm/lib/LTO/LTOModule.cpp
llvm/lib/MC/ELFObjectWriter.cpp
llvm/lib/Object/Archive.cpp
llvm/lib/Object/MachOObjectFile.cpp
llvm/lib/ObjectYAML/DWARFEmitter.cpp
llvm/lib/ObjectYAML/MachOYAML.cpp

[clang] 8e3d7cf - [NFC][TargetParser] Remove llvm/Support/TargetParser.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:08:21Z
New Revision: 8e3d7cf5dee8d80dce1004a66c8a375b9d3b5dca

URL: 
https://github.com/llvm/llvm-project/commit/8e3d7cf5dee8d80dce1004a66c8a375b9d3b5dca
DIFF: 
https://github.com/llvm/llvm-project/commit/8e3d7cf5dee8d80dce1004a66c8a375b9d3b5dca.diff

LOG: [NFC][TargetParser] Remove llvm/Support/TargetParser.h

Added: 


Modified: 
clang/lib/Basic/TargetID.cpp
clang/lib/Basic/TargetInfo.cpp
clang/lib/Basic/Targets/AMDGPU.h
clang/lib/Basic/Targets/LoongArch.cpp
clang/lib/Basic/Targets/M68k.cpp
clang/lib/Driver/SanitizerArgs.cpp
clang/lib/Driver/ToolChain.cpp
clang/lib/Driver/ToolChains/AMDGPU.h
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Arch/ARM.h
clang/lib/Driver/ToolChains/Arch/CSKY.cpp
clang/lib/Driver/ToolChains/CommonArgs.cpp
clang/lib/Driver/ToolChains/Cuda.cpp
clang/lib/Driver/ToolChains/Darwin.cpp
clang/lib/Driver/ToolChains/Gnu.cpp
clang/lib/Driver/ToolChains/HIPAMD.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMSubtarget.cpp
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp

Removed: 
llvm/include/llvm/Support/TargetParser.h



diff  --git a/clang/lib/Basic/TargetID.cpp b/clang/lib/Basic/TargetID.cpp
index 7cc4d67e3a52..a0cc9a2e2664 100644
--- a/clang/lib/Basic/TargetID.cpp
+++ b/clang/lib/Basic/TargetID.cpp
@@ -9,8 +9,8 @@
 #include "clang/Basic/TargetID.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TargetParser.h"
 #include 
 #include 
 

diff  --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 8ee43261fc1d..70a15eb68f4e 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -19,7 +19,7 @@
 #include "llvm/ADT/APFloat.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/TargetParser.h"
 #include 
 using namespace clang;
 

diff  --git a/clang/lib/Basic/Targets/AMDGPU.h 
b/clang/lib/Basic/Targets/AMDGPU.h
index 576bcf9d5401..5a41188b39ee 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -19,7 +19,7 @@
 #include "llvm/ADT/StringSet.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/TargetParser.h"
 #include 
 
 namespace clang {

diff  --git a/clang/lib/Basic/Targets/LoongArch.cpp 
b/clang/lib/Basic/Targets/LoongArch.cpp
index 2079c89e3e15..513da77ba08a 100644
--- a/clang/lib/Basic/Targets/LoongArch.cpp
+++ b/clang/lib/Basic/Targets/LoongArch.cpp
@@ -14,8 +14,8 @@
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/TargetParser.h"
 
 using namespace clang;
 using namespace clang::targets;

diff  --git a/clang/lib/Basic/Targets/M68k.cpp 
b/clang/lib/Basic/Targets/M68k.cpp
index 6c2d77444f13..cbc7c7983779 100644
--- a/clang/lib/Basic/Targets/M68k.cpp
+++ b/clang/lib/Basic/Targets/M68k.cpp
@@ -17,7 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/TargetParser.h"
 #include 
 #include 
 #include 

diff  --git a/clang/lib/Driver/SanitizerArgs.cpp 
b/clang/lib/Driver/SanitizerArgs.cpp
index 49ae5cc6d88c..4f74093d7d24 100644
--- a/clang/lib/Driver/SanitizerArgs.cpp
+++ b/clang/lib/Driver/SanitizerArgs.cpp
@@ -16,10 +16,10 @@
 #include

[clang] b590f99 - [NFC][TargetParser] Remove llvm/Support/X86TargetParser.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:06:00Z
New Revision: b590f997127fd565c93676bd5187d9fa5ec80389

URL: 
https://github.com/llvm/llvm-project/commit/b590f997127fd565c93676bd5187d9fa5ec80389
DIFF: 
https://github.com/llvm/llvm-project/commit/b590f997127fd565c93676bd5187d9fa5ec80389.diff

LOG: [NFC][TargetParser] Remove llvm/Support/X86TargetParser.h

Added: 


Modified: 
clang/lib/Basic/Targets/X86.cpp
clang/lib/Basic/Targets/X86.h
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/CodeGenModule.cpp

Removed: 
llvm/include/llvm/Support/X86TargetParser.h



diff  --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 490e20ce4514..ee854f1cfdcd 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -17,7 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/X86TargetParser.h"
+#include "llvm/TargetParser/X86TargetParser.h"
 #include 
 
 namespace clang {

diff  --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index 5fcc97e95c2b..c17a03571b10 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -19,7 +19,7 @@
 #include "clang/Basic/TargetOptions.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
-#include "llvm/Support/X86TargetParser.h"
+#include "llvm/TargetParser/X86TargetParser.h"
 #include 
 
 namespace clang {

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index ba592b42391d..53dde119abce 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -54,8 +54,8 @@
 #include "llvm/IR/MatrixBuilder.h"
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/ScopedPrinter.h"
-#include "llvm/Support/X86TargetParser.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
+#include "llvm/TargetParser/X86TargetParser.h"
 #include 
 #include 
 

diff  --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 24b63372500b..c9362d30554c 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -67,8 +67,8 @@
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/TimeProfiler.h"
-#include "llvm/Support/X86TargetParser.h"
 #include "llvm/Support/xxhash.h"
+#include "llvm/TargetParser/X86TargetParser.h"
 #include 
 
 using namespace clang;

diff  --git a/llvm/include/llvm/Support/X86TargetParser.h 
b/llvm/include/llvm/Support/X86TargetParser.h
deleted file mode 100644
index 351fb89d4601..
--- a/llvm/include/llvm/Support/X86TargetParser.h
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- llvm/Support/X86TargetParser.h --*- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-///
-/// \file
-/// This header is deprecated in favour of
-/// `llvm/TargetParser/X86TargetParser.h`.
-///
-//===--===//
-
-#include "llvm/TargetParser/X86TargetParser.h"



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[clang] b9a1c4d - [NFC][TargetParser] Remove llvm/Support/CSKYTargetParser.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:05:59Z
New Revision: b9a1c4d5e13ce3129d957675fc966577da310f58

URL: 
https://github.com/llvm/llvm-project/commit/b9a1c4d5e13ce3129d957675fc966577da310f58
DIFF: 
https://github.com/llvm/llvm-project/commit/b9a1c4d5e13ce3129d957675fc966577da310f58.diff

LOG: [NFC][TargetParser] Remove llvm/Support/CSKYTargetParser.h

Added: 


Modified: 
clang/lib/Basic/Targets/CSKY.h
clang/lib/Driver/ToolChains/Arch/CSKY.cpp
llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp

Removed: 
llvm/include/llvm/Support/CSKYTargetParser.h



diff  --git a/clang/lib/Basic/Targets/CSKY.h b/clang/lib/Basic/Targets/CSKY.h
index 6edd035d9eb8..2346408f0f94 100644
--- a/clang/lib/Basic/Targets/CSKY.h
+++ b/clang/lib/Basic/Targets/CSKY.h
@@ -15,7 +15,7 @@
 
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetInfo.h"
-#include "llvm/Support/CSKYTargetParser.h"
+#include "llvm/TargetParser/CSKYTargetParser.h"
 
 namespace clang {
 namespace targets {

diff  --git a/clang/lib/Driver/ToolChains/Arch/CSKY.cpp 
b/clang/lib/Driver/ToolChains/Arch/CSKY.cpp
index ed8128d829e9..09baff68e6df 100644
--- a/clang/lib/Driver/ToolChains/Arch/CSKY.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/CSKY.cpp
@@ -14,10 +14,10 @@
 #include "clang/Driver/Options.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Option/ArgList.h"
-#include "llvm/Support/CSKYTargetParser.h"
 #include "llvm/Support/Host.h"
 #include "llvm/Support/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
+#include "llvm/TargetParser/CSKYTargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/llvm/include/llvm/Support/CSKYTargetParser.h 
b/llvm/include/llvm/Support/CSKYTargetParser.h
deleted file mode 100644
index d3080ccd8970..
--- a/llvm/include/llvm/Support/CSKYTargetParser.h
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- llvm/Support/CSKYTargetParser.h -*- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-///
-/// \file
-/// This header is deprecated in favour of
-/// `llvm/TargetParser/CSKYTargetParser.h`.
-///
-//===--===//
-
-#include "llvm/TargetParser/CSKYTargetParser.h"

diff  --git a/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp 
b/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
index 11ed3dda1c91..cad1625ca215 100644
--- a/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
+++ b/llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp
@@ -29,10 +29,10 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/CSKYAttributes.h"
-#include "llvm/Support/CSKYTargetParser.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/TargetParser/CSKYTargetParser.h"
 
 using namespace llvm;
 

diff  --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp 
b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
index 90775c1b70f2..059c3c143c31 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
@@ -21,9 +21,9 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCSymbolELF.h"
 #include "llvm/Support/CSKYAttributes.h"
-#include "llvm/Support/CSKYTargetParser.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/LEB128.h"
+#include "llvm/TargetParser/CSKYTargetParser.h"
 
 using namespace llvm;
 



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[clang] a4c623e - [NFC][TargetParser] Remove llvm/Support/LoongArchTargetParser.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:05:59Z
New Revision: a4c623e563ca46070284bc09d06f49d1f2426bc1

URL: 
https://github.com/llvm/llvm-project/commit/a4c623e563ca46070284bc09d06f49d1f2426bc1
DIFF: 
https://github.com/llvm/llvm-project/commit/a4c623e563ca46070284bc09d06f49d1f2426bc1.diff

LOG: [NFC][TargetParser] Remove llvm/Support/LoongArchTargetParser.h

Added: 


Modified: 
clang/lib/Driver/ToolChains/Arch/LoongArch.cpp

Removed: 
llvm/include/llvm/Support/LoongArchTargetParser.h



diff  --git a/clang/lib/Driver/ToolChains/Arch/LoongArch.cpp 
b/clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
index 576677a5f38e..c1c220633b6b 100644
--- a/clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
@@ -11,7 +11,7 @@
 #include "clang/Driver/Driver.h"
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
-#include "llvm/Support/LoongArchTargetParser.h"
+#include "llvm/TargetParser/LoongArchTargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/llvm/include/llvm/Support/LoongArchTargetParser.h 
b/llvm/include/llvm/Support/LoongArchTargetParser.h
deleted file mode 100644
index 4e735c893f82..
--- a/llvm/include/llvm/Support/LoongArchTargetParser.h
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- llvm/Support/LoongArchTargetParser.h *- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-///
-/// \file
-/// This header is deprecated in favour of
-/// `llvm/TargetParser/LoongArchTargetParser.h`.
-///
-//===--===//
-
-#include "llvm/TargetParser/LoongArchTargetParser.h"



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[clang] 4ae5400 - [NFC][TargetParser] Remove llvm/Support/ARMTargetParserCommon.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:05:59Z
New Revision: 4ae540001a58d56659e3594ebbe9d1d1c57862fb

URL: 
https://github.com/llvm/llvm-project/commit/4ae540001a58d56659e3594ebbe9d1d1c57862fb
DIFF: 
https://github.com/llvm/llvm-project/commit/4ae540001a58d56659e3594ebbe9d1d1c57862fb.diff

LOG: [NFC][TargetParser] Remove llvm/Support/ARMTargetParserCommon.h

Added: 


Modified: 
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/ARM.h
clang/lib/Driver/ToolChains/Clang.cpp

Removed: 
llvm/include/llvm/Support/ARMTargetParserCommon.h



diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index 00387ab173b3..a0eae3177e3a 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -17,8 +17,8 @@
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
+#include "llvm/TargetParser/ARMTargetParserCommon.h"
 #include 
 
 using namespace clang;

diff  --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index fd3966b69d55..90db3dc8da19 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -17,9 +17,9 @@
 #include "clang/Basic/TargetInfo.h"
 #include "clang/Basic/TargetOptions.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/TargetParser/ARMTargetParser.h"
+#include "llvm/TargetParser/ARMTargetParserCommon.h"
 
 namespace clang {
 namespace targets {

diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index c316de65d89a..e7ba912403d8 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -45,7 +45,6 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/Option/ArgList.h"
-#include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Compression.h"
@@ -56,6 +55,7 @@
 #include "llvm/Support/Process.h"
 #include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/YAMLParser.h"
+#include "llvm/TargetParser/ARMTargetParserCommon.h"
 #include "llvm/TargetParser/RISCVTargetParser.h"
 #include 
 

diff  --git a/llvm/include/llvm/Support/ARMTargetParserCommon.h 
b/llvm/include/llvm/Support/ARMTargetParserCommon.h
deleted file mode 100644
index 27522f9802d2..
--- a/llvm/include/llvm/Support/ARMTargetParserCommon.h
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- llvm/Support/ARMTargetParserCommon.def --*- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-///
-/// \file
-/// This header is deprecated in favour of
-/// `llvm/TargetParser/ARMTargetParserCommon.h`.
-///
-//===--===//
-
-#include "llvm/TargetParser/ARMTargetParserCommon.h"



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[clang] 27aeb58 - [NFC][TargetParser] Remove llvm/Support/ARMTargetParser.h

2023-02-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-07T11:05:58Z
New Revision: 27aeb58ce4d12e15b966dba86738eb65a96703f7

URL: 
https://github.com/llvm/llvm-project/commit/27aeb58ce4d12e15b966dba86738eb65a96703f7
DIFF: 
https://github.com/llvm/llvm-project/commit/27aeb58ce4d12e15b966dba86738eb65a96703f7.diff

LOG: [NFC][TargetParser] Remove llvm/Support/ARMTargetParser.h

Added: 


Modified: 
clang/lib/Basic/Targets/ARM.h
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Arch/ARM.h
lldb/source/Utility/ArchSpec.cpp
llvm/include/llvm/MC/MCStreamer.h
llvm/lib/BinaryFormat/MachO.cpp
llvm/lib/Target/ARM/ARMSubtarget.cpp
llvm/lib/Target/ARM/ARMTargetMachine.cpp

Removed: 
llvm/include/llvm/Support/ARMTargetParser.h



diff  --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index e662a609017b..fd3966b69d55 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -17,9 +17,9 @@
 #include "clang/Basic/TargetInfo.h"
 #include "clang/Basic/TargetOptions.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/ARMTargetParser.h"
 #include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 namespace clang {
 namespace targets {

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index b6a9df28500a..13a9c485ac9b 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -12,9 +12,9 @@
 #include "clang/Driver/Options.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Option/ArgList.h"
-#include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/Host.h"
+#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.h 
b/clang/lib/Driver/ToolChains/Arch/ARM.h
index 782bdf3d0202..a9a4ca1eb05a 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.h
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.h
@@ -13,8 +13,8 @@
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Option/Option.h"
-#include "llvm/Support/ARMTargetParser.h"
 #include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 #include 
 #include 
 

diff  --git a/lldb/source/Utility/ArchSpec.cpp 
b/lldb/source/Utility/ArchSpec.cpp
index e1d7ee3ee276..c82097a9e6cd 100644
--- a/lldb/source/Utility/ArchSpec.cpp
+++ b/lldb/source/Utility/ArchSpec.cpp
@@ -16,8 +16,8 @@
 #include "llvm/BinaryFormat/COFF.h"
 #include "llvm/BinaryFormat/ELF.h"
 #include "llvm/BinaryFormat/MachO.h"
-#include "llvm/Support/ARMTargetParser.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace lldb;
 using namespace lldb_private;

diff  --git a/llvm/include/llvm/MC/MCStreamer.h 
b/llvm/include/llvm/MC/MCStreamer.h
index 898fbc8c0fab..5331d9bd3cc4 100644
--- a/llvm/include/llvm/MC/MCStreamer.h
+++ b/llvm/include/llvm/MC/MCStreamer.h
@@ -22,11 +22,11 @@
 #include "llvm/MC/MCLinkerOptimizationHint.h"
 #include "llvm/MC/MCPseudoProbe.h"
 #include "llvm/MC/MCWinEH.h"
-#include "llvm/Support/ARMTargetParser.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/MD5.h"
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/VersionTuple.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 #include 
 #include 
 #include 

diff  --git a/llvm/include/llvm/Support/ARMTargetParser.h 
b/llvm/include/llvm/Support/ARMTargetParser.h
deleted file mode 100644
index a0c0edd6d0f1..
--- a/llvm/include/llvm/Support/ARMTargetParser.h
+++ /dev/null
@@ -1,15 +0,0 @@
-//===-- llvm/Support/ARMTargetParser.h --*- C++ 
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===--===//
-///
-/// \file
-/// This header is deprecated in favour of
-/// `llvm/TargetParser/ARMTargetParser.h`.
-///
-//===--===//
-
-#include "llvm/TargetParser/ARMTargetParser.h"

diff  --git a/llvm/lib/BinaryFormat/MachO.cpp b/llvm/lib/BinaryFormat/MachO.cpp
index 02a515c94399..c4cc8d6152d1 100644
--- a/llvm/lib/BinaryFormat/MachO.cpp
+++ b/llvm/lib/BinaryFormat/MachO.cpp
@@ -8,7 +8,7 @@
 
 #include "llvm/BinaryFormat/MachO.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/ARMTargetParser.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace llvm;
 

diff  --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp 
b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index

[clang] 8c71229 - [NFC][TargetParser] Remove llvm/Support/AArch64TargetParser.h

2023-02-03 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-02-03T17:34:01Z
New Revision: 8c712296fb75ff73db08f92444b35c438c01a405

URL: 
https://github.com/llvm/llvm-project/commit/8c712296fb75ff73db08f92444b35c438c01a405
DIFF: 
https://github.com/llvm/llvm-project/commit/8c712296fb75ff73db08f92444b35c438c01a405.diff

LOG: [NFC][TargetParser] Remove llvm/Support/AArch64TargetParser.h

Removes the forwarding header `llvm/Support/AArch64TargetParser.h`.

I am proposing to do this for all the forwarding headers left after
rGf09cf34d00625e57dea5317a3ac0412c07292148 - for each header:
- Update all relevant in-tree includes
- Remove the forwarding Header

Differential Revision: https://reviews.llvm.org/D140999

Added: 


Modified: 
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Driver/SanitizerArgs.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Removed: 
llvm/include/llvm/Support/AArch64TargetParser.h



diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index b670a2578f843..00387ab173b39 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -17,7 +17,6 @@
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
 #include 

diff  --git a/clang/lib/Basic/Targets/AArch64.h 
b/clang/lib/Basic/Targets/AArch64.h
index 34df886377eaa..7f88f3516780f 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -15,7 +15,7 @@
 
 #include "OSTargets.h"
 #include "clang/Basic/TargetBuiltins.h"
-#include "llvm/Support/AArch64TargetParser.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 #include 
 
 namespace clang {

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index aefbc731f8738..01b980cfed793 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -52,10 +52,10 @@
 #include "llvm/IR/IntrinsicsX86.h"
 #include "llvm/IR/MDBuilder.h"
 #include "llvm/IR/MatrixBuilder.h"
-#include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/ConvertUTF.h"
 #include "llvm/Support/ScopedPrinter.h"
 #include "llvm/Support/X86TargetParser.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 #include 
 #include 
 

diff  --git a/clang/lib/Driver/SanitizerArgs.cpp 
b/clang/lib/Driver/SanitizerArgs.cpp
index 52bee6a755ff4..84be06b90ee62 100644
--- a/clang/lib/Driver/SanitizerArgs.cpp
+++ b/clang/lib/Driver/SanitizerArgs.cpp
@@ -14,11 +14,11 @@
 #include "clang/Driver/ToolChain.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/SpecialCaseList.h"
 #include "llvm/Support/TargetParser.h"
 #include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 #include "llvm/Transforms/Instrumentation/AddressSanitizerOptions.h"
 #include 
 

diff  --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 4b641bbb73d41..9e17c06db106f 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -12,9 +12,9 @@
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
 #include "llvm/Option/ArgList.h"
-#include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/Host.h"
+#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::tools;

diff  --git a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp 
b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
index ed3b3e6da02ba..8a4fd08a9268b 100644
--- a/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
+++ b/lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
@@ -23,10 +23,10 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCTargetOptions.h"
 #include "llvm/MC/TargetRegistry.h"
-#include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/ScopedPrinter.h"
 #include "llvm/Support/TargetSelect.h"
+#include "llvm/TargetParser/AArch64TargetParser.h"
 
 #include "lldb/Core/Address.h"
 #include "lldb/Core/Module.h"

diff  --git a/llvm/include/llvm/Support/AArch64TargetParser.h 
b/llvm/include/llvm/Support/AArch64TargetParser.h
deleted file mode 100644
index 54c4a2b786c96..0
---

[clang] 03ef89f - [AArch64] Check 128-bit Sysreg Builtins

2023-01-23 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2023-01-23T15:24:30Z
New Revision: 03ef89f8d9094bf70416e19d0e909909b100a4a0

URL: 
https://github.com/llvm/llvm-project/commit/03ef89f8d9094bf70416e19d0e909909b100a4a0
DIFF: 
https://github.com/llvm/llvm-project/commit/03ef89f8d9094bf70416e19d0e909909b100a4a0.diff

LOG: [AArch64] Check 128-bit Sysreg Builtins

This patch contains several related changes:

1. We move to using TARGET_BUILTIN for the 128-bit system register
   builtins to give better error messages when d128 has not been
   enabled, or has been enabled in a per-function manner.

2. We now validate the inputs to the 128-bit system register builtins,
   like we validate the other system register builtins.

3. We update the list of named PSTATE accessors for MSR (immediate), and
   now correctly enforce the expected ranges of the immediates. There is
   a long comment about how we chose to do this to comply with the ACLE
   when most of the PSTATE accessors for MSR (immediate) have aliased
   system registers for MRS/MSR which expect different values. In short,
   the MSR (immediate) names are prioritised, rather than falling-back
   to the register form when the value is out of range.

Differential Revision: https://reviews.llvm.org/D140222

Added: 
clang/test/CodeGen/aarch64-sysregs-target.c

Modified: 
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/Headers/arm_acle.h
clang/lib/Sema/SemaChecking.cpp
clang/test/Sema/aarch64-special-register.c

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsAArch64.def 
b/clang/include/clang/Basic/BuiltinsAArch64.def
index 61e6a5186ed98..e6672a1702e94 100644
--- a/clang/include/clang/Basic/BuiltinsAArch64.def
+++ b/clang/include/clang/Basic/BuiltinsAArch64.def
@@ -82,11 +82,11 @@ BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc")
 // System Registers
 BUILTIN(__builtin_arm_rsr, "UicC*", "nc")
 BUILTIN(__builtin_arm_rsr64, "WUicC*", "nc")
-BUILTIN(__builtin_arm_rsr128, "LLLUicC*", "nc")
+TARGET_BUILTIN(__builtin_arm_rsr128, "LLLUicC*", "nc", "d128")
 BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc")
 BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc")
 BUILTIN(__builtin_arm_wsr64, "vcC*WUi", "nc")
-BUILTIN(__builtin_arm_wsr128, "vcC*LLLUi", "nc")
+TARGET_BUILTIN(__builtin_arm_wsr128, "vcC*LLLUi", "nc", "d128")
 BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc")
 
 // MSVC

diff  --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 469f24eadaf33..e086f1f02dad0 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -712,17 +712,13 @@ __arm_st64bv0(void *__addr, data512_t __value) {
 /* 10.1 Special register intrinsics */
 #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg)
 #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg)
-#if __ARM_FEATURE_SYSREG128
 #define __arm_rsr128(sysreg) __builtin_arm_rsr128(sysreg)
-#endif
 #define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg)
 #define __arm_rsrf(sysreg) __builtin_bit_cast(float, __arm_rsr(sysreg))
 #define __arm_rsrf64(sysreg) __builtin_bit_cast(double, __arm_rsr64(sysreg))
 #define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v)
 #define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v)
-#if __ARM_FEATURE_SYSREG128
 #define __arm_wsr128(sysreg, v) __builtin_arm_wsr128(sysreg, v)
-#endif
 #define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v)
 #define __arm_wsrf(sysreg, v) __arm_wsr(sysreg, __builtin_bit_cast(uint32_t, 
v))
 #define __arm_wsrf64(sysreg, v) __arm_wsr64(sysreg, 
__builtin_bit_cast(uint64_t, v))

diff  --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 07325d56f3621..ea21171aaac62 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -3292,7 +3292,9 @@ bool Sema::CheckAArch64BuiltinFunctionCall(const 
TargetInfo ,
   }
 
   if (BuiltinID == AArch64::BI__builtin_arm_rsr64 ||
-  BuiltinID == AArch64::BI__builtin_arm_wsr64)
+  BuiltinID == AArch64::BI__builtin_arm_wsr64 ||
+  BuiltinID == AArch64::BI__builtin_arm_rsr128 ||
+  BuiltinID == AArch64::BI__builtin_arm_wsr128)
 return SemaBuiltinARMSpecialReg(BuiltinID, TheCall, 0, 5, true);
 
   // Memory Tagging Extensions (MTE) Intrinsics
@@ -8314,6 +8316,8 @@ bool Sema::SemaBuiltinARMSpecialReg(unsigned BuiltinID, 
CallExpr *TheCall,
   BuiltinID == ARM::BI__builtin_arm_wsrp;
   bool IsAArch64Builtin = BuiltinID == AArch64::BI__builtin_arm_rsr64 ||
   BuiltinID == AArch64::BI__builtin_arm_wsr64 ||
+  BuiltinID == AArch64::BI__builtin_arm_rsr128 ||
+  BuiltinID == AArch64::BI__builtin_arm_wsr128 ||
   BuiltinID == AArch64::BI__builtin_arm_rsr ||
   BuiltinID == AArch64::BI__builtin_arm_rsrp ||
   BuiltinID == AArch64::BI__builtin_arm_wsr ||
@@ -8381,21 +8385,51 @@ bool

[clang] 82b51a1 - [AArch64] Support SLC in ACLE prefetch intrinsics

2022-12-16 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-12-16T14:42:27Z
New Revision: 82b51a14280414a53413ed62c001d2c589c649c3

URL: 
https://github.com/llvm/llvm-project/commit/82b51a14280414a53413ed62c001d2c589c649c3
DIFF: 
https://github.com/llvm/llvm-project/commit/82b51a14280414a53413ed62c001d2c589c649c3.diff

LOG: [AArch64] Support SLC in ACLE prefetch intrinsics

This change:
- Modifies the ACLE code to allow the new SLC value (3) for the prefetch
  target.

- Introduces a new intrinsic, @llvm.aarch64.prefetch which matches the
  PRFM family instructions much more closely, and can represent all
  values for the PRFM immediate.

  The target-independent @llvm.prefetch intrinsic does not have enough
  information for us to be able to lower to it from the ACLE intrinsics
  correctly.

- Lowers the acle calls to the new intrinsic on aarch64 (the ARM
  lowering is unchanged).

- Implements code generation for the new intrinsic in both SelectionDAG
  and GlobalISel. We specifically choose to continue to support lowering
  the target-independent @llvm.prefetch intrinsic so that other
  frontends can continue to use it.

Differential Revision: https://reviews.llvm.org/D139443

Added: 
llvm/test/CodeGen/AArch64/arm64-prefetch-new.ll

Modified: 
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/arm_acle.c
clang/test/CodeGen/builtins-arm64.c
clang/test/Sema/builtins-arm64.c
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index bd96108d6dc00..55aa9f6acd0fe 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -9749,29 +9749,6 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned 
BuiltinID,
 return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
   }
 
-  if (BuiltinID == clang::AArch64::BI__builtin_arm_prefetch) {
-Value *Address = EmitScalarExpr(E->getArg(0));
-Value *RW  = EmitScalarExpr(E->getArg(1));
-Value *CacheLevel  = EmitScalarExpr(E->getArg(2));
-Value *RetentionPolicy = EmitScalarExpr(E->getArg(3));
-Value *IsData  = EmitScalarExpr(E->getArg(4));
-
-Value *Locality = nullptr;
-if (cast(RetentionPolicy)->isZero()) {
-  // Temporal fetch, needs to convert cache level to locality.
-  Locality = llvm::ConstantInt::get(Int32Ty,
--cast(CacheLevel)->getValue() + 3);
-} else {
-  // Streaming fetch.
-  Locality = llvm::ConstantInt::get(Int32Ty, 0);
-}
-
-// FIXME: We need AArch64 specific LLVM intrinsic if we want to specify
-// PLDL3STRM or PLDL2STRM.
-Function *F = CGM.getIntrinsic(Intrinsic::prefetch, Address->getType());
-return Builder.CreateCall(F, {Address, RW, Locality, IsData});
-  }
-
   if (BuiltinID == clang::AArch64::BI__builtin_arm_rbit) {
 assert((getContext().getTypeSize(E->getType()) == 32) &&
"rbit of unusual size!");

diff  --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 9f0c8491ad666..86f1c3c42598a 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -3226,9 +3226,9 @@ bool Sema::CheckAArch64BuiltinFunctionCall(const 
TargetInfo ,
 
   if (BuiltinID == AArch64::BI__builtin_arm_prefetch) {
 return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1) ||
-  SemaBuiltinConstantArgRange(TheCall, 2, 0, 2) ||
-  SemaBuiltinConstantArgRange(TheCall, 3, 0, 1) ||
-  SemaBuiltinConstantArgRange(TheCall, 4, 0, 1);
+   SemaBuiltinConstantArgRange(TheCall, 2, 0, 3) ||
+   SemaBuiltinConstantArgRange(TheCall, 3, 0, 1) ||
+   SemaBuiltinConstantArgRange(TheCall, 4, 0, 1);
   }
 
   if (BuiltinID == AArch64::BI__builtin_arm_rsr64 ||

diff  --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c
index 3697d297f89f1..d3ea9ded6583d 100644
--- a/clang/test/CodeGen/arm_acle.c
+++ b/clang/test/CodeGen/arm_acle.c
@@ -168,10 +168,15 @@ void test_swp(uint32_t x, volatile void *p) {
 
 /* 8.6 Memory prefetch intrinsics */
 /* 8.6.1 Data prefetch */
-// ARM-LABEL: @test_pld(
-// ARM-NEXT:  entry:
-// ARM-NEXT:call void @llvm.prefetch.p0(ptr null, i32 0, i32 3, i32 1)
-// ARM-NEXT:ret void
+// AArch32-LABEL: @test_pld(
+// AArch32-NEXT:  entry:
+// AArch32-NEXT:call void @llvm.prefetch.p0(ptr null, i32 0, i32 3, i32 1)
+// AArch32-NEXT:ret void
+//
+// AArch64-LABEL: @test_pld(
+// AArch64-NEXT:  entry:
+// AArch64-NEXT:call void @llvm.aarch64.prefetch(ptr null, i32 0, i32 0, 
i32 0, i32 1)
+// AArch64-NEXT:ret void
 //
 void test_pld() {
   __pld(0);
@@ -184,7 +189,7 @@ void test_pld() {
 //
 //

[clang] 83b3304 - [AArch64] Implement __arm_rsr128/__arm_wsr128

2022-12-06 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-12-06T11:39:05Z
New Revision: 83b3304dd2a3bee8b6b4f76282adb734a5d1c8ff

URL: 
https://github.com/llvm/llvm-project/commit/83b3304dd2a3bee8b6b4f76282adb734a5d1c8ff
DIFF: 
https://github.com/llvm/llvm-project/commit/83b3304dd2a3bee8b6b4f76282adb734a5d1c8ff.diff

LOG: [AArch64] Implement __arm_rsr128/__arm_wsr128

This only contains the SelectionDAG implementation. GlobalISel to
follow.

The broad approach is:
- Introduce new builtins for 128-bit wide instructions.
- Lower these to @llvm.read_register.i128/@llvm.write_register.i128
- Introduce target-specific ISD nodes which have legal operands (two
  i64s rather than an i128). These are named AArch64::{MRRS, MSRR} to
  match the instructions they are for. These are a little complex as
  they need to match the "shape" of what they're replacing or the
  legaliser complains.
- Select these using the existing tryReadRegister/tryWriteRegister to
  share the MDString parsing code, and introduce additional code to
  ensure these are selected into the right MRRS/MSRR instructions. What
  makes this hard is ensuring that the two i64s end up in an XSeqPair
  register pair, because SelectionDAG doesn't care that much about
  register classes if it can avoid doing so.

The main change to existing code is the reorganisation of
tryReadRegister and tryWriteRegister to try to keep the string parsing
code separate from the instruction creating code.

This also includes the changes to clang to define and use the ACLE
feature macro named `__ARM_FEATURE_SYSREG128`.

Contributors:
  Sam Elliott
  Lucas Prates

Differential Revision: https://reviews.llvm.org/D139086

Added: 
llvm/test/CodeGen/AArch64/aarch64-sysreg128.ll

Modified: 
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/arm_acle.c
clang/test/Preprocessor/aarch64-target-features.c
llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsAArch64.def 
b/clang/include/clang/Basic/BuiltinsAArch64.def
index bc8ab4eade91a..c9b3272e74bc8 100644
--- a/clang/include/clang/Basic/BuiltinsAArch64.def
+++ b/clang/include/clang/Basic/BuiltinsAArch64.def
@@ -82,9 +82,11 @@ BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc")
 // System Registers
 BUILTIN(__builtin_arm_rsr, "UicC*", "nc")
 BUILTIN(__builtin_arm_rsr64, "WUicC*", "nc")
+BUILTIN(__builtin_arm_rsr128, "LLLUicC*", "nc")
 BUILTIN(__builtin_arm_rsrp, "v*cC*", "nc")
 BUILTIN(__builtin_arm_wsr, "vcC*Ui", "nc")
 BUILTIN(__builtin_arm_wsr64, "vcC*WUi", "nc")
+BUILTIN(__builtin_arm_wsr128, "vcC*LLLUi", "nc")
 BUILTIN(__builtin_arm_wsrp, "vcC*vC*", "nc")
 
 // MSVC

diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2b717208313f2..0138111758657 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -7605,9 +7605,10 @@ static Value *EmitSpecialRegisterBuiltin(CodeGenFunction 
,
  llvm::Type *ValueType,
  SpecialRegisterAccessKind AccessKind,
  StringRef SysReg = "") {
-  // write and register intrinsics only support 32 and 64 bit operations.
-  assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64))
-  && "Unsupported size for register.");
+  // write and register intrinsics only support 32, 64 and 128 bit operations.
+  assert((RegisterType->isIntegerTy(32) || RegisterType->isIntegerTy(64) ||
+  RegisterType->isIntegerTy(128)) &&
+ "Unsupported size for register.");
 
   CodeGen::CGBuilderTy  = CGF.Builder;
   CodeGen::CodeGenModule  = CGF.CGM;
@@ -10173,32 +10174,43 @@ Value 
*CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
 
   if (BuiltinID == clang::AArch64::BI__builtin_arm_rsr ||
   BuiltinID == clang::AArch64::BI__builtin_arm_rsr64 ||
+  BuiltinID == clang::AArch64::BI__builtin_arm_rsr128 ||
   BuiltinID == clang::AArch64::BI__builtin_arm_rsrp ||
   BuiltinID == clang::AArch64::BI__builtin_arm_wsr ||
   BuiltinID == clang::AArch64::BI__builtin_arm_wsr64 ||
+  BuiltinID == clang::AArch64::BI__builtin_arm_wsr128 ||
   BuiltinID == clang::AArch64::BI__builtin_arm_wsrp) {
 
 SpecialRegisterAccessKind AccessKind = Write;
 if (BuiltinID == clang::AArch64::BI__builtin_arm_rsr ||
 BuiltinID == clang::AArch64::BI__builtin_arm_rsr64 ||
+BuiltinID == clang::AArch64::BI__builtin_arm_rsr128 ||
 BuiltinID == clang::AArch64::BI__builtin_arm_rsrp)
   AccessKind = VolatileRead;
 
 bool IsPointerBuiltin = BuiltinID == clang::AArch64::BI__builtin_arm_rsrp 
||
 BuiltinID ==

[clang-tools-extra] 3c97f6c - [Support] Move getHostNumPhysicalCores to Threading.h

2022-11-29 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-11-29T13:14:13Z
New Revision: 3c97f6cab92fb3511d72996ac7ca8a8b459ebc88

URL: 
https://github.com/llvm/llvm-project/commit/3c97f6cab92fb3511d72996ac7ca8a8b459ebc88
DIFF: 
https://github.com/llvm/llvm-project/commit/3c97f6cab92fb3511d72996ac7ca8a8b459ebc88.diff

LOG: [Support] Move getHostNumPhysicalCores to Threading.h

This change is focussed on simplifying `Support/Host.h` to only do
target detection. In this case, this function is close in usage to
existing functions in `Support/Threading.h`, so I moved it into there.
The function is also renamed to `llvm::get_physical_cores()` to match
the style of threading's functions.

The big change here is that now if you have threading disabled,
`llvm::get_physical_cores()` will return -1, as if it had not been able
to work out the right info. This is due to how Threading.cpp includes
OS-specific code/headers. This seems ok, as if threading is disabled,
LLVM should not need to know the number of physical cores.

Differential Revision: https://reviews.llvm.org/D137836

Added: 


Modified: 
clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
llvm/include/llvm/Support/Host.h
llvm/include/llvm/Support/Threading.h
llvm/lib/Support/Host.cpp
llvm/lib/Support/Threading.cpp
llvm/lib/Support/Unix/Threading.inc
llvm/lib/Support/Windows/Threading.inc
llvm/unittests/Support/Host.cpp
llvm/unittests/Support/Threading.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h 
b/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
index 3b7620adafb1..bf760e367ff7 100644
--- a/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
+++ b/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
@@ -7,11 +7,7 @@ class Dex;
 } // namespace clang
 
 namespace llvm {
-namespace sys {
-
-int getHostNumPhysicalCores();
-
-} // namespace sys
+int get_physical_cores();
 } // namespace llvm
 
 namespace {

diff  --git a/llvm/include/llvm/Support/Host.h 
b/llvm/include/llvm/Support/Host.h
index 369d6745db5a..dcebebdca6cb 100644
--- a/llvm/include/llvm/Support/Host.h
+++ b/llvm/include/llvm/Support/Host.h
@@ -54,11 +54,6 @@ namespace sys {
   /// \return - True on success.
   bool getHostCPUFeatures(StringMap );
 
-  /// Get the number of physical cores (as opposed to logical cores returned
-  /// from thread::hardware_concurrency(), which includes hyperthreads).
-  /// Returns -1 if unknown for the current host system.
-  int getHostNumPhysicalCores();
-
   namespace detail {
   /// Helper functions to extract HostCPUName from /proc/cpuinfo on linux.
   StringRef getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent);

diff  --git a/llvm/include/llvm/Support/Threading.h 
b/llvm/include/llvm/Support/Threading.h
index 7f2708ddbb46..f3f7c44bd439 100644
--- a/llvm/include/llvm/Support/Threading.h
+++ b/llvm/include/llvm/Support/Threading.h
@@ -231,6 +231,11 @@ constexpr bool llvm_is_multithreaded() { return 
LLVM_ENABLE_THREADS; }
   /// Returns how many physical CPUs or NUMA groups the system has.
   unsigned get_cpus();
 
+  /// Returns how many physical cores (as opposed to logical cores returned 
from
+  /// thread::hardware_concurrency(), which includes hyperthreads).
+  /// Returns -1 if unknown for the current host system.
+  int get_physical_cores();
+
   enum class ThreadPriority {
 /// Lower the current thread's priority as much as possible. Can be used
 /// for long-running tasks that are not time critical; more energy-

diff  --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 713227c4b088..c87d9644d097 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -1576,128 +1576,6 @@ VendorSignatures getVendorSignature(unsigned *MaxLeaf) {
 } // namespace llvm
 #endif
 
-#if defined(__linux__) && (defined(__i386__) || defined(__x86_64__))
-// On Linux, the number of physical cores can be computed from /proc/cpuinfo,
-// using the number of unique physical/core id pairs. The following
-// implementation reads the /proc/cpuinfo format on an x86_64 system.
-static int computeHostNumPhysicalCores() {
-  // Enabled represents the number of physical id/core id pairs with at least
-  // one processor id enabled by the CPU affinity mask.
-  cpu_set_t Affinity, Enabled;
-  if (sched_getaffinity(0, sizeof(Affinity), ) != 0)
-return -1;
-  CPU_ZERO();
-
-  // Read /proc/cpuinfo as a stream (until EOF reached). It cannot be
-  // mmapped because it appears to have 0 size.
-  llvm::ErrorOr> Text =
-  llvm::MemoryBuffer::getFileAsStream("/proc/cpuinfo");
-  if (std::error_code EC = Text.getError()) {
-llvm::errs() << "Can't read "
- << "/proc/cpuinfo: " << EC.message() << "\n";
-return -1;
-  }
-  SmallVector strs;
-  (*Text)->getBuffer().split(strs, "\n", /*MaxSplit=*/-1,
- /*KeepEmpty=*/false);
-  int

[clang-tools-extra] 5577207 - [Support] Move getHostNumPhysicalCores to Threading.h

2022-11-25 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-11-25T12:51:36Z
New Revision: 5577207d6d3e0642ea047a8dfbfcf3ad372a7f25

URL: 
https://github.com/llvm/llvm-project/commit/5577207d6d3e0642ea047a8dfbfcf3ad372a7f25
DIFF: 
https://github.com/llvm/llvm-project/commit/5577207d6d3e0642ea047a8dfbfcf3ad372a7f25.diff

LOG: [Support] Move getHostNumPhysicalCores to Threading.h

This change is focussed on simplifying `Support/Host.h` to only do
target detection. In this case, this function is close in usage to
existing functions in `Support/Threading.h`, so I moved it into there.
The function is also renamed to `llvm::get_physical_cores()` to match
the style of threading's functions.

Differential Revision: https://reviews.llvm.org/D137836

Added: 


Modified: 
clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
llvm/include/llvm/Support/Host.h
llvm/include/llvm/Support/Threading.h
llvm/lib/Support/Host.cpp
llvm/lib/Support/Threading.cpp
llvm/unittests/Support/Host.cpp
llvm/unittests/Support/Threading.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h 
b/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
index 3b7620adafb10..bf760e367ff78 100644
--- a/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
+++ b/clang-tools-extra/clangd/test/Inputs/BenchmarkHeader.h
@@ -7,11 +7,7 @@ class Dex;
 } // namespace clang
 
 namespace llvm {
-namespace sys {
-
-int getHostNumPhysicalCores();
-
-} // namespace sys
+int get_physical_cores();
 } // namespace llvm
 
 namespace {

diff  --git a/llvm/include/llvm/Support/Host.h 
b/llvm/include/llvm/Support/Host.h
index 369d6745db5ae..dcebebdca6cb7 100644
--- a/llvm/include/llvm/Support/Host.h
+++ b/llvm/include/llvm/Support/Host.h
@@ -54,11 +54,6 @@ namespace sys {
   /// \return - True on success.
   bool getHostCPUFeatures(StringMap );
 
-  /// Get the number of physical cores (as opposed to logical cores returned
-  /// from thread::hardware_concurrency(), which includes hyperthreads).
-  /// Returns -1 if unknown for the current host system.
-  int getHostNumPhysicalCores();
-
   namespace detail {
   /// Helper functions to extract HostCPUName from /proc/cpuinfo on linux.
   StringRef getHostCPUNameForPowerPC(StringRef ProcCpuinfoContent);

diff  --git a/llvm/include/llvm/Support/Threading.h 
b/llvm/include/llvm/Support/Threading.h
index 7f2708ddbb467..f3f7c44bd439a 100644
--- a/llvm/include/llvm/Support/Threading.h
+++ b/llvm/include/llvm/Support/Threading.h
@@ -231,6 +231,11 @@ constexpr bool llvm_is_multithreaded() { return 
LLVM_ENABLE_THREADS; }
   /// Returns how many physical CPUs or NUMA groups the system has.
   unsigned get_cpus();
 
+  /// Returns how many physical cores (as opposed to logical cores returned 
from
+  /// thread::hardware_concurrency(), which includes hyperthreads).
+  /// Returns -1 if unknown for the current host system.
+  int get_physical_cores();
+
   enum class ThreadPriority {
 /// Lower the current thread's priority as much as possible. Can be used
 /// for long-running tasks that are not time critical; more energy-

diff  --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 713227c4b088c..c87d9644d0979 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -1576,128 +1576,6 @@ VendorSignatures getVendorSignature(unsigned *MaxLeaf) {
 } // namespace llvm
 #endif
 
-#if defined(__linux__) && (defined(__i386__) || defined(__x86_64__))
-// On Linux, the number of physical cores can be computed from /proc/cpuinfo,
-// using the number of unique physical/core id pairs. The following
-// implementation reads the /proc/cpuinfo format on an x86_64 system.
-static int computeHostNumPhysicalCores() {
-  // Enabled represents the number of physical id/core id pairs with at least
-  // one processor id enabled by the CPU affinity mask.
-  cpu_set_t Affinity, Enabled;
-  if (sched_getaffinity(0, sizeof(Affinity), ) != 0)
-return -1;
-  CPU_ZERO();
-
-  // Read /proc/cpuinfo as a stream (until EOF reached). It cannot be
-  // mmapped because it appears to have 0 size.
-  llvm::ErrorOr> Text =
-  llvm::MemoryBuffer::getFileAsStream("/proc/cpuinfo");
-  if (std::error_code EC = Text.getError()) {
-llvm::errs() << "Can't read "
- << "/proc/cpuinfo: " << EC.message() << "\n";
-return -1;
-  }
-  SmallVector strs;
-  (*Text)->getBuffer().split(strs, "\n", /*MaxSplit=*/-1,
- /*KeepEmpty=*/false);
-  int CurProcessor = -1;
-  int CurPhysicalId = -1;
-  int CurSiblings = -1;
-  int CurCoreId = -1;
-  for (StringRef Line : strs) {
-std::pair Data = Line.split(':');
-auto Name = Data.first.trim();
-auto Val = Data.second.trim();
-// These fields are available if the kernel is configured with CONFIG_SMP.
-if (Name == "processor")
-  Val.getAsInteger(10, CurProcessor);
-else if (Name ==

[clang] 3e9b6ad - [ARM] Move ARM::parseBranchProtection into ARMTargetParserCommon

2022-11-25 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-11-25T11:33:53Z
New Revision: 3e9b6adfc7caa8cc376b78c98069f2c0c6ae3fff

URL: 
https://github.com/llvm/llvm-project/commit/3e9b6adfc7caa8cc376b78c98069f2c0c6ae3fff
DIFF: 
https://github.com/llvm/llvm-project/commit/3e9b6adfc7caa8cc376b78c98069f2c0c6ae3fff.diff

LOG: [ARM] Move ARM::parseBranchProtection into ARMTargetParserCommon

This should live with the Arm targets, given they have target-specific
target parsers.

Differential Revision: https://reviews.llvm.org/D137835

Added: 


Modified: 
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.h
clang/lib/Driver/ToolChains/Clang.cpp
llvm/include/llvm/Support/ARMTargetParserCommon.h
llvm/include/llvm/Support/TargetParser.h
llvm/lib/Support/ARMTargetParserCommon.cpp
llvm/lib/Support/TargetParser.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index d85a21397abc1..1221b84676d9b 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -18,6 +18,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/AArch64TargetParser.h"
+#include "llvm/Support/ARMTargetParserCommon.h"
 
 using namespace clang;
 using namespace clang::targets;

diff  --git a/clang/lib/Basic/Targets/AArch64.h 
b/clang/lib/Basic/Targets/AArch64.h
index 74c7aad97690d..6d2eb866444d4 100644
--- a/clang/lib/Basic/Targets/AArch64.h
+++ b/clang/lib/Basic/Targets/AArch64.h
@@ -16,7 +16,6 @@
 #include "OSTargets.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
 
 namespace clang {
 namespace targets {

diff  --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index e85336b6e32f9..897073eca7eb5 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -17,9 +17,9 @@
 #include "clang/Basic/TargetInfo.h"
 #include "clang/Basic/TargetOptions.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/Compiler.h"
 #include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/Support/ARMTargetParserCommon.h"
+#include "llvm/Support/Compiler.h"
 
 namespace clang {
 namespace targets {

diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index fcf99c88d4c2c..765e766c39524 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -44,6 +44,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Config/llvm-config.h"
 #include "llvm/Option/ArgList.h"
+#include "llvm/Support/ARMTargetParserCommon.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Compression.h"
@@ -51,7 +52,6 @@
 #include "llvm/Support/Host.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
-#include "llvm/Support/TargetParser.h"
 #include "llvm/Support/YAMLParser.h"
 #include 
 

diff  --git a/llvm/include/llvm/Support/ARMTargetParserCommon.h 
b/llvm/include/llvm/Support/ARMTargetParserCommon.h
index 3db8646e26fd8..a21a9d7f1c67c 100644
--- a/llvm/include/llvm/Support/ARMTargetParserCommon.h
+++ b/llvm/include/llvm/Support/ARMTargetParserCommon.h
@@ -37,6 +37,15 @@ ISAKind parseArchISA(StringRef Arch);
 // Little/Big endian
 EndianKind parseArchEndian(StringRef Arch);
 
+struct ParsedBranchProtection {
+  StringRef Scope;
+  StringRef Key;
+  bool BranchTargetEnforcement;
+};
+
+bool parseBranchProtection(StringRef Spec, ParsedBranchProtection ,
+   StringRef );
+
 } // namespace ARM
 } // namespace llvm
 #endif

diff  --git a/llvm/include/llvm/Support/TargetParser.h 
b/llvm/include/llvm/Support/TargetParser.h
index 39222b02e21ad..bf954b909cf2f 100644
--- a/llvm/include/llvm/Support/TargetParser.h
+++ b/llvm/include/llvm/Support/TargetParser.h
@@ -182,19 +182,6 @@ void fillValidTuneCPUArchList(SmallVectorImpl 
, bool IsRV64);
 bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector 
);
 
 } // namespace RISCV
-
-namespace ARM {
-struct ParsedBranchProtection {
-  StringRef Scope;
-  StringRef Key;
-  bool BranchTargetEnforcement;
-};
-
-bool parseBranchProtection(StringRef Spec, ParsedBranchProtection ,
-   StringRef );
-
-} // namespace ARM
-
 } // namespace llvm
 
 #endif

diff  --git a/llvm/lib/Support/ARMTargetParserCommon.cpp 
b/llvm/lib/Support/ARMTargetParserCommon.cpp
index 1cbf6e1d4818a..8650261cf5f10 100644
--- a/llvm/lib/Support/ARMTargetParserCommon.cpp
+++ b/llvm/lib/Support/ARMTargetParserCommon.cpp
@@ -11,6 +11,7 @@
 
//===--===//
 
 #include "llvm/Support/ARMTargetParserCommon.h"
+#include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringSwitch.h"
 
 using namespace llvm;

[clang] 1666f09 - [ARM] Add Support for Cortex-M85

2022-07-05 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-07-05T10:43:31+01:00
New Revision: 1666f09933eefdd666be4c46887ba59ae089361c

URL: 
https://github.com/llvm/llvm-project/commit/1666f09933eefdd666be4c46887ba59ae089361c
DIFF: 
https://github.com/llvm/llvm-project/commit/1666f09933eefdd666be4c46887ba59ae089361c.diff

LOG: [ARM] Add Support for Cortex-M85

This patch adds support for Arm's Cortex-M85 CPU. The Cortex-M85 CPU is
an Arm v8.1m Mainline CPU, with optional support for MVE and PACBTI,
both of which are enabled by default.

Parts have been coauthored by by Mark Murray, Alexandros Lamprineas and
David Green.

Differential Revision: https://reviews.llvm.org/D128415

Added: 
clang/test/Driver/arm-nopacbti-disabled-features.c

Modified: 
clang/docs/ReleaseNotes.rst
clang/test/CodeGen/arm-target-features.c
clang/test/Driver/arm-cortex-cpus-2.c
clang/test/Driver/arm-nofp-disabled-features.c
clang/test/Misc/target-invalid-cpu-note.c
llvm/docs/ReleaseNotes.rst
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Target/ARM/ARM.td
llvm/test/CodeGen/ARM/build-attributes.ll
llvm/unittests/Support/TargetParserTest.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 3342f6208c4f8..f074d1bf204f7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -537,6 +537,10 @@ DWARF Support in Clang
 Arm and AArch64 Support in Clang
 
 
+- clang now supports the Cortex-M85 CPU, which can be chosen with
+  `-mcpu=cortex-m85`. By default, this has PACBTI turned on, but it can be
+  disabled with `-mcpu=cortex-m85+nopacbti`.
+
 Floating Point Support in Clang
 ---
 

diff  --git a/clang/test/CodeGen/arm-target-features.c 
b/clang/test/CodeGen/arm-target-features.c
index 8dbd90080a532..d0569c2d59443 100644
--- a/clang/test/CodeGen/arm-target-features.c
+++ b/clang/test/CodeGen/arm-target-features.c
@@ -110,4 +110,7 @@
 // RUN: %clang_cc1 -triple thumb-linux-gnueabi -target-cpu cortex-m55 
-emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARMV81M-MAIN-LINUX
 // CHECK-ARMV81M-MAIN-LINUX: 
"target-features"="+armv8.1-m.main,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve,+mve.fp,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp"
 
+// RUN: %clang_cc1 -triple thumb-linux-gnueabi -target-cpu cortex-m85 
-emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ARMV81M-CORTEX-M85-LINUX
+// CHECK-ARMV81M-CORTEX-M85-LINUX: 
"target-features"="+armv8.1-m.main,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve,+mve.fp,+pacbti,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp"
+
 void foo() {}

diff  --git a/clang/test/Driver/arm-cortex-cpus-2.c 
b/clang/test/Driver/arm-cortex-cpus-2.c
index 7d2c38b7cc0e3..5441e4da2462c 100644
--- a/clang/test/Driver/arm-cortex-cpus-2.c
+++ b/clang/test/Driver/arm-cortex-cpus-2.c
@@ -559,6 +559,9 @@
 // RUN: %clang -target arm -mcpu=cortex-m55 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-CORTEX-M55 %s
 // CHECK-CORTEX-M55:  "-cc1"{{.*}} "-triple" "thumbv8.1m.main-{{.*}} 
"-target-cpu" "cortex-m55"
 
+// RUN: %clang -target arm -mcpu=cortex-m85 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-CORTEX-M85 %s
+// CHECK-CORTEX-M85:  "-cc1"{{.*}} "-triple" "thumbv8.1m.main-{{.*}} 
"-target-cpu" "cortex-m85"
+
 // RUN: %clang -target arm -mcpu=neoverse-n2 -### -c %s 2>&1 | FileCheck 
-check-prefix=CHECK-NEOVERSE-N2 %s
 // CHECK-NEOVERSE-N2: "-cc1"{{.*}} "-triple" "armv8.5a-{{.*}}" "-target-cpu" 
"neoverse-n2"
 

diff  --git a/clang/test/Driver/arm-nofp-disabled-features.c 
b/clang/test/Driver/arm-nofp-disabled-features.c
index 432e4a98cffc6..247d67084d21a 100644
--- a/clang/test/Driver/arm-nofp-disabled-features.c
+++ b/clang/test/Driver/arm-nofp-disabled-features.c
@@ -9,8 +9,10 @@
 // RUN: %clang -target arm-arm-none-eabi -mfpu=none %s -### 2>&1 | FileCheck %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-a+nofp %s -### 2>&1 | 
FileCheck %s
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-a35+nofp %s -### 2>&1 | 
FileCheck %s
+// RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m85+nofp %s -### 2>&1 | 
FileCheck %s
 // RUN: %clang -target arm-arm-none-eabi -march=armv8-a+nofp+nomve %s -### 
2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NOMVE
 // RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-a35+nofp+nomve %s -### 
2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NOMVE
+// RUN: %clang -target arm-arm-none-eabi -mcpu=cortex-m85+nofp+nomve %s -### 
2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-NOMVE
 // CHECK: "-target-feature" "-dotprod"
 // CHECK: "-target-feature" "-fp16fml"
 // CHECK: "-target-feature" "-bf16"

diff  --git a/clang/test/Driver/arm-nopacbti-disabled-features.c 
b/clang/test/Driver/arm-nopacbti-disabled-features.c
new file mode 100644

[clang] 2321c36 - [ARM] Don't Enable AES Pass for Generic Cores

2022-05-18 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-05-18T13:10:31+01:00
New Revision: 2321c36fbf763e273ed78b4209168ce783b5cf96

URL: 
https://github.com/llvm/llvm-project/commit/2321c36fbf763e273ed78b4209168ce783b5cf96
DIFF: 
https://github.com/llvm/llvm-project/commit/2321c36fbf763e273ed78b4209168ce783b5cf96.diff

LOG: [ARM] Don't Enable AES Pass for Generic Cores

This brings clang/llvm into line with GCC. The Pass is still enabled for
the affected cores, but is now opt-in when using `-march=`.

I also took the opportunity to add release notes for this change.

Reviewed By: john.brawn

Differential Revision: https://reviews.llvm.org/D125775

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/ARM/ARM.td

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 20920942c207..4fb4c662d71b 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -265,6 +265,11 @@ New Compiler Flags
   the parameter list were ``void``. There is no ``-fknr-functions`` or
   ``-fno-no-knr-functions`` flag; this feature cannot be disabled in language
   modes where it is required, such as C++ or C2x.
+- A new ARM pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 
Erratum
+  1655431 can be enabled using ``-mfix-cortex-a57-aes-1742098`` or
+  ``-mfix-cortex-a72-aes-1655431``. The pass is enabled when using either of
+  these cpus with ``-mcpu=`` and can be disabled using
+  ``-mno-fix-cortex-a57-aes-1742098`` or ``-mno-fix-cortex-a72-aes-1655431``.
 
 Deprecated Compiler Flags
 -

diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 54f2029aa25d..8529bb76e13e 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -99,6 +99,8 @@ Changes to the ARM Backend
   warnings will be generated and -mrestrict-it is now always off by default.
   Previously it was on by default for Armv8 and off for all other architecture
   versions.
+* Added a pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72
+  Erratum 1655431. This is enabled by default when targeting either CPU.
 
 Changes to the AVR Backend
 --

diff  --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index de5dea1b2b2e..e8970b916a5f 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1161,7 +1161,7 @@ include "ARMScheduleM7.td"
 // ARM processors
 //
 // Dummy CPU, used to target architectures
-def : ProcessorModel<"generic", CortexA8Model,  
[FeatureFixCortexA57AES1742098]>;
+def : ProcessorModel<"generic", CortexA8Model,  []>;
 
 // FIXME: Several processors below are not using their own scheduler
 // model, but one of similar/previous processor. These should be fixed.



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[clang] 3a24df9 - [ARM] Pass for Cortex-A57 and Cortex-A72 Fused AES Erratum

2022-05-13 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-05-13T10:47:33+01:00
New Revision: 3a24df992cf87029ed89c5a4a6be4049b73ff3ab

URL: 
https://github.com/llvm/llvm-project/commit/3a24df992cf87029ed89c5a4a6be4049b73ff3ab
DIFF: 
https://github.com/llvm/llvm-project/commit/3a24df992cf87029ed89c5a4a6be4049b73ff3ab.diff

LOG: [ARM] Pass for Cortex-A57 and Cortex-A72 Fused AES Erratum

This adds a late Machine Pass to work around a Cortex CPU Erratum
affecting Cortex-A57 and Cortex-A72:
- Cortex-A57 Erratum 1742098
- Cortex-A72 Erratum 1655431

The pass inserts instructions to make the inputs to the fused AES
instruction pairs no longer trigger the erratum. Here the pass errs on
the side of caution, inserting the instructions wherever we cannot prove
that the inputs came from a safe instruction.

The pass is used:
- for Cortex-A57 and Cortex-A72,
- for "generic" cores (which are used when using `-march=`),
- when the user specifies `-mfix-cortex-a57-aes-1742098` or
  `mfix-cortex-a72-aes-1655431` in the command-line arguments to clang.

Reviewed By: dmgreen, simon_tatham

Differential Revision: https://reviews.llvm.org/D119720

Added: 
clang/test/Driver/arm-fix-cortex-a57-aes-1742098.c
llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp

Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/Arch/ARM.cpp
llvm/lib/Target/ARM/ARM.h
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/CMakeLists.txt
llvm/test/CodeGen/ARM/O3-pipeline.ll
llvm/test/CodeGen/ARM/aes-erratum-fix.ll

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 6668ac4ca9470..a4fb0e3697012 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3451,6 +3451,20 @@ def mfix_cmse_cve_2021_35465 : Flag<["-"], 
"mfix-cmse-cve-2021-35465">,
 def mno_fix_cmse_cve_2021_35465 : Flag<["-"], "mno-fix-cmse-cve-2021-35465">,
   Group,
   HelpText<"Don't work around VLLDM erratum CVE-2021-35465 (ARM only)">;
+def mfix_cortex_a57_aes_1742098 : Flag<["-"], "mfix-cortex-a57-aes-1742098">,
+  Group,
+  HelpText<"Work around Cortex-A57 Erratum 1742098 (ARM only)">;
+def mno_fix_cortex_a57_aes_1742098 : Flag<["-"], 
"mno-fix-cortex-a57-aes-1742098">,
+  Group,
+  HelpText<"Don't work around Cortex-A57 Erratum 1742098 (ARM only)">;
+def mfix_cortex_a72_aes_1655431 : Flag<["-"], "mfix-cortex-a72-aes-1655431">,
+  Group,
+  HelpText<"Work around Cortex-A72 Erratum 1655431 (ARM only)">,
+  Alias;
+def mno_fix_cortex_a72_aes_1655431 : Flag<["-"], 
"mno-fix-cortex-a72-aes-1655431">,
+  Group,
+  HelpText<"Don't work around Cortex-A72 Erratum 1655431 (ARM only)">,
+  Alias;
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 2d961f6e836ff..0dbb25de45a3d 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -733,6 +733,16 @@ void arm::getARMTargetFeatures(const Driver , const 
llvm::Triple ,
   Features.push_back("-fix-cmse-cve-2021-35465");
   }
 
+  // This also handles the -m(no-)fix-cortex-a72-1655431 arguments via aliases.
+  if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a57_aes_1742098,
+   options::OPT_mno_fix_cortex_a57_aes_1742098)) {
+if (A->getOption().matches(options::OPT_mfix_cortex_a57_aes_1742098)) {
+  Features.push_back("+fix-cortex-a57-aes-1742098");
+} else {
+  Features.push_back("-fix-cortex-a57-aes-1742098");
+}
+  }
+
   // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
   // neither options are specified, see if we are compiling for kernel/kext and
   // decide whether to pass "+long-calls" based on the OS and its version.

diff  --git a/clang/test/Driver/arm-fix-cortex-a57-aes-1742098.c 
b/clang/test/Driver/arm-fix-cortex-a57-aes-1742098.c
new file mode 100644
index 0..84e43cb55b433
--- /dev/null
+++ b/clang/test/Driver/arm-fix-cortex-a57-aes-1742098.c
@@ -0,0 +1,25 @@
+// RUN: %clang -### %s -target arm-none-none-eabi -march=armv8a 
-mfix-cortex-a57-aes-1742098 2>&1 | FileCheck %s --check-prefix=FIX
+// RUN: %clang -### %s -target arm-none-none-eabi -march=armv8a 
-mno-fix-cortex-a57-aes-1742098 2>&1 | FileCheck %s --check-prefix=NO-FIX
+
+// RUN: %clang -### %s -target arm-none-none-eabi -march=armv8a 
-mfix-cortex-a72-aes-1655431 2>&1 | FileCheck %s --check-prefix=FIX
+// RUN: %clang -### %s -target arm-none-none-eabi -march=armv8a 
-mno-fix-cortex-a72-aes-1655431 2>&1 | FileCheck %s --check-prefix=NO-FIX
+
+// RUN: %clang -### %s -target arm-none-none-eabi -march=armv8a 2>&1 | 
FileCheck %s --check-prefix=UNSPEC
+// RUN: %clang -### %s

[clang] 220da12 - [NFC][Clang][AArch64] Clean up AArch64TargetInfo::hasFeature

2022-02-28 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-02-28T14:25:12Z
New Revision: 220da125c423b71ce1507df84b75f54d274bc63d

URL: 
https://github.com/llvm/llvm-project/commit/220da125c423b71ce1507df84b75f54d274bc63d
DIFF: 
https://github.com/llvm/llvm-project/commit/220da125c423b71ce1507df84b75f54d274bc63d.diff

LOG: [NFC][Clang][AArch64] Clean up AArch64TargetInfo::hasFeature

Added: 


Modified: 
clang/lib/Basic/Targets/AArch64.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index bd03d88b2d5aa..964cf5c824140 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -511,14 +511,12 @@ AArch64TargetInfo::getVScaleRange(const LangOptions 
) const {
 }
 
 bool AArch64TargetInfo::hasFeature(StringRef Feature) const {
-  return Feature == "aarch64" || Feature == "arm64" || Feature == "arm" ||
- (Feature == "neon" && (FPU & NeonMode)) ||
- ((Feature == "sve" || Feature == "sve2" || Feature == "sve2-bitperm" 
||
-   Feature == "sve2-aes" || Feature == "sve2-sha3" ||
-   Feature == "sve2-sm4" || Feature == "f64mm" || Feature == "f32mm" ||
-   Feature == "i8mm" || Feature == "bf16") &&
-  (FPU & SveMode)) ||
- (Feature == "ls64" && HasLS64);
+  return llvm::StringSwitch(Feature)
+.Cases("aarch64", "arm64", "arm", true)
+.Case("neon", FPU & NeonMode)
+.Cases("sve", "sve2", "sve2-bitperm", "sve2-aes", "sve2-sha3", "sve2-sm4", 
"f64mm", "f32mm", "i8mm", "bf16", FPU & SveMode)
+.Case("ls64", HasLS64)
+.Default(false);
 }
 
 bool AArch64TargetInfo::handleTargetFeatures(std::vector 
,



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[clang] 3aec4b3 - Revert "Unaligned Access Warning Added"

2022-01-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-01-07T13:07:30Z
New Revision: 3aec4b3d348d69e6c1ead7cba54677b855293983

URL: 
https://github.com/llvm/llvm-project/commit/3aec4b3d348d69e6c1ead7cba54677b855293983
DIFF: 
https://github.com/llvm/llvm-project/commit/3aec4b3d348d69e6c1ead7cba54677b855293983.diff

LOG: Revert "Unaligned Access Warning Added"

This reverts commits:
- 2cd2600abaf3c604889b77ab408fdf89d7a21c48
- 11c67e5a4e99f51ec66c9781710f81955cfd5e24

Due to test failures on Windows.

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticASTKinds.td
clang/include/clang/Basic/DiagnosticGroups.td
clang/lib/AST/RecordLayoutBuilder.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.h
clang/lib/Driver/ToolChains/Arch/ARM.cpp
clang/lib/Driver/ToolChains/Clang.cpp

Removed: 
clang/test/Sema/test-wunaligned-access.c
clang/test/Sema/test-wunaligned-access.cpp



diff  --git a/clang/include/clang/Basic/DiagnosticASTKinds.td 
b/clang/include/clang/Basic/DiagnosticASTKinds.td
index d870a9f06592a..d788c85179142 100644
--- a/clang/include/clang/Basic/DiagnosticASTKinds.td
+++ b/clang/include/clang/Basic/DiagnosticASTKinds.td
@@ -590,9 +590,4 @@ def warn_padded_struct_size : Warning<
   InGroup, DefaultIgnore;
 def warn_unnecessary_packed : Warning<
   "packed attribute is unnecessary for %0">, InGroup, DefaultIgnore;
-
-// -Wunaligned-access
-def warn_unaligned_access : Warning<
-  "field %1 within its parent %0 has an alignment greater than its parent "
-  "this may be caused by %0 being packed and can lead to unaligned accesses">, 
InGroup, DefaultIgnore;
 }

diff  --git a/clang/include/clang/Basic/DiagnosticGroups.td 
b/clang/include/clang/Basic/DiagnosticGroups.td
index bc4bb17b271d8..c0642efaee4eb 100644
--- a/clang/include/clang/Basic/DiagnosticGroups.td
+++ b/clang/include/clang/Basic/DiagnosticGroups.td
@@ -542,7 +542,6 @@ def ExplicitInitializeCall : 
DiagGroup<"explicit-initialize-call">;
 def OrderedCompareFunctionPointers : 
DiagGroup<"ordered-compare-function-pointers">;
 def Packed : DiagGroup<"packed">;
 def Padded : DiagGroup<"padded">;
-def UnalignedAccess : DiagGroup<"unaligned-access">;
 
 def PessimizingMove : DiagGroup<"pessimizing-move">;
 def ReturnStdMove : DiagGroup<"return-std-move">;

diff  --git a/clang/lib/AST/RecordLayoutBuilder.cpp 
b/clang/lib/AST/RecordLayoutBuilder.cpp
index 8d2fe4660a3cd..3e39ec1c718d1 100644
--- a/clang/lib/AST/RecordLayoutBuilder.cpp
+++ b/clang/lib/AST/RecordLayoutBuilder.cpp
@@ -2021,7 +2021,6 @@ void ItaniumRecordLayoutBuilder::LayoutField(const 
FieldDecl *D,
   CharUnits UnpackedFieldAlign =
   !DefaultsToAIXPowerAlignment ? FieldAlign : PreferredAlign;
   CharUnits UnpackedFieldOffset = FieldOffset;
-  CharUnits OriginalFieldAlign = UnpackedFieldAlign;
 
   if (FieldPacked) {
 FieldAlign = CharUnits::One();
@@ -2106,22 +2105,6 @@ void ItaniumRecordLayoutBuilder::LayoutField(const 
FieldDecl *D,
   // Remember max struct/class ABI-specified alignment.
   UnadjustedAlignment = std::max(UnadjustedAlignment, FieldAlign);
   UpdateAlignment(FieldAlign, UnpackedFieldAlign, PreferredAlign);
-
-  // For checking the alignment of inner fields against
-  // the alignment of its parent record.
-  if (const RecordDecl *RD = D->getParent()) {
-// Check if packed attribute or pragma pack is present.
-if (RD->hasAttr() || !MaxFieldAlignment.isZero())
-  if (FieldAlign < OriginalFieldAlign)
-if (D->getType()->isRecordType()) {
-  // If the offset is a multiple of the alignment of
-  // the type, raise the warning.
-  // TODO: Takes no account the alignment of the outer struct
-  if (FieldOffset % OriginalFieldAlign != 0)
-Diag(D->getLocation(), diag::warn_unaligned_access)
-<< Context.getTypeDeclType(RD) << D->getName();
-}
-  }
 }
 
 void ItaniumRecordLayoutBuilder::FinishLayout(const NamedDecl *D) {

diff  --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index 89a77a368ef02..9ffb5d73b2aad 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -221,7 +221,6 @@ getAArch64MicroArchFeaturesFromMcpu(const Driver , 
StringRef Mcpu,
 void aarch64::getAArch64TargetFeatures(const Driver ,
const llvm::Triple ,
const ArgList ,
-   llvm::opt::ArgStringList ,
std::vector ,
bool ForAS) {
   Arg *A;
@@ -465,16 +464,10 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
 
   if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
options::OPT_munaligned_access)) {
-if

[clang] 11c67e5 - [clang][driver] Don't pass -Wunaligned-access to cc1as

2022-01-07 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-01-07T10:45:26Z
New Revision: 11c67e5a4e99f51ec66c9781710f81955cfd5e24

URL: 
https://github.com/llvm/llvm-project/commit/11c67e5a4e99f51ec66c9781710f81955cfd5e24
DIFF: 
https://github.com/llvm/llvm-project/commit/11c67e5a4e99f51ec66c9781710f81955cfd5e24.diff

LOG: [clang][driver] Don't pass -Wunaligned-access to cc1as

This is to fix some failing assembler tests.

Added: 


Modified: 
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/ARM.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index fe62384eeb98d..89a77a368ef02 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -467,11 +467,13 @@ void aarch64::getAArch64TargetFeatures(const Driver ,
options::OPT_munaligned_access)) {
 if (A->getOption().matches(options::OPT_mno_unaligned_access)) {
   Features.push_back("+strict-align");
-  CmdArgs.push_back("-Wunaligned-access");
+  if (!ForAS)
+CmdArgs.push_back("-Wunaligned-access");
 }
   } else if (Triple.isOSOpenBSD()) {
 Features.push_back("+strict-align");
-CmdArgs.push_back("-Wunaligned-access");
+if (!ForAS)
+  CmdArgs.push_back("-Wunaligned-access");
   }
 
   if (Args.hasArg(options::OPT_ffixed_x1))

diff  --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp 
b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
index 69f1a8337517b..1055d7800b63e 100644
--- a/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -771,7 +771,8 @@ void arm::getARMTargetFeatures(const Driver , const 
llvm::Triple ,
   // Kernel code has more strict alignment requirements.
   if (KernelOrKext) {
 Features.push_back("+strict-align");
-CmdArgs.push_back("-Wunaligned-access");
+if (!ForAS)
+  CmdArgs.push_back("-Wunaligned-access");
   } else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
   options::OPT_munaligned_access)) {
 if (A->getOption().matches(options::OPT_munaligned_access)) {
@@ -784,7 +785,8 @@ void arm::getARMTargetFeatures(const Driver , const 
llvm::Triple ,
 D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
 } else {
   Features.push_back("+strict-align");
-  CmdArgs.push_back("-Wunaligned-access");
+  if (!ForAS)
+CmdArgs.push_back("-Wunaligned-access");
 }
   } else {
 // Assume pre-ARMv6 doesn't support unaligned accesses.
@@ -806,17 +808,20 @@ void arm::getARMTargetFeatures(const Driver , const 
llvm::Triple ,
   if (VersionNum < 6 ||
   Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m) {
 Features.push_back("+strict-align");
-CmdArgs.push_back("-Wunaligned-access");
+if (!ForAS)
+  CmdArgs.push_back("-Wunaligned-access");
   }
 } else if (Triple.isOSLinux() || Triple.isOSNaCl() ||
Triple.isOSWindows()) {
   if (VersionNum < 7) {
 Features.push_back("+strict-align");
-CmdArgs.push_back("-Wunaligned-access");
+if (!ForAS)
+  CmdArgs.push_back("-Wunaligned-access");
   }
 } else {
   Features.push_back("+strict-align");
-  CmdArgs.push_back("-Wunaligned-access");
+  if (!ForAS)
+CmdArgs.push_back("-Wunaligned-access");
 }
   }
 



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[clang] 37e6e02 - Re-land "[Clang][ScanDeps] Use the virtual path for module maps"

2022-01-06 Thread Archibald Elliott via cfe-commits


Author: Michael Spencer
Date: 2022-01-06T21:05:05Z
New Revision: 37e6e022d21fc9e188701c684dc0f6a13366ddf9

URL: 
https://github.com/llvm/llvm-project/commit/37e6e022d21fc9e188701c684dc0f6a13366ddf9
DIFF: 
https://github.com/llvm/llvm-project/commit/37e6e022d21fc9e188701c684dc0f6a13366ddf9.diff

LOG: Re-land "[Clang][ScanDeps] Use the virtual path for module maps"

This re-lands:
- 04192422c4e3b730c580498b8e948088cb15580b
- 015e08c6badad6b27404d6f94569e25c18d79049

Which I reverted in ea835171389aa356b865bf9cb72ca8f4f84b64fd in error.

Differential Revision: https://reviews.llvm.org/D114206

Added: 
clang/test/ClangScanDeps/modulemap-via-vfs.m

Modified: 
clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp

Removed: 




diff  --git a/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp 
b/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
index 9229c67c41787..086215e7a573d 100644
--- a/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
+++ b/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
@@ -237,7 +237,13 @@ ModuleID ModuleDepCollectorPP::handleTopLevelModule(const 
Module *M) {
.getHeaderSearchInfo()
.getModuleMap()
.getModuleMapFileForUniquing(M);
-  MD.ClangModuleMapFile = std::string(ModuleMap ? ModuleMap->getName() : "");
+
+  if (ModuleMap) {
+StringRef Path = ModuleMap->tryGetRealPathName();
+if (Path.empty())
+  Path = ModuleMap->getName();
+MD.ClangModuleMapFile = std::string(Path);
+  }
 
   serialization::ModuleFile *MF =
   MDC.ScanInstance.getASTReader()->getModuleManager().lookup(

diff  --git a/clang/test/ClangScanDeps/modulemap-via-vfs.m 
b/clang/test/ClangScanDeps/modulemap-via-vfs.m
new file mode 100644
index 0..b239450a752ec
--- /dev/null
+++ b/clang/test/ClangScanDeps/modulemap-via-vfs.m
@@ -0,0 +1,56 @@
+// RUN: rm -rf %t.dir
+// RUN: split-file %s %t.dir
+// RUN: sed -e "s|DIR|%/t.dir|g" %t.dir/build/compile-commands.json.in > 
%t.dir/build/compile-commands.json
+// RUN: sed -e "s|DIR|%/t.dir|g" %t.dir/build/vfs.yaml.in > 
%t.dir/build/vfs.yaml
+// RUN: clang-scan-deps -compilation-database 
%t.dir/build/compile-commands.json -j 1 -format experimental-full \
+// RUN:   -mode preprocess-minimized-sources -generate-modules-path-args > 
%t.db
+// RUN: %python %S/../../utils/module-deps-to-rsp.py %t.db --module-name=A > 
%t.A.cc1.rsp
+// RUN: cat %t.A.cc1.rsp | sed 's:\?:/:g' | FileCheck %s
+
+// CHECK-NOT: build/module.modulemap
+// CHECK: A/module.modulemap
+
+//--- build/compile-commands.json.in
+
+[
+{
+  "directory": "DIR",
+  "command": "clang DIR/main.m -Imodules/A -fmodules 
-fmodules-cache-path=DIR/module-cache -fimplicit-modules -fimplicit-module-maps 
-ivfsoverlay build/vfs.yaml",
+  "file": "DIR/main.m"
+}
+]
+
+//--- build/module.modulemap
+
+module A {
+  umbrella header "A.h"
+}
+
+//--- modules/A/A.h
+
+typedef int A_t;
+
+//--- build/vfs.yaml.in
+
+{
+  "version": 0,
+  "case-sensitive": "false",
+  "roots": [
+  {
+ "contents": [
+ {
+"external-contents": "DIR/build/module.modulemap",
+"name": "module.modulemap",
+"type": "file"
+ }],
+ "name": "DIR/modules/A",
+ "type": "directory"
+  }
+  ]
+}
+
+//--- main.m
+
+@import A;
+
+A_t a = 0;



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[clang] ea83517 - Revert "[Clang][ScanDeps] Use the virtual path for module maps"

2022-01-05 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-01-05T12:17:06Z
New Revision: ea835171389aa356b865bf9cb72ca8f4f84b64fd

URL: 
https://github.com/llvm/llvm-project/commit/ea835171389aa356b865bf9cb72ca8f4f84b64fd
DIFF: 
https://github.com/llvm/llvm-project/commit/ea835171389aa356b865bf9cb72ca8f4f84b64fd.diff

LOG: Revert "[Clang][ScanDeps] Use the virtual path for module maps"

This reverts commits:
- 04192422c4e3b730c580498b8e948088cb15580b.
- 015e08c6badad6b27404d6f94569e25c18d79049

D114206 was landed before it was approved - and was landed knowing that
the test crashed on windows, without an xfail. The promised follow-up
commit with fixes has not appeared since it was promised on December 14th.

Added: 


Modified: 
clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp

Removed: 
clang/test/ClangScanDeps/modulemap-via-vfs.m



diff  --git a/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp 
b/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
index 086215e7a573d..9229c67c41787 100644
--- a/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
+++ b/clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
@@ -237,13 +237,7 @@ ModuleID ModuleDepCollectorPP::handleTopLevelModule(const 
Module *M) {
.getHeaderSearchInfo()
.getModuleMap()
.getModuleMapFileForUniquing(M);
-
-  if (ModuleMap) {
-StringRef Path = ModuleMap->tryGetRealPathName();
-if (Path.empty())
-  Path = ModuleMap->getName();
-MD.ClangModuleMapFile = std::string(Path);
-  }
+  MD.ClangModuleMapFile = std::string(ModuleMap ? ModuleMap->getName() : "");
 
   serialization::ModuleFile *MF =
   MDC.ScanInstance.getASTReader()->getModuleManager().lookup(

diff  --git a/clang/test/ClangScanDeps/modulemap-via-vfs.m 
b/clang/test/ClangScanDeps/modulemap-via-vfs.m
deleted file mode 100644
index b239450a752ec..0
--- a/clang/test/ClangScanDeps/modulemap-via-vfs.m
+++ /dev/null
@@ -1,56 +0,0 @@
-// RUN: rm -rf %t.dir
-// RUN: split-file %s %t.dir
-// RUN: sed -e "s|DIR|%/t.dir|g" %t.dir/build/compile-commands.json.in > 
%t.dir/build/compile-commands.json
-// RUN: sed -e "s|DIR|%/t.dir|g" %t.dir/build/vfs.yaml.in > 
%t.dir/build/vfs.yaml
-// RUN: clang-scan-deps -compilation-database 
%t.dir/build/compile-commands.json -j 1 -format experimental-full \
-// RUN:   -mode preprocess-minimized-sources -generate-modules-path-args > 
%t.db
-// RUN: %python %S/../../utils/module-deps-to-rsp.py %t.db --module-name=A > 
%t.A.cc1.rsp
-// RUN: cat %t.A.cc1.rsp | sed 's:\?:/:g' | FileCheck %s
-
-// CHECK-NOT: build/module.modulemap
-// CHECK: A/module.modulemap
-
-//--- build/compile-commands.json.in
-
-[
-{
-  "directory": "DIR",
-  "command": "clang DIR/main.m -Imodules/A -fmodules 
-fmodules-cache-path=DIR/module-cache -fimplicit-modules -fimplicit-module-maps 
-ivfsoverlay build/vfs.yaml",
-  "file": "DIR/main.m"
-}
-]
-
-//--- build/module.modulemap
-
-module A {
-  umbrella header "A.h"
-}
-
-//--- modules/A/A.h
-
-typedef int A_t;
-
-//--- build/vfs.yaml.in
-
-{
-  "version": 0,
-  "case-sensitive": "false",
-  "roots": [
-  {
- "contents": [
- {
-"external-contents": "DIR/build/module.modulemap",
-"name": "module.modulemap",
-"type": "file"
- }],
- "name": "DIR/modules/A",
- "type": "directory"
-  }
-  ]
-}
-
-//--- main.m
-
-@import A;
-
-A_t a = 0;



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[clang] 015e08c - [clang][scandeps] Update Module Cache Path in Test

2022-01-05 Thread Archibald Elliott via cfe-commits


Author: Archibald Elliott
Date: 2022-01-05T10:42:38Z
New Revision: 015e08c6badad6b27404d6f94569e25c18d79049

URL: 
https://github.com/llvm/llvm-project/commit/015e08c6badad6b27404d6f94569e25c18d79049
DIFF: 
https://github.com/llvm/llvm-project/commit/015e08c6badad6b27404d6f94569e25c18d79049.diff

LOG: [clang][scandeps] Update Module Cache Path in Test

This fixes the test introduced in D114206 so it no longer writes to the current 
working directory.

Reviewed By: simon_tatham

Differential Revision: https://reviews.llvm.org/D116611

Added: 


Modified: 
clang/test/ClangScanDeps/modulemap-via-vfs.m

Removed: 




diff  --git a/clang/test/ClangScanDeps/modulemap-via-vfs.m 
b/clang/test/ClangScanDeps/modulemap-via-vfs.m
index cc152b63f4831..b239450a752ec 100644
--- a/clang/test/ClangScanDeps/modulemap-via-vfs.m
+++ b/clang/test/ClangScanDeps/modulemap-via-vfs.m
@@ -15,7 +15,7 @@
 [
 {
   "directory": "DIR",
-  "command": "clang DIR/main.m -Imodules/A -fmodules 
-fmodules-cache-path=module-cache -fimplicit-modules -fimplicit-module-maps 
-ivfsoverlay build/vfs.yaml",
+  "command": "clang DIR/main.m -Imodules/A -fmodules 
-fmodules-cache-path=DIR/module-cache -fimplicit-modules -fimplicit-module-maps 
-ivfsoverlay build/vfs.yaml",
   "file": "DIR/main.m"
 }
 ]



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[clang] 97809c8 - [AArch64]Enabling Cortex-A510 Support

2021-10-15 Thread Archibald Elliott via cfe-commits


Author: Mubashar Ahmad
Date: 2021-10-15T14:31:18+01:00
New Revision: 97809c828f8eb5f5e322ee1cbc20f96fd5ef8649

URL: 
https://github.com/llvm/llvm-project/commit/97809c828f8eb5f5e322ee1cbc20f96fd5ef8649
DIFF: 
https://github.com/llvm/llvm-project/commit/97809c828f8eb5f5e322ee1cbc20f96fd5ef8649.diff

LOG: [AArch64]Enabling Cortex-A510 Support

This patch enables support for Cortex-A510 CPUs.

Reviewed By: MarkMurrayARM, dmgreen

Differential Revision: https://reviews.llvm.org/D109825

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/test/Driver/aarch64-cpus.c
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/unittests/Support/TargetParserTest.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 950e9fe726285..6501a4870e2a6 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -177,6 +177,12 @@ X86 Support in Clang
 
 - Support for ``AVX512-FP16`` instructions has been added.
 
+Arm and AArch64 Support in Clang
+
+
+- Support has been added for the following processors (command-line 
identifiers in parentheses):
+  - Arm Cortex-A510 (``cortex-a510``)
+
 Internal API Changes
 
 

diff  --git a/clang/test/Driver/aarch64-cpus.c 
b/clang/test/Driver/aarch64-cpus.c
index 59987440c2173..01c1202288d19 100644
--- a/clang/test/Driver/aarch64-cpus.c
+++ b/clang/test/Driver/aarch64-cpus.c
@@ -392,6 +392,15 @@
 // CA55-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"cortex-a55"
 // CA55-BE-TUNE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic"
 
+// RUN: %clang -target aarch64 -mcpu=cortex-a510 -### -c %s 2>&1 | FileCheck 
-check-prefix=CORTEX-A510 %s
+// CORTEX-A510: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" 
"cortex-a510"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sm4"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}sha3"
+// CORTEX-A510-NOT: "-target-feature" "{{[+-]}}aes"
+// CORTEX-A510-SAME: {{$}}
+// RUN: %clang -target aarch64 -mcpu=cortex-a510+crypto -### -c %s 2>&1 | 
FileCheck -check-prefix=CORTEX-A510-CRYPTO %s
+// CORTEX-A510-CRYPTO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" 
"-target-feature" "+sm4" "-target-feature" "+sha3" "-target-feature" "+sha2" 
"-target-feature" "+aes"
+
 // RUN: %clang -target aarch64_be -mcpu=cortex-a57 -### -c %s 2>&1 | FileCheck 
-check-prefix=CA57-BE %s
 // RUN: %clang -target aarch64 -mbig-endian -mcpu=cortex-a57 -### -c %s 2>&1 | 
FileCheck -check-prefix=CA57-BE %s
 // RUN: %clang -target aarch64_be -mbig-endian -mcpu=cortex-a57 -### -c %s 
2>&1 | FileCheck -check-prefix=CA57-BE %s

diff  --git a/llvm/include/llvm/Support/AArch64TargetParser.def 
b/llvm/include/llvm/Support/AArch64TargetParser.def
index 1e27b0f80dd18..a87d7e83981a6 100644
--- a/llvm/include/llvm/Support/AArch64TargetParser.def
+++ b/llvm/include/llvm/Support/AArch64TargetParser.def
@@ -144,6 +144,10 @@ AARCH64_CPU_NAME("cortex-a53", ARMV8A, 
FK_CRYPTO_NEON_FP_ARMV8, true,
  (AArch64::AEK_CRC))
 AARCH64_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
  (AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | 
AArch64::AEK_RCPC))
+AARCH64_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
+ (AArch64::AEK_BF16 | AArch64::AEK_I8MM | 
AArch64::AEK_SVE2BITPERM |
+  AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
+  AArch64::AEK_SB | AArch64::AEK_FP16FML))
 AARCH64_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
  (AArch64::AEK_CRC))
 AARCH64_CPU_NAME("cortex-a65", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index 4ea1bf2889ba6..d401a9d29bae1 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -634,6 +634,22 @@ def ProcA55 : SubtargetFeature<"a55", "ARMProcFamily", 
"CortexA55",
FeatureFuseAddress,
]>;
 
+def ProcA510: SubtargetFeature<"a510", "ARMProcFamily", "CortexA510",
+   "Cortex-A510 ARM processors", [
+   HasV9_0aOps,
+   FeatureNEON,
+   FeaturePerfMon,
+   FeatureMatMulInt8,
+   FeatureBF16,
+   FeatureAM,
+   FeatureMTE,
+   FeatureETE,
+   FeatureSVE2BitPerm,
+   FeatureFP16FML,
+

[clang] cb7fb73 - [AArch64] Assembly Support for FEAT_GCS/FEAT_CHK

[clang] 4679d7a - [NFC][ARM][AArch64] Cleanup TargetParser includes

[clang-tools-extra] d768bf9 - [NFC][TargetParser] Replace uses of llvm/Support/Host.h

[clang] d768bf9 - [NFC][TargetParser] Replace uses of llvm/Support/Host.h

[clang] 8e3d7cf - [NFC][TargetParser] Remove llvm/Support/TargetParser.h

[clang] b590f99 - [NFC][TargetParser] Remove llvm/Support/X86TargetParser.h

[clang] b9a1c4d - [NFC][TargetParser] Remove llvm/Support/CSKYTargetParser.h

[clang] a4c623e - [NFC][TargetParser] Remove llvm/Support/LoongArchTargetParser.h

[clang] 4ae5400 - [NFC][TargetParser] Remove llvm/Support/ARMTargetParserCommon.h

[clang] 27aeb58 - [NFC][TargetParser] Remove llvm/Support/ARMTargetParser.h

[clang] 8c71229 - [NFC][TargetParser] Remove llvm/Support/AArch64TargetParser.h

[clang] 03ef89f - [AArch64] Check 128-bit Sysreg Builtins

[clang] 82b51a1 - [AArch64] Support SLC in ACLE prefetch intrinsics

[clang] 83b3304 - [AArch64] Implement __arm_rsr128/__arm_wsr128

[clang-tools-extra] 3c97f6c - [Support] Move getHostNumPhysicalCores to Threading.h

[clang-tools-extra] 5577207 - [Support] Move getHostNumPhysicalCores to Threading.h

[clang] 3e9b6ad - [ARM] Move ARM::parseBranchProtection into ARMTargetParserCommon

[clang] 1666f09 - [ARM] Add Support for Cortex-M85

[clang] 2321c36 - [ARM] Don't Enable AES Pass for Generic Cores

[clang] 3a24df9 - [ARM] Pass for Cortex-A57 and Cortex-A72 Fused AES Erratum

[clang] 220da12 - [NFC][Clang][AArch64] Clean up AArch64TargetInfo::hasFeature

[clang] 3aec4b3 - Revert "Unaligned Access Warning Added"

[clang] 11c67e5 - [clang][driver] Don't pass -Wunaligned-access to cc1as

[clang] 37e6e02 - Re-land "[Clang][ScanDeps] Use the virtual path for module maps"

[clang] ea83517 - Revert "[Clang][ScanDeps] Use the virtual path for module maps"

[clang] 015e08c - [clang][scandeps] Update Module Cache Path in Test

[clang] 97809c8 - [AArch64]Enabling Cortex-A510 Support

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