from:"Diogo N. Sampaio via Phabricator via cfe\\\-commits"

[PATCH] D60828: [ARM] Fix armv8 features tree and add fp16fml

2019-04-18 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio marked 5 inline comments as done.
dnsampaio added inline comments.



Comment at: lib/Basic/Targets/ARM.cpp:443
   HasLegalHalfType = true;
+  HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
+  FPU |= VFP4FPU;

ostannard wrote:
> Is it always correct to set HW_FP_DP here, now that MVE can have full fp16 
> without double-precision? I'll add Simon since he's working on that.
If it is V8 and does not have double-precision, isn't that going to use the 
argument `+fp-only-sp` ? That will disable WH_FP_DP  using lines 436 and 456.
```
else if (Feature == "+fp-only-sp") {
HW_FP_remove |= HW_FP_DP;
```
```
HW_FP &= ~HW_FP_remove;
```




Comment at: lib/Basic/Targets/ARM.cpp:444
+  HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;
+  FPU |= VFP4FPU;
 } else if (Feature == "+dotprod") {

ostannard wrote:
> Should this be FPARMV8, since fullfp16 doesn't apply to earlier 
> architectures? Maybe MVE  complicates this even further?
Correct, it should also add FeatureFPARMv8.
See that this is a accumulative flag, as FPARMv8 implies VFP4FPU, both should 
be set.
 Actually, according the backend, `FeatureFPARMv8 -> FeatureVFP4 -> FeatureVFP3 
-> FeatureVFP2`. From my tests we already set FeatureVFP3, but not FeatureVFP4



Comment at: lib/Basic/Targets/ARM.cpp:446
 } else if (Feature == "+dotprod") {
+  FPU |= NeonFPU;
+  HW_FP |= HW_FP_SP | HW_FP_DP;

ostannard wrote:
> Should this also add FPARMV8?
As well, yes.



Comment at: lib/Basic/Targets/ARM.cpp:452
+  HasLegalHalfType = true;
+  FPU |= VFP4FPU;
+  HW_FP |= HW_FP_SP | HW_FP_DP | HW_FP_HP;

ostannard wrote:
> Again, should this be FPARMV8?
True.



Comment at: test/CodeGen/arm_neon_intrinsics.c:8
+// RUN: %clang -O1 -target armv8a-linux-eabi -march=armv8a+fp16fml\
+// RUN:  -S -emit-llvm -o - %s | FileCheck %s.v8
+

ostannard wrote:
> Does the generate code differ enough to have a second copy of it? Actually, I 
> assume the problem here is that we are not setting the correct preprocessor 
> macros? in which case, it would be better to test them directly, than by 
> re-running this 21kloc test.
That indeed seems a better solution.


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[PATCH] D60828: [ARM] Fix armv8 features tree and add fp16fml

2019-04-17 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added reviewers: ostannard, DavidSpickett.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.
Herald added a project: clang.

This patch adds the fp16fml feature parser as well fixes
the FPU and the HW_FP flags when +fullfp16 and +dotprod 
features are passed, to account for pre-requisite features.

The ARM backend (ARM.td) defines this tree of feature dependencies:

   fp16  vfp3
 |  /   |
vfp4neon
 |  \
  fp-armv8   FeatureDotProd
 |
  fullfp16
 |
  fp16fml

However, clang does not capture that when using +fullfp16 we
also have vfp4, so compiling
tools/clang/test/CodeGen/arm_neon_intrinsics.c

with

  clang -target armv8a-linux-eabi -march=armv8.4-a+fp16 -S -emit-llvm

will give an error because vfp4 is not added to the FPU flag.

As test now we can compile that test file with the command

  clang -target armv8a-linux-eabi -march=armv8-a+fp16fml -S -emit-llvm


Repository:
  rC Clang

https://reviews.llvm.org/D60828

Files:
  lib/Basic/Targets/ARM.cpp
  test/CodeGen/arm_neon_intrinsics.c
  test/CodeGen/arm_neon_intrinsics.c.v8



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[PATCH] D60721: [ARM] Check codegen of v8.2a intrinsics

2019-04-16 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio abandoned this revision.
dnsampaio added a comment.

Moved tests to D60720 


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[PATCH] D60721: [ARM] Check codegen of v8.2a intrinsics

2019-04-15 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added reviewers: olista01, miyuki.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.
Herald added a project: clang.
dnsampaio added a parent revision: D60720: [ARM] Add v4f16 and v8f16 types to 
the CallingConv.
ostannard requested changes to this revision.
ostannard added a comment.
This revision now requires changes to proceed.

Clang tests should just cover the C->IR translation, and not depend on the LLVM 
backends. This should instead be an IR->asm test in the LLVM repository.


This patch adds a assembly check for the
ARM v8.2-A intrinsics.


Repository:
  rC Clang

https://reviews.llvm.org/D60721

Files:
  test/CodeGen/arm-v8.2a-neon-intrinsics.c
  test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm

Index: test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm
===
--- /dev/null
+++ test/CodeGen/arm-v8.2a-neon-intrinsics.c.asm
@@ -0,0 +1,1000 @@
+// CHECK-LABEL: test_vabs_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vabs.f16	d16, d16
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vabsq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vabs.f16	q8, q8
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vceqz_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vceq.f16	d16, d16, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vceqzq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vceq.f16	q8, q8, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcgez_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcge.f16	d16, d16, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcgezq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcge.f16	q8, q8, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcgtz_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcgt.f16	d16, d16, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcgtzq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcgt.f16	q8, q8, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vclez_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcle.f16	d16, d16, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vclezq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcle.f16	q8, q8, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcltz_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vclt.f16	d16, d16, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcltzq_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vclt.f16	q8, q8, #0
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvt_f16_s16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.f16.s16	d16, d16
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvtq_f16_s16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.f16.s16	q8, q8
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvt_f16_u16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.f16.u16	d16, d16
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvtq_f16_u16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.f16.u16	q8, q8
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvt_s16_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.s16.f16	d16, d16
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvtq_s16_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d17, r2, r3
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.s16.f16	q8, q8
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	vmov	r2, r3, d17
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL: test_vcvt_u16_f16:
+// CHECK:	.fnstart
+// CHECK-NEXT:	vmov	d16, r0, r1
+// CHECK-NEXT:	vcvt.u16.f16	d16, d16
+// CHECK-NEXT:	vmov	r0, r1, d16
+// CHECK-NEXT:	bx	lr
+// CHECK-LABEL:

[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

2019-04-12 Thread Diogo N. Sampaio via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rL358276: [Aarch64] Add v8.2-a half precision element extract 
intrinsics (authored by dnsampaio, committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60272/new/

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Files:
  cfe/trunk/lib/CodeGen/CGBuiltin.cpp
  cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c


Index: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
===
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp
@@ -7847,6 +7847,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);
Index: cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16(float16x8_t vec) {
+  return vduph_laneq_f16(vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16(float16x4_t vec) {
+  return vduph_lane_f16(vec, 3);
+}


Index: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
===
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp
@@ -7847,6 +7847,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);
Index: cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ cfe/trunk/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16(float16x8_t vec) {
+  return vduph_laneq_f16(vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16(float16x4_t vec) {
+  return vduph_lane_f16(vec, 3);
+}
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[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

2019-04-12 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio updated this revision to Diff 194826.
dnsampaio marked 2 inline comments as done.
dnsampaio added a comment.

- Used clang-format-diff


Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60272/new/

https://reviews.llvm.org/D60272

Files:
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/aarch64-v8.2a-neon-intrinsics.c


Index: test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16(float16x8_t vec) {
+  return vduph_laneq_f16(vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16(float16x4_t vec) {
+  return vduph_lane_f16(vec, 3);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -7810,6 +7810,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);


Index: test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16(float16x8_t vec) {
+  return vduph_laneq_f16(vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16(float16x4_t vec) {
+  return vduph_lane_f16(vec, 3);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -7810,6 +7810,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16: {
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);
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[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

2019-04-11 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio added a comment.

Ping


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[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

2019-04-04 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added reviewers: pablooliveira, olista01, LukeGeeson.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.
Herald added a project: clang.

Implements the intrinsics define on the ACLE to extract half precision fp 
scalar elements from float16x4_t and float16x8_t vector types.
a.k.a:
vduph_lane_f16
vduph_laneq_f16


Repository:
  rC Clang

https://reviews.llvm.org/D60272

Files:
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/aarch64-v8.2a-neon-intrinsics.c


Index: test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16 (float16x8_t vec) {
+return vduph_laneq_f16 (vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16 (float16x4_t vec) {
+return vduph_lane_f16 (vec, 3);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -7810,6 +7810,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16:{
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16:{
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);


Index: test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
===
--- test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
+++ test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
@@ -1618,3 +1618,16 @@
   return vtrn2q_f16(a, b);
 }
 
+// CHECK-LABEL: @test_vduph_laneq_f16(
+// CHECK:[[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_laneq_f16 (float16x8_t vec) {
+return vduph_laneq_f16 (vec, 7);
+}
+
+// CHECK-LABEL: @test_vduph_lane_f16(
+// CHECK:[[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
+// CHECK-NEXT:   ret half [[V]]
+float16_t test_vduph_lane_f16 (float16x4_t vec) {
+return vduph_lane_f16 (vec, 3);
+}
Index: lib/CodeGen/CGBuiltin.cpp
===
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -7810,6 +7810,14 @@
   : Intrinsic::aarch64_neon_sqsub;
 return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
   }
+  case NEON::BI__builtin_neon_vduph_lane_f16:{
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vget_lane");
+  }
+  case NEON::BI__builtin_neon_vduph_laneq_f16:{
+return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
+"vgetq_lane");
+  }
   }
 
   llvm::VectorType *VTy = GetNeonType(this, Type);
___
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[PATCH] D57060: [NFC][Clang] Add driver tests for sb and predres

2019-01-25 Thread Diogo N. Sampaio via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rC352203: [NFC][Clang] Add driver tests for sb and predres 
(authored by dnsampaio, committed by ).

Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D57060/new/

https://reviews.llvm.org/D57060

Files:
  test/Driver/aarch64-predres.c
  test/Driver/arm-sb.c


Index: test/Driver/aarch64-predres.c
===
--- test/Driver/aarch64-predres.c
+++ test/Driver/aarch64-predres.c
@@ -0,0 +1,11 @@
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+predres 
%s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+predres"
+// CHECK-NOT: "-target-feature" "-predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nopredres 
%s 2>&1 | FileCheck %s --check-prefix=NOPR
+// NOPR: "-target-feature" "-predres"
+// NOPR-NOT: "-target-feature" "+predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi   
%s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+predres"
+// ABSENT-NOT: "-target-feature" "-predres"
Index: test/Driver/arm-sb.c
===
--- test/Driver/arm-sb.c
+++ test/Driver/arm-sb.c
@@ -0,0 +1,14 @@
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | 
FileCheck %s
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+sb %s 2>&1 | 
FileCheck %s
+// CHECK: "-target-feature" "+sb"
+// CHECK-NOT: "-target-feature" "-sb"
+
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | 
FileCheck %s --check-prefix=NOSB
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nosb %s 
2>&1 | FileCheck %s --check-prefix=NOSB
+// NOSB: "-target-feature" "-sb"
+// NOSB-NOT: "-target-feature" "+sb"
+
+// RUN: %clang -### -target arm-none-none-eabi %s 2>&1 | FileCheck %s 
--check-prefix=ABSENT
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s 
--check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+sb"
+// ABSENT-NOT: "-target-feature" "-sb"


Index: test/Driver/aarch64-predres.c
===
--- test/Driver/aarch64-predres.c
+++ test/Driver/aarch64-predres.c
@@ -0,0 +1,11 @@
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+predres %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+predres"
+// CHECK-NOT: "-target-feature" "-predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nopredres %s 2>&1 | FileCheck %s --check-prefix=NOPR
+// NOPR: "-target-feature" "-predres"
+// NOPR-NOT: "-target-feature" "+predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi   %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+predres"
+// ABSENT-NOT: "-target-feature" "-predres"
Index: test/Driver/arm-sb.c
===
--- test/Driver/arm-sb.c
+++ test/Driver/arm-sb.c
@@ -0,0 +1,14 @@
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+sb"
+// CHECK-NOT: "-target-feature" "-sb"
+
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | FileCheck %s --check-prefix=NOSB
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | FileCheck %s --check-prefix=NOSB
+// NOSB: "-target-feature" "-sb"
+// NOSB-NOT: "-target-feature" "+sb"
+
+// RUN: %clang -### -target arm-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+sb"
+// ABSENT-NOT: "-target-feature" "-sb"
___
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[PATCH] D57060: [NFC][Clang] Add driver tests for sb and predres

2019-01-22 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added a reviewer: pbarrio.
Herald added subscribers: cfe-commits, javed.absar.

Add tests that arguments for enabling/disabling sb and predres are correctly 
being or not passed by the driver.


Repository:
  rC Clang

https://reviews.llvm.org/D57060

Files:
  test/Driver/aarch64-predres.c
  test/Driver/arm-sb.c


Index: test/Driver/arm-sb.c
===
--- /dev/null
+++ test/Driver/arm-sb.c
@@ -0,0 +1,14 @@
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | 
FileCheck %s
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+sb %s 2>&1 | 
FileCheck %s
+// CHECK: "-target-feature" "+sb"
+// CHECK-NOT: "-target-feature" "-sb"
+
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | 
FileCheck %s --check-prefix=NOSB
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nosb %s 
2>&1 | FileCheck %s --check-prefix=NOSB
+// NOSB: "-target-feature" "-sb"
+// NOSB-NOT: "-target-feature" "+sb"
+
+// RUN: %clang -### -target arm-none-none-eabi %s 2>&1 | FileCheck %s 
--check-prefix=ABSENT
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s 
--check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+sb"
+// ABSENT-NOT: "-target-feature" "-sb"
Index: test/Driver/aarch64-predres.c
===
--- /dev/null
+++ test/Driver/aarch64-predres.c
@@ -0,0 +1,11 @@
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+predres 
%s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+predres"
+// CHECK-NOT: "-target-feature" "-predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nopredres 
%s 2>&1 | FileCheck %s --check-prefix=NOPR
+// NOPR: "-target-feature" "-predres"
+// NOPR-NOT: "-target-feature" "+predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi   
%s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+predres"
+// ABSENT-NOT: "-target-feature" "-predres"


Index: test/Driver/arm-sb.c
===
--- /dev/null
+++ test/Driver/arm-sb.c
@@ -0,0 +1,14 @@
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+sb %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+sb"
+// CHECK-NOT: "-target-feature" "-sb"
+
+// RUN: %clang -### -target arm-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | FileCheck %s --check-prefix=NOSB
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nosb %s 2>&1 | FileCheck %s --check-prefix=NOSB
+// NOSB: "-target-feature" "-sb"
+// NOSB-NOT: "-target-feature" "+sb"
+
+// RUN: %clang -### -target arm-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// RUN: %clang -### -target aarch64-none-none-eabi %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+sb"
+// ABSENT-NOT: "-target-feature" "-sb"
Index: test/Driver/aarch64-predres.c
===
--- /dev/null
+++ test/Driver/aarch64-predres.c
@@ -0,0 +1,11 @@
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8a+predres %s 2>&1 | FileCheck %s
+// CHECK: "-target-feature" "+predres"
+// CHECK-NOT: "-target-feature" "-predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi -march=armv8.5a+nopredres %s 2>&1 | FileCheck %s --check-prefix=NOPR
+// NOPR: "-target-feature" "-predres"
+// NOPR-NOT: "-target-feature" "+predres"
+
+// RUN: %clang -### -target aarch64-none-none-eabi   %s 2>&1 | FileCheck %s --check-prefix=ABSENT
+// ABSENT-NOT: "-target-feature" "+predres"
+// ABSENT-NOT: "-target-feature" "-predres"
___
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[PATCH] D54148: [NFC][Clang][Aarch64] Add missing test file

2018-11-07 Thread Diogo N. Sampaio via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rL346303: [NFC][Clang][Aarch64] Add missing test file 
(authored by dnsampaio, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D54148?vs=172743=172918#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D54148

Files:
  cfe/trunk/test/Driver/aarch64-security-options.c


Index: cfe/trunk/test/Driver/aarch64-security-options.c
===
--- cfe/trunk/test/Driver/aarch64-security-options.c
+++ cfe/trunk/test/Driver/aarch64-security-options.c
@@ -0,0 +1,54 @@
+// Check the -msign-return-address= option, which has a required argument to
+// select scope.
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-OFF  --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all 
 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// Check that the -msign-return-address= option can also accept the signing key
+// to use.
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-B 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all 
   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-B 
--check-prefix=BTE-OFF
+
+// -mbranch-protection with standard
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-mbranch-protection=standard2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A 
--check-prefix=BTE-ON
+
+// If the -msign-return-address and -mbranch-protection are both used, the
+// right-most one controls return address signing.
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf -mbranch-protection=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CONFLICT
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-mbranch-protection=pac-ret -msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CONFLICT
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=foo 
2>&1 | \
+// RUN: FileCheck %s --check-prefix=BAD-RA-PROTECTION
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -mbranch-protection=bar   
  2>&1 | \
+// RUN: FileCheck %s --check-prefix=BAD-BP-PROTECTION
+
+// RA-OFF: "-msign-return-address=none"
+// RA-NON-LEAF: "-msign-return-address=non-leaf"
+// RA-ALL: "-msign-return-address=all"
+
+// KEY-A: "-msign-return-address-key=a_key"
+
+// BTE-OFF-NOT: "-mbranch-target-enforce"
+// BTE-ON: "-mbranch-target-enforce"
+
+// CONFLICT: "-msign-return-address=none"
+
+// BAD-RA-PROTECTION: invalid branch protection option 'foo' in 
'-msign-return-address={{.*}}'
+// BAD-BP-PROTECTION: invalid branch protection option 'bar' in 
'-mbranch-protection={{.*}}'
+
+// BAD-B-KEY-COMBINATION: invalid branch protection option 'b-key' in 
'-mbranch-protection={{.*}}'
+// BAD-LEAF-COMBINATION: invalid branch protection option 'leaf' in 
'-mbranch-protection={{.*}}'


Index: cfe/trunk/test/Driver/aarch64-security-options.c
===
--- cfe/trunk/test/Driver/aarch64-security-options.c
+++ cfe/trunk/test/Driver/aarch64-security-options.c
@@ -0,0 +1,54 @@
+// Check the -msign-return-address= option, which has a required argument to
+// select scope.
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-OFF  --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=non-leaf 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all  2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// Check that the -msign-return-address= option can also accept the signing key
+// to use.
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=non-leaf   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-B --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -###

[PATCH] D54148: [NFC][Clang][Aarch64] Add missing test file

2018-11-06 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added a reviewer: olista01.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.

The commit https://reviews.llvm.org/rL345273 by @LukeCheeseman has a missing 
test file, see https://reviews.llvm.org/D51429.
This patch adds the missing test file.


Repository:
  rC Clang

https://reviews.llvm.org/D54148

Files:
  test/Driver/aarch64-security-options.c


Index: test/Driver/aarch64-security-options.c
===
--- /dev/null
+++ test/Driver/aarch64-security-options.c
@@ -0,0 +1,54 @@
+// Check the -msign-return-address= option, which has a required argument to
+// select scope.
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-OFF  --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all 
 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-A 
--check-prefix=BTE-OFF
+
+// Check that the -msign-return-address= option can also accept the signing key
+// to use.
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-B 
--check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all 
   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-B 
--check-prefix=BTE-OFF
+
+// -mbranch-protection with standard
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-mbranch-protection=standard2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A 
--check-prefix=BTE-ON
+
+// If the -msign-return-address and -mbranch-protection are both used, the
+// right-most one controls return address signing.
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-msign-return-address=non-leaf -mbranch-protection=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CONFLICT
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### 
-mbranch-protection=pac-ret -msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=CONFLICT
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=foo 
2>&1 | \
+// RUN: FileCheck %s --check-prefix=BAD-RA-PROTECTION
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -mbranch-protection=bar   
  2>&1 | \
+// RUN: FileCheck %s --check-prefix=BAD-BP-PROTECTION
+
+// RA-OFF: "-msign-return-address=none"
+// RA-NON-LEAF: "-msign-return-address=non-leaf"
+// RA-ALL: "-msign-return-address=all"
+
+// KEY-A: "-msign-return-address-key=a_key"
+
+// BTE-OFF-NOT: "-mbranch-target-enforce"
+// BTE-ON: "-mbranch-target-enforce"
+
+// CONFLICT: "-msign-return-address=none"
+
+// BAD-RA-PROTECTION: invalid branch protection option 'foo' in 
'-msign-return-address={{.*}}'
+// BAD-BP-PROTECTION: invalid branch protection option 'bar' in 
'-mbranch-protection={{.*}}'
+
+// BAD-B-KEY-COMBINATION: invalid branch protection option 'b-key' in 
'-mbranch-protection={{.*}}'
+// BAD-LEAF-COMBINATION: invalid branch protection option 'leaf' in 
'-mbranch-protection={{.*}}'


Index: test/Driver/aarch64-security-options.c
===
--- /dev/null
+++ test/Driver/aarch64-security-options.c
@@ -0,0 +1,54 @@
+// Check the -msign-return-address= option, which has a required argument to
+// select scope.
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=none 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-OFF  --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=non-leaf 2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all  2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-A --check-prefix=BTE-OFF
+
+// Check that the -msign-return-address= option can also accept the signing key
+// to use.
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=non-leaf   2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-B --check-prefix=BTE-OFF
+
+// RUN: %clang -target aarch64--none-eabi -c %s -### -msign-return-address=all2>&1 | \
+// RUN: FileCheck %s --check-prefix=RA-ALL  --check-prefix=KEY-B

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-07 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio added a comment.

In https://reviews.llvm.org/D51683#1226329, @joerg wrote:

> Correct. The protected name is double underscore as both suffix and prefix.


Ok, fixed. Cheers.


https://reviews.llvm.org/D51683



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[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-06 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio updated this revision to Diff 164199.

https://reviews.llvm.org/D51683

Files:
  test/Headers/arm-fp16-header.c
  test/Headers/arm-neon-header.c


Index: test/Headers/arm-neon-header.c
===
--- test/Headers/arm-neon-header.c
+++ test/Headers/arm-neon-header.c
@@ -2,23 +2,22 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -fno-lax-vector-conversions -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
-// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
 
-// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
 
 #include 
-
Index: test/Headers/arm-fp16-header.c
===
--- test/Headers/arm-fp16-header.c
+++ test/Headers/arm-fp16-header.c
@@ -1,19 +1,19 @@
-// RUN: %clang -fsyntax-only  -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only  -ffreestanding  
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-06 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio updated this revision to Diff 164196.
dnsampaio added a comment.

Fix test march triple.


https://reviews.llvm.org/D51683

Files:
  test/Headers/arm-fp16-header.c
  test/Headers/arm-neon-header.c


Index: test/Headers/arm-neon-header.c
===
--- test/Headers/arm-neon-header.c
+++ test/Headers/arm-neon-header.c
@@ -2,23 +2,23 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -fno-lax-vector-conversions -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
-// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
 
-// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only   -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
 
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64_be-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
 
 #include 
 
Index: test/Headers/arm-fp16-header.c
===
--- test/Headers/arm-fp16-header.c
+++ test/Headers/arm-fp16-header.c
@@ -1,19 +1,19 @@
-// RUN: %clang -fsyntax-only  -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
-// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+// RUN: %clang -fsyntax-only  -ffreestanding  
--target=aarch64-none-none-eabi

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-06 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio added inline comments.



Comment at: cfe/trunk/utils/TableGen/NeonEmitter.cpp:2412
 
-  OS << "#define __ai static inline __attribute__((__always_inline__, "
+  OS << "#define __ai static __inline __attribute__((__always_inline__, "
 "__nodebug__))\n\n";

joerg wrote:
> If you want to change it, at least change it properly to use __inline__.
Sorry, I don't get the suggestion. Do you mean test if it is C89 and use 
__inline, else, use inline?


Repository:
  rL LLVM

https://reviews.llvm.org/D51683



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[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-05 Thread Diogo N. Sampaio via Phabricator via cfe-commits

This revision was automatically updated to reflect the committed changes.
Closed by commit rL341475: Fix arm_neon.h and arm_fp16.h generation for 
compiling with std=c89 (authored by dnsampaio, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D51683?vs=164033=164043#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D51683

Files:
  cfe/trunk/test/Headers/arm-fp16-header.c
  cfe/trunk/test/Headers/arm-neon-header.c
  cfe/trunk/utils/TableGen/NeonEmitter.cpp


Index: cfe/trunk/test/Headers/arm-neon-header.c
===
--- cfe/trunk/test/Headers/arm-neon-header.c
+++ cfe/trunk/test/Headers/arm-neon-header.c
@@ -2,4 +2,23 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -fno-lax-vector-conversions -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
 #include 
+
Index: cfe/trunk/test/Headers/arm-fp16-header.c
===
--- cfe/trunk/test/Headers/arm-fp16-header.c
+++ cfe/trunk/test/Headers/arm-fp16-header.c
@@ -0,0 +1,19 @@
+// RUN: %clang -fsyntax-only  -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
+#include 
Index: cfe/trunk/utils/TableGen/NeonEmitter.cpp

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

2018-09-05 Thread Diogo N. Sampaio via Phabricator via cfe-commits

dnsampaio created this revision.
dnsampaio added reviewers: pbarrio, SjoerdMeijer.
Herald added a reviewer: javed.absar.
Herald added subscribers: cfe-commits, chrib, kristof.beyls.

The **inline** attribute is not valid for C standard 89. Replace the argument 
in the generation of header files with **__inline**, as well adding tests for 
both header files.


Repository:
  rC Clang

https://reviews.llvm.org/D51683

Files:
  test/Headers/arm-fp16-header.c
  test/Headers/arm-neon-header.c
  utils/TableGen/NeonEmitter.cpp


Index: utils/TableGen/NeonEmitter.cpp
===
--- utils/TableGen/NeonEmitter.cpp
+++ utils/TableGen/NeonEmitter.cpp
@@ -2409,7 +2409,7 @@
 OS << "#endif\n";
   OS << "\n";
 
-  OS << "#define __ai static inline __attribute__((__always_inline__, "
+  OS << "#define __ai static __inline __attribute__((__always_inline__, "
 "__nodebug__))\n\n";
 
   SmallVector Defs;
@@ -2518,7 +2518,7 @@
 
   OS << "typedef __fp16 float16_t;\n";
 
-  OS << "#define __ai static inline __attribute__((__always_inline__, "
+  OS << "#define __ai static __inline __attribute__((__always_inline__, "
 "__nodebug__))\n\n";
 
   SmallVector Defs;
Index: test/Headers/arm-neon-header.c
===
--- test/Headers/arm-neon-header.c
+++ test/Headers/arm-neon-header.c
@@ -2,4 +2,23 @@
 // RUN: %clang_cc1 -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -fno-lax-vector-conversions -ffreestanding %s
 // RUN: %clang_cc1 -x c++ -triple thumbv7-apple-darwin10 -target-cpu cortex-a8 
-fsyntax-only -Wvector-conversions -ffreestanding %s
 
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++ %s
+
 #include 
+
Index: test/Headers/arm-fp16-header.c
===
--- /dev/null
+++ test/Headers/arm-fp16-header.c
@@ -0,0 +1,19 @@
+// RUN: %clang -fsyntax-only  -ffreestanding --target=aarch64-arm-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -ffreestanding --target=aarch64-armeb-none-eabi 
-march=armv8.2-a+fp16 -std=c89 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c99 -xc %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-armeb-none-eabi -march=armv8.2-a+fp16 -std=c11 -xc %s
+
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++98 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++11 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++14 -xc++ %s
+// RUN: %clang -fsyntax-only -Wall -Werror -ffreestanding 
--target=aarch64-arm-none-eabi -march=armv8.2-a+fp16 -std=c++17 -xc++

[PATCH] D60828: [ARM] Fix armv8 features tree and add fp16fml

[PATCH] D60828: [ARM] Fix armv8 features tree and add fp16fml

[PATCH] D60721: [ARM] Check codegen of v8.2a intrinsics

[PATCH] D60721: [ARM] Check codegen of v8.2a intrinsics

[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

[PATCH] D60272: [Aarch64] Add v8.2-a half precision element extract intrinsics

[PATCH] D57060: [NFC][Clang] Add driver tests for sb and predres

[PATCH] D57060: [NFC][Clang] Add driver tests for sb and predres

[PATCH] D54148: [NFC][Clang][Aarch64] Add missing test file

[PATCH] D54148: [NFC][Clang][Aarch64] Add missing test file

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

[PATCH] D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89

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