[clang] 88b7b76 - [AVR][clang] Pass the address of the data section to the linker for ATmega328

2020-10-28 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-10-29T06:35:15+13:00
New Revision: 88b7b76a0b2365fe4ea9f686c6346667bfe48488

URL: 
https://github.com/llvm/llvm-project/commit/88b7b76a0b2365fe4ea9f686c6346667bfe48488
DIFF: 
https://github.com/llvm/llvm-project/commit/88b7b76a0b2365fe4ea9f686c6346667bfe48488.diff

LOG: [AVR][clang] Pass the address of the data section to the linker for 
ATmega328

This patch modifies the Clang AVR toolchain so that it always passes
the '-Tdata=0x800100' to the linker for ATmega328 devices. This matches
AVR-GCC behaviour, and also corresponds to the address of the start of
the data section in data space according to the ATmega328 datasheet.

Without this, clang does not produce a valid ATmega328 binary.

When targeting all non-ATmega328 chips, a warning will be emitted due to
the fact that proper handling for the chips data section address is
not yet implemented.

I've held off adding other microcontrollers for now, mostly because the
AVR toolchain logic is smeared across LLVM core TableGen files, and two Clang
libraries. The 'family detection' logic is also only implemented for
ATmega328 at the moment, for similar reasons.

In the future, I aim to write an RFC to llvm-dev to find a better way
for LLVM to expose target-specific details such as these to compiler
frontends.

Differential Revision: https://reviews.llvm.org/D86629

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticDriverKinds.td
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index 5336e7648001..a45d9e8ee788 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -44,6 +44,10 @@ def warn_drv_avr_libc_not_found: Warning<
 def warn_drv_avr_family_linking_stdlibs_not_implemented: Warning<
   "support for linking stdlibs for microcontroller '%0' is not implemented">,
   InGroup;
+def warn_drv_avr_linker_section_addresses_not_implemented: Warning<
+  "support for passing the data section address to the linker for "
+  "microcontroller '%0' is not implemented">,
+  InGroup;
 def warn_drv_avr_stdlib_not_linked: Warning<
   "standard library not linked and so no interrupt vector table or "
   "compiler runtime routines will be linked">,

diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index 02b745c6a205..dfe3561cce46 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -13,6 +13,7 @@
 #include "clang/Driver/DriverDiagnostic.h"
 #include "clang/Driver/Options.h"
 #include "llvm/ADT/Optional.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/SubtargetFeature.h"
@@ -29,13 +30,20 @@ namespace {
 
 // TODO: Consider merging this into the AVR device table
 // array in Targets/AVR.cpp.
-llvm::Optional GetMcuFamilyName(StringRef MCU) {
+llvm::Optional GetMCUFamilyName(StringRef MCU) {
   return llvm::StringSwitch>(MCU)
   .Case("atmega328", Optional("avr5"))
   .Case("atmega328p", Optional("avr5"))
   .Default(Optional());
 }
 
+llvm::Optional GetMCUSectionAddressData(StringRef MCU) {
+  return llvm::StringSwitch>(MCU)
+  .Case("atmega328", Optional(0x800100))
+  .Case("atmega328p", Optional(0x800100))
+  .Default(Optional());
+}
+
 const StringRef PossibleAVRLibcLocations[] = {
 "/usr/avr",
 "/usr/lib/avr",
@@ -59,7 +67,7 @@ AVRToolChain::AVRToolChain(const Driver , const 
llvm::Triple ,
   // We cannot link any standard libraries without an MCU specified.
   D.Diag(diag::warn_drv_avr_mcu_not_specified);
 } else {
-  Optional FamilyName = GetMcuFamilyName(CPU);
+  Optional FamilyName = GetMCUFamilyName(CPU);
   Optional AVRLibcRoot = findAVRLibcInstallation();
 
   if (!FamilyName.hasValue()) {
@@ -102,7 +110,8 @@ void AVR::Linker::ConstructJob(Compilation , const 
JobAction ,
const char *LinkingOutput) const {
   // Compute information about the target AVR.
   std::string CPU = getCPUName(Args, getToolChain().getTriple());
-  llvm::Optional FamilyName = GetMcuFamilyName(CPU);
+  llvm::Optional FamilyName = GetMCUFamilyName(CPU);
+  llvm::Optional SectionAddressData = GetMCUSectionAddressData(CPU);
 
   std::string Linker = getToolChain().GetProgramPath(getShortName());
   ArgStringList CmdArgs;
@@ -118,6 +127,17 @@ void AVR::Linker::ConstructJob(Compilation , const 
JobAction ,
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   getToolChain().AddFilePathLibArgs(Args, CmdArgs);
 
+  if (SectionAddressData.hasValue()) {
+std::string DataSectionArg = std::string("-Tdata=0x") +
+ 
llvm::utohexstr(SectionAddressData.getValue());
+

[clang] 15b9dc4 - Revert "[AVR] Explicitly set the address of the data section when invoking the linker"

2020-06-23 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-06-23T22:23:05+12:00
New Revision: 15b9dc46c6d2eed64dc72143172f5fb0d4049f33

URL: 
https://github.com/llvm/llvm-project/commit/15b9dc46c6d2eed64dc72143172f5fb0d4049f33
DIFF: 
https://github.com/llvm/llvm-project/commit/15b9dc46c6d2eed64dc72143172f5fb0d4049f33.diff

LOG: Revert "[AVR] Explicitly set the address of the data section when invoking 
the linker"

This reverts commit ede6005e7092ddae454e4d365d8adefeaec1f5e3.

Ayke suggests this value varies chip-by-chip, and thus it is not safe to
hardcode to 0x800100.

Proper logic for this linker parameter will have to be wired up in a
follow up patch.

Added: 


Modified: 
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index a86d6fa9f357..d1006796d595 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -118,13 +118,6 @@ void AVR::Linker::ConstructJob(Compilation , const 
JobAction ,
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   getToolChain().AddFilePathLibArgs(Args, CmdArgs);
 
-  //   "Not [sic] that addr must be offset by adding 0x80 the to
-  //real SRAM address so that the linker knows that the address
-  //is in the SRAM memory space."
-  //
-  //  - https://www.nongnu.org/avr-libc/user-manual/mem_sections.html
-  CmdArgs.push_back("-Tdata=0x800100");
-
   // If the family name is known, we can link with the device-specific libgcc.
   // Without it, libgcc will simply not be linked. This matches avr-gcc
   // behavior.



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[clang] 01741d6 - [AVR] Remove duplicate specification of lib directory

2020-06-18 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-06-19T17:39:18+12:00
New Revision: 01741d6dbec11c0a0c8e610f0033831735c78d1e

URL: 
https://github.com/llvm/llvm-project/commit/01741d6dbec11c0a0c8e610f0033831735c78d1e
DIFF: 
https://github.com/llvm/llvm-project/commit/01741d6dbec11c0a0c8e610f0033831735c78d1e.diff

LOG: [AVR] Remove duplicate specification of lib directory

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: Jim, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77334

This was originally committed in
03b0831144a9fe25aac81498b0a1dec82f4ec5df but I missed the commit
attribution.

Patch by Dennis van der Schagt.

Added: 


Modified: 
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index 04655d5b1885..a86d6fa9f357 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -77,8 +77,6 @@ AVRToolChain::AVRToolChain(const Driver , const 
llvm::Triple ,
 std::string GCCRoot = std::string(GCCInstallation.getInstallPath());
 std::string LibcRoot = AVRLibcRoot.getValue();
 
-getFilePaths().push_back(LibcRoot + std::string("/lib/") +
- std::string(*FamilyName));
 getFilePaths().push_back(LibcRoot + std::string("/lib/") +
  std::string(*FamilyName));
 getFilePaths().push_back(GCCRoot + std::string("/") +



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[clang] aeaa09e - Revert "[AVR] Remove duplicate specification of lib directory"

2020-06-18 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-06-19T17:37:15+12:00
New Revision: aeaa09ec10ee41ef2469f4d69320d386d492bf23

URL: 
https://github.com/llvm/llvm-project/commit/aeaa09ec10ee41ef2469f4d69320d386d492bf23
DIFF: 
https://github.com/llvm/llvm-project/commit/aeaa09ec10ee41ef2469f4d69320d386d492bf23.diff

LOG: Revert "[AVR] Remove duplicate specification of lib directory"

This reverts commit 03b0831144a9fe25aac81498b0a1dec82f4ec5df.

I forgot to attribute the commit originally so I am recommitting in a
subsequent patch.

Added: 


Modified: 
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index a86d6fa9f357..04655d5b1885 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -77,6 +77,8 @@ AVRToolChain::AVRToolChain(const Driver , const 
llvm::Triple ,
 std::string GCCRoot = std::string(GCCInstallation.getInstallPath());
 std::string LibcRoot = AVRLibcRoot.getValue();
 
+getFilePaths().push_back(LibcRoot + std::string("/lib/") +
+ std::string(*FamilyName));
 getFilePaths().push_back(LibcRoot + std::string("/lib/") +
  std::string(*FamilyName));
 getFilePaths().push_back(GCCRoot + std::string("/") +



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[clang] 03b0831 - [AVR] Remove duplicate specification of lib directory

2020-06-18 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-06-19T17:35:09+12:00
New Revision: 03b0831144a9fe25aac81498b0a1dec82f4ec5df

URL: 
https://github.com/llvm/llvm-project/commit/03b0831144a9fe25aac81498b0a1dec82f4ec5df
DIFF: 
https://github.com/llvm/llvm-project/commit/03b0831144a9fe25aac81498b0a1dec82f4ec5df.diff

LOG: [AVR] Remove duplicate specification of lib directory

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: Jim, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77334

Added: 


Modified: 
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index 04655d5b1885..a86d6fa9f357 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -77,8 +77,6 @@ AVRToolChain::AVRToolChain(const Driver , const 
llvm::Triple ,
 std::string GCCRoot = std::string(GCCInstallation.getInstallPath());
 std::string LibcRoot = AVRLibcRoot.getValue();
 
-getFilePaths().push_back(LibcRoot + std::string("/lib/") +
- std::string(*FamilyName));
 getFilePaths().push_back(LibcRoot + std::string("/lib/") +
  std::string(*FamilyName));
 getFilePaths().push_back(GCCRoot + std::string("/") +



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[clang] ede6005 - [AVR] Explicitly set the address of the data section when invoking the linker

2020-05-17 Thread Dylan McKay via cfe-commits 

Author: Dylan McKay
Date: 2020-05-18T02:24:51+12:00
New Revision: ede6005e7092ddae454e4d365d8adefeaec1f5e3

URL: 
https://github.com/llvm/llvm-project/commit/ede6005e7092ddae454e4d365d8adefeaec1f5e3
DIFF: 
https://github.com/llvm/llvm-project/commit/ede6005e7092ddae454e4d365d8adefeaec1f5e3.diff

LOG: [AVR] Explicitly set the address of the data section when invoking the 
linker

This is required to get avr-gdb correctly showing values at the right
addresses. This problem was discovered by using debug symbols in an
external program to lookup values in an AVR simulator.

Added: 


Modified: 
clang/lib/Driver/ToolChains/AVR.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AVR.cpp 
b/clang/lib/Driver/ToolChains/AVR.cpp
index 6405db1a11a9..04655d5b1885 100644
--- a/clang/lib/Driver/ToolChains/AVR.cpp
+++ b/clang/lib/Driver/ToolChains/AVR.cpp
@@ -120,6 +120,13 @@ void AVR::Linker::ConstructJob(Compilation , const 
JobAction ,
   Args.AddAllArgs(CmdArgs, options::OPT_L);
   getToolChain().AddFilePathLibArgs(Args, CmdArgs);
 
+  //   "Not [sic] that addr must be offset by adding 0x80 the to
+  //real SRAM address so that the linker knows that the address
+  //is in the SRAM memory space."
+  //
+  //  - https://www.nongnu.org/avr-libc/user-manual/mem_sections.html
+  CmdArgs.push_back("-Tdata=0x800100");
+
   // If the family name is known, we can link with the device-specific libgcc.
   // Without it, libgcc will simply not be linked. This matches avr-gcc
   // behavior.



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[clang] 57fd86d - [AVR] Fix function pointer address space

2020-04-01 Thread Dylan McKay via cfe-commits 

Author: Vlastimil Labsky
Date: 2020-04-01T21:08:37+13:00
New Revision: 57fd86de879cf2b4c7001b6d0a09df60877ce24d

URL: 
https://github.com/llvm/llvm-project/commit/57fd86de879cf2b4c7001b6d0a09df60877ce24d
DIFF: 
https://github.com/llvm/llvm-project/commit/57fd86de879cf2b4c7001b6d0a09df60877ce24d.diff

LOG: [AVR] Fix function pointer address space

Summary:
Function pointers should be created with program address space.
This fixes function pointers on AVR.

Reviewers: dylanmckay

Reviewed By: dylanmckay

Subscribers: Jim, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77119

Added: 


Modified: 
clang/lib/CodeGen/CodeGenTypes.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CodeGenTypes.cpp 
b/clang/lib/CodeGen/CodeGenTypes.cpp
index befd80de96f0..29adc2c7adb3 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -595,7 +595,11 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
 llvm::Type *PointeeType = ConvertTypeForMem(ETy);
 if (PointeeType->isVoidTy())
   PointeeType = llvm::Type::getInt8Ty(getLLVMContext());
-unsigned AS = Context.getTargetAddressSpace(ETy);
+
+unsigned AS = PointeeType->isFunctionTy()
+  ? getDataLayout().getProgramAddressSpace()
+  : Context.getTargetAddressSpace(ETy);
+
 ResultType = llvm::PointerType::get(PointeeType, AS);
 break;
   }



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r361116 - [AVR] Automatically link CRT and libgcc from the system avr-gcc

2019-05-19 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Sun May 19 02:54:14 2019
New Revision: 361116

URL: http://llvm.org/viewvc/llvm-project?rev=361116=rev
Log:
[AVR] Automatically link CRT and libgcc from the system avr-gcc

Summary:
This patch modifies the AVR toolchain so that if avr-gcc and avr-libc
are detected during compilation, the CRT, libgcc, libm, and libc anre
linked.

This matches avr-gcc's default behaviour, and the expected behaviour of
all C compilers - including the C runtime.

avr-gcc also needs a -mmcu specified in order to link runtime libraries.

The difference betwen this patch and avr-gcc is that this patch will
warn users whenever they compile without a runtime, as opposed to GCC,
which silently trims the runtime libs from the linker arguments when no
-mmcu is specified.

Reviewers: aaron.ballman, kparzysz, asb, hfinkel, brucehoult, TimNN

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D54334

Added:
cfe/trunk/test/Driver/avr-link-mcu-family-unimplemented.c
cfe/trunk/test/Driver/avr-link-no-mcu-specified.c
cfe/trunk/test/Driver/avr-link-nostdlib-nodefaultlibs.c
Modified:
cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
cfe/trunk/include/clang/Basic/DiagnosticGroups.td
cfe/trunk/lib/Driver/ToolChains/AVR.cpp
cfe/trunk/lib/Driver/ToolChains/AVR.h
cfe/trunk/lib/Driver/ToolChains/Gnu.cpp

Modified: cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td?rev=361116=361115=361116=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td Sun May 19 02:54:14 
2019
@@ -27,6 +27,25 @@ def err_drv_invalid_riscv_arch_name : Er
   "invalid arch name '%0', %1">;
 def err_drv_invalid_riscv_ext_arch_name : Error<
   "invalid arch name '%0', %1 '%2'">;
+def warn_drv_avr_mcu_not_specified : Warning<
+  "no target microcontroller specified on command line, cannot "
+  "link standard libraries, please pass -mmcu=">,
+  InGroup;
+def warn_drv_avr_gcc_not_found: Warning<
+  "no avr-gcc installation can be found on the system, "
+  "cannot link standard libraries">,
+  InGroup;
+def warn_drv_avr_libc_not_found: Warning<
+  "no avr-libc installation can be found on the system, "
+  "cannot link standard libraries">,
+  InGroup;
+def warn_drv_avr_family_linking_stdlibs_not_implemented: Warning<
+  "support for linking stdlibs for microcontroller '%0' is not implemented">,
+  InGroup;
+def warn_drv_avr_stdlib_not_linked: Warning<
+  "standard library not linked and so no interrupt vector table or "
+  "compiler runtime routines will be linked">,
+  InGroup;
 def err_drv_cuda_bad_gpu_arch : Error<"Unsupported CUDA gpu architecture: %0">;
 def err_drv_no_cuda_installation : Error<
   "cannot find CUDA installation.  Provide its path via --cuda-path, or pass "

Modified: cfe/trunk/include/clang/Basic/DiagnosticGroups.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/DiagnosticGroups.td?rev=361116=361115=361116=diff
==
--- cfe/trunk/include/clang/Basic/DiagnosticGroups.td (original)
+++ cfe/trunk/include/clang/Basic/DiagnosticGroups.td Sun May 19 02:54:14 2019
@@ -1033,6 +1033,10 @@ def SerializedDiagnostics : DiagGroup<"s
 // compiling CUDA C/C++ but which is not compatible with the CUDA spec.
 def CudaCompat : DiagGroup<"cuda-compat">;
 
+// Warnings which cause linking of the runtime libraries like
+// libc and the CRT to be skipped.
+def AVRRtlibLinkingQuirks : DiagGroup<"avr-rtlib-linking-quirks">;
+
 // A warning group for things that will change semantics in the future.
 def FutureCompat : DiagGroup<"future-compat">;
 

Modified: cfe/trunk/lib/Driver/ToolChains/AVR.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains/AVR.cpp?rev=361116=361115=361116=diff
==
--- cfe/trunk/lib/Driver/ToolChains/AVR.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains/AVR.cpp Sun May 19 02:54:14 2019
@@ -10,7 +10,14 @@
 #include "CommonArgs.h"
 #include "InputInfo.h"
 #include "clang/Driver/Compilation.h"
+#include "clang/Driver/DriverDiagnostic.h"
+#include "clang/Driver/Options.h"
+#include "llvm/ADT/Optional.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/SubtargetFeature.h"
 #include "llvm/Option/ArgList.h"
+#include "llvm/Support/FileSystem.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
@@ -18,12 +25,76 @@ using namespace clang::driver::tools;
 using namespace clang;
 using namespace llvm::opt;
 
+namespace {
+
+// TODO: Consider merging this into the AVR device table
+// array in Targets/AVR.cpp.
+llvm::Optional GetMcuFamilyName(StringRef MCU) {

r346548 - Use the correct address space when bitcasting func pointer to int pointer

2018-11-09 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Fri Nov  9 11:42:05 2018
New Revision: 346548

URL: http://llvm.org/viewvc/llvm-project?rev=346548=rev
Log:
Use the correct address space when bitcasting func pointer to int pointer

When we cast a function pointer to an int pointer, at some pointer later
it gets bitcasted back to a function and called.

In backends that have a nonzero program memory address space specified
in the data layout, the old code would lose the address space data. When
LLVM later attempted to generate the bitcast from i8* to i8(..)*
addrspace(1), it would fail because the pointers are not in the same
address space.

With this patch, the address space of the function will carry on to the
address space of the i8* pointer. This is because all function pointers
in Harvard architectures need to be assigned to the correct address
space.

This has no effect to any in-tree backends except AVR.

Modified:
cfe/trunk/lib/CodeGen/CGException.cpp

Modified: cfe/trunk/lib/CodeGen/CGException.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGException.cpp?rev=346548=346547=346548=diff
==
--- cfe/trunk/lib/CodeGen/CGException.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGException.cpp Fri Nov  9 11:42:05 2018
@@ -250,7 +250,11 @@ static llvm::Constant *getPersonalityFn(
 static llvm::Constant *getOpaquePersonalityFn(CodeGenModule ,
 const EHPersonality ) {
   llvm::Constant *Fn = getPersonalityFn(CGM, Personality);
-  return llvm::ConstantExpr::getBitCast(Fn, CGM.Int8PtrTy);
+  llvm::PointerType* Int8PtrTy = llvm::PointerType::get(
+  llvm::Type::getInt8Ty(CGM.getLLVMContext()),
+  CGM.getDataLayout().getProgramAddressSpace());
+
+  return llvm::ConstantExpr::getBitCast(Fn, Int8PtrTy);
 }
 
 /// Check whether a landingpad instruction only uses C++ features.


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r346520 - Use the correct address space when emitting the ctor function list

2018-11-09 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Fri Nov  9 09:15:06 2018
New Revision: 346520

URL: http://llvm.org/viewvc/llvm-project?rev=346520=rev
Log:
Use the correct address space when emitting the ctor function list

This patch modifies clang so that, if compiling for a target that
explicitly specifies a nonzero program memory address space, the
constructor list global will have the same address space as the
functions it contains.

AVR is the only in-tree backend which has a nonzero program memory
address space.

Without this, the IR verifier would always fail if a constructor
was used on a Harvard architecture backend.

This has no functional change to any in-tree backends except AVR.

Modified:
cfe/trunk/lib/CodeGen/CodeGenModule.cpp

Modified: cfe/trunk/lib/CodeGen/CodeGenModule.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CodeGenModule.cpp?rev=346520=346519=346520=diff
==
--- cfe/trunk/lib/CodeGen/CodeGenModule.cpp (original)
+++ cfe/trunk/lib/CodeGen/CodeGenModule.cpp Fri Nov  9 09:15:06 2018
@@ -1105,11 +1105,12 @@ void CodeGenModule::EmitCtorList(CtorLis
 
   // Ctor function type is void()*.
   llvm::FunctionType* CtorFTy = llvm::FunctionType::get(VoidTy, false);
-  llvm::Type *CtorPFTy = llvm::PointerType::getUnqual(CtorFTy);
+  llvm::Type *CtorPFTy = llvm::PointerType::get(CtorFTy,
+  TheModule.getDataLayout().getProgramAddressSpace());
 
   // Get the type of a ctor entry, { i32, void ()*, i8* }.
   llvm::StructType *CtorStructTy = llvm::StructType::get(
-  Int32Ty, llvm::PointerType::getUnqual(CtorFTy), VoidPtrTy);
+  Int32Ty, CtorPFTy, VoidPtrTy);
 
   // Construct the constructor and destructor arrays.
   ConstantInitBuilder builder(*this);


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r325483 - [AVR] Set the program address space in the data layout

2018-02-19 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Mon Feb 19 02:46:16 2018
New Revision: 325483

URL: http://llvm.org/viewvc/llvm-project?rev=325483=rev
Log:
[AVR] Set the program address space in the data layout

This is accompanied by r325481 in LLVM.

Modified:
cfe/trunk/lib/Basic/Targets/AVR.h

Modified: cfe/trunk/lib/Basic/Targets/AVR.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/AVR.h?rev=325483=325482=325483=diff
==
--- cfe/trunk/lib/Basic/Targets/AVR.h (original)
+++ cfe/trunk/lib/Basic/Targets/AVR.h Mon Feb 19 02:46:16 2018
@@ -55,7 +55,7 @@ public:
 WIntType = SignedInt;
 Char32Type = UnsignedLong;
 SigAtomicType = SignedChar;
-resetDataLayout("e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8");
+resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8");
   }
 
   void getTargetDefines(const LangOptions ,


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r314354 - [AVR] Update data layout to match current LLVM trunk

2017-09-27 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Wed Sep 27 15:09:01 2017
New Revision: 314354

URL: http://llvm.org/viewvc/llvm-project?rev=314354=rev
Log:
[AVR] Update data layout to match current LLVM trunk

The data layout was changed in r314179 to fix atomic loads and stores.

Modified:
cfe/trunk/lib/Basic/Targets/AVR.h

Modified: cfe/trunk/lib/Basic/Targets/AVR.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets/AVR.h?rev=314354=314353=314354=diff
==
--- cfe/trunk/lib/Basic/Targets/AVR.h (original)
+++ cfe/trunk/lib/Basic/Targets/AVR.h Wed Sep 27 15:09:01 2017
@@ -56,8 +56,7 @@ public:
 WIntType = SignedInt;
 Char32Type = UnsignedLong;
 SigAtomicType = SignedChar;
-resetDataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
-"-f32:32:32-f64:64:64-n8");
+resetDataLayout("e-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8");
   }
 
   void getTargetDefines(const LangOptions ,


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r295536 - [AVR] Move definition of IsIntegratedAssemblerDefault

2017-02-17 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Fri Feb 17 20:42:36 2017
New Revision: 295536

URL: http://llvm.org/viewvc/llvm-project?rev=295536=rev
Log:
[AVR] Move definition of IsIntegratedAssemblerDefault

Modified:
cfe/trunk/lib/Driver/ToolChains.cpp
cfe/trunk/lib/Driver/ToolChains.h

Modified: cfe/trunk/lib/Driver/ToolChains.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains.cpp?rev=295536=295535=295536=diff
==
--- cfe/trunk/lib/Driver/ToolChains.cpp (original)
+++ cfe/trunk/lib/Driver/ToolChains.cpp Fri Feb 17 20:42:36 2017
@@ -2922,6 +2922,7 @@ bool Generic_GCC::IsIntegratedAssemblerD
   case llvm::Triple::aarch64_be:
   case llvm::Triple::arm:
   case llvm::Triple::armeb:
+  case llvm::Triple::avr:
   case llvm::Triple::bpfel:
   case llvm::Triple::bpfeb:
   case llvm::Triple::thumb:

Modified: cfe/trunk/lib/Driver/ToolChains.h
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/ToolChains.h?rev=295536=295535=295536=diff
==
--- cfe/trunk/lib/Driver/ToolChains.h (original)
+++ cfe/trunk/lib/Driver/ToolChains.h Fri Feb 17 20:42:36 2017
@@ -1377,7 +1377,6 @@ protected:
 public:
   AVRToolChain(const Driver , const llvm::Triple ,
const llvm::opt::ArgList );
-  bool IsIntegratedAssemblerDefault() const override { return true; }
 };
 
 


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r294869 - [AVR] Fix __AVR_xxx macro definitions; authored by Peter Wu

2017-02-11 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Sat Feb 11 15:06:07 2017
New Revision: 294869

URL: http://llvm.org/viewvc/llvm-project?rev=294869=rev
Log:
[AVR] Fix __AVR_xxx macro definitions; authored by Peter Wu

Summary:
The -mmcu option for GCC sets macros like __AVR_ATmega328P__ (with the trailing
underscores), be sure to include these underscores for Clangs -mcpu option.

See "AVR Built-in Macros" in https://gcc.gnu.org/onlinedocs/gcc/AVR-Options.html

Reviewers: jroelofs, dylanmckay

Reviewed By: jroelofs, dylanmckay

Subscribers: efriedma, cfe-commits

Differential Revision: https://reviews.llvm.org/D29817

Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/test/CodeGen/avr/target-cpu-defines/atmega328p.c
cfe/trunk/test/CodeGen/avr/target-cpu-defines/attiny104.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294869=294868=294869=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Sat Feb 11 15:06:07 2017
@@ -8464,244 +8464,244 @@ struct MCUInfo {
 // This list should be kept up-to-date with AVRDevices.td in LLVM.
 static ArrayRef AVRMcus = {
   { "at90s1200", "__AVR_AT90S1200__" },
-  { "attiny11", "__AVR_ATtiny11" },
-  { "attiny12", "__AVR_ATtiny12" },
-  { "attiny15", "__AVR_ATtiny15" },
-  { "attiny28", "__AVR_ATtiny28" },
-  { "at90s2313", "__AVR_AT90S2313" },
-  { "at90s2323", "__AVR_AT90S2323" },
-  { "at90s2333", "__AVR_AT90S2333" },
-  { "at90s2343", "__AVR_AT90S2343" },
-  { "attiny22", "__AVR_ATtiny22" },
-  { "attiny26", "__AVR_ATtiny26" },
-  { "at86rf401", "__AVR_AT86RF401" },
-  { "at90s4414", "__AVR_AT90S4414" },
-  { "at90s4433", "__AVR_AT90S4433" },
-  { "at90s4434", "__AVR_AT90S4434" },
-  { "at90s8515", "__AVR_AT90S8515" },
-  { "at90c8534", "__AVR_AT90c8534" },
-  { "at90s8535", "__AVR_AT90S8535" },
-  { "ata5272", "__AVR_ATA5272" },
-  { "attiny13", "__AVR_ATtiny13" },
-  { "attiny13a", "__AVR_ATtiny13A" },
-  { "attiny2313", "__AVR_ATtiny2313" },
-  { "attiny2313a", "__AVR_ATtiny2313A" },
-  { "attiny24", "__AVR_ATtiny24" },
-  { "attiny24a", "__AVR_ATtiny24A" },
-  { "attiny4313", "__AVR_ATtiny4313" },
-  { "attiny44", "__AVR_ATtiny44" },
-  { "attiny44a", "__AVR_ATtiny44A" },
-  { "attiny84", "__AVR_ATtiny84" },
-  { "attiny84a", "__AVR_ATtiny84A" },
-  { "attiny25", "__AVR_ATtiny25" },
-  { "attiny45", "__AVR_ATtiny45" },
-  { "attiny85", "__AVR_ATtiny85" },
-  { "attiny261", "__AVR_ATtiny261" },
-  { "attiny261a", "__AVR_ATtiny261A" },
-  { "attiny461", "__AVR_ATtiny461" },
-  { "attiny461a", "__AVR_ATtiny461A" },
-  { "attiny861", "__AVR_ATtiny861" },
-  { "attiny861a", "__AVR_ATtiny861A" },
-  { "attiny87", "__AVR_ATtiny87" },
-  { "attiny43u", "__AVR_ATtiny43U" },
-  { "attiny48", "__AVR_ATtiny48" },
-  { "attiny88", "__AVR_ATtiny88" },
-  { "attiny828", "__AVR_ATtiny828" },
-  { "at43usb355", "__AVR_AT43USB355" },
-  { "at76c711", "__AVR_AT76C711" },
-  { "atmega103", "__AVR_ATmega103" },
-  { "at43usb320", "__AVR_AT43USB320" },
-  { "attiny167", "__AVR_ATtiny167" },
-  { "at90usb82", "__AVR_AT90USB82" },
-  { "at90usb162", "__AVR_AT90USB162" },
-  { "ata5505", "__AVR_ATA5505" },
-  { "atmega8u2", "__AVR_ATmega8U2" },
-  { "atmega16u2", "__AVR_ATmega16U2" },
-  { "atmega32u2", "__AVR_ATmega32U2" },
-  { "attiny1634", "__AVR_ATtiny1634" },
-  { "atmega8", "__AVR_ATmega8" },
-  { "ata6289", "__AVR_ATA6289" },
-  { "atmega8a", "__AVR_ATmega8A" },
-  { "ata6285", "__AVR_ATA6285" },
-  { "ata6286", "__AVR_ATA6286" },
-  { "atmega48", "__AVR_ATmega48" },
-  { "atmega48a", "__AVR_ATmega48A" },
-  { "atmega48pa", "__AVR_ATmega48PA" },
-  { "atmega48p", "__AVR_ATmega48P" },
-  { "atmega88", "__AVR_ATmega88" },
-  { "atmega88a", "__AVR_ATmega88A" },
-  { "atmega88p", "__AVR_ATmega88P" },
-  { "atmega88pa", "__AVR_ATmega88PA" },
-  { "atmega8515", "__AVR_ATmega8515" },
-  { "atmega8535", "__AVR_ATmega8535" },
-  { "atmega8hva", "__AVR_ATmega8HVA" },
-  { "at90pwm1", "__AVR_AT90PWM1" },
-  { "at90pwm2", "__AVR_AT90PWM2" },
-  { "at90pwm2b", "__AVR_AT90PWM2B" },
-  { "at90pwm3", "__AVR_AT90PWM3" },
-  { "at90pwm3b", "__AVR_AT90PWM3B" },
-  { "at90pwm81", "__AVR_AT90PWM81" },
-  { "ata5790", "__AVR_ATA5790" },
-  { "ata5795", "__AVR_ATA5795" },
-  { "atmega16", "__AVR_ATmega16" },
-  { "atmega16a", "__AVR_ATmega16A" },
-  { "atmega161", "__AVR_ATmega161" },
-  { "atmega162", "__AVR_ATmega162" },
-  { "atmega163", "__AVR_ATmega163" },
-  { "atmega164a", "__AVR_ATmega164A" },
-  { "atmega164p", "__AVR_ATmega164P" },
-  { "atmega164pa", "__AVR_ATmega164PA" },
-  { "atmega165", "__AVR_ATmega165" },
-  { "atmega165a", "__AVR_ATmega165A" },
-  { "atmega165p", "__AVR_ATmega165P" },
-  { "atmega165pa", "__AVR_ATmega165PA" },
-  { "atmega168", "__AVR_ATmega168" },
-  { "atmega168a", "__AVR_ATmega168A" },
-  { "atmega168p", "__AVR_ATmega168P" },
-  { "atmega168pa", "__AVR_ATmega168PA" },
-  { "atmega169",

r294402 - [AVR] Add support for the 'interrupt' and 'naked' attributes

2017-02-07 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Tue Feb  7 23:09:26 2017
New Revision: 294402

URL: http://llvm.org/viewvc/llvm-project?rev=294402=rev
Log:
[AVR] Add support for the 'interrupt' and 'naked' attributes

Summary:
This teaches clang how to parse and lower the 'interrupt' and 'naked'
attributes.

This allows interrupt signal handlers to be written.

Reviewers: aaron.ballman

Subscribers: malcolm.parsons, cfe-commits

Differential Revision: https://reviews.llvm.org/D28451

Added:
cfe/trunk/test/CodeGen/avr/attributes/
cfe/trunk/test/CodeGen/avr/attributes/interrupt.c
cfe/trunk/test/CodeGen/avr/attributes/signal.c
cfe/trunk/test/Sema/avr-interrupt-attr.c
cfe/trunk/test/Sema/avr-signal-attr.c
Modified:
cfe/trunk/include/clang/Basic/Attr.td
cfe/trunk/include/clang/Basic/AttrDocs.td
cfe/trunk/lib/CodeGen/TargetInfo.cpp
cfe/trunk/lib/Sema/SemaDeclAttr.cpp

Modified: cfe/trunk/include/clang/Basic/Attr.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/Attr.td?rev=294402=294401=294402=diff
==
--- cfe/trunk/include/clang/Basic/Attr.td (original)
+++ cfe/trunk/include/clang/Basic/Attr.td Tue Feb  7 23:09:26 2017
@@ -258,6 +258,7 @@ class TargetArch {
   list CXXABIs;
 }
 def TargetARM : TargetArch<["arm", "thumb", "armeb", "thumbeb"]>;
+def TargetAVR : TargetArch<["avr"]>;
 def TargetMips : TargetArch<["mips", "mipsel"]>;
 def TargetMSP430 : TargetArch<["msp430"]>;
 def TargetX86 : TargetArch<["x86"]>;
@@ -480,6 +481,19 @@ def ARMInterrupt : InheritableAttr, Targ
   let Documentation = [ARMInterruptDocs];
 }
 
+def AVRInterrupt : InheritableAttr, TargetSpecificAttr {
+  let Spellings = [GNU<"interrupt">];
+  let Subjects = SubjectList<[Function]>;
+  let ParseKind = "Interrupt";
+  let Documentation = [AVRInterruptDocs];
+}
+
+def AVRSignal : InheritableAttr, TargetSpecificAttr {
+  let Spellings = [GNU<"signal">];
+  let Subjects = SubjectList<[Function]>;
+  let Documentation = [AVRSignalDocs];
+}
+
 def AsmLabel : InheritableAttr {
   let Spellings = [Keyword<"asm">, Keyword<"__asm__">];
   let Args = [StringArgument<"Label">];

Modified: cfe/trunk/include/clang/Basic/AttrDocs.td
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/AttrDocs.td?rev=294402=294401=294402=diff
==
--- cfe/trunk/include/clang/Basic/AttrDocs.td (original)
+++ cfe/trunk/include/clang/Basic/AttrDocs.td Tue Feb  7 23:09:26 2017
@@ -1182,6 +1182,33 @@ The semantics are as follows:
   }];
 }
 
+def AVRInterruptDocs : Documentation {
+  let Category = DocCatFunction;
+  let Content = [{
+Clang supports the GNU style ``__attribute__((interrupt))`` attribute on
+AVR targets. This attribute may be attached to a function definition and 
instructs
+the backend to generate appropriate function entry/exit code so that it can be 
used
+directly as an interrupt service routine.
+
+On the AVR, the hardware globally disables interrupts when an interrupt is 
executed.
+The first instruction of an interrupt handler declared with this attribute is 
a SEI
+instruction to re-enable interrupts. See also the signal attribute that
+does not insert a SEI instruction.
+  }];
+}
+
+def AVRSignalDocs : Documentation {
+  let Category = DocCatFunction;
+  let Content = [{
+Clang supports the GNU style ``__attribute__((signal))`` attribute on
+AVR targets. This attribute may be attached to a function definition and 
instructs
+the backend to generate appropriate function entry/exit code so that it can be 
used
+directly as an interrupt service routine.
+
+Interrupt handler functions defined with the signal attribute do not re-enable 
interrupts.
+}];
+}
+
 def TargetDocs : Documentation {
   let Category = DocCatFunction;
   let Content = [{

Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=294402=294401=294402=diff
==
--- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original)
+++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Tue Feb  7 23:09:26 2017
@@ -6900,6 +6900,31 @@ MIPSTargetCodeGenInfo::initDwarfEHRegSiz
 }
 
 
//===--===//
+// AVR ABI Implementation.
+//===--===//
+
+namespace {
+class AVRTargetCodeGenInfo : public TargetCodeGenInfo {
+public:
+  AVRTargetCodeGenInfo(CodeGenTypes )
+: TargetCodeGenInfo(new DefaultABIInfo(CGT)) { }
+
+  void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
+   CodeGen::CodeGenModule ) const override {
+const auto *FD = dyn_cast_or_null(D);
+if (!FD) return;
+auto *Fn = cast(GV);
+
+if (FD->getAttr())
+  Fn->addFnAttr("interrupt");
+
+if (FD->getAttr())
+

r294282 - Revert "Revert "[AVR] Allow specifying the CPU on the command line""

2017-02-07 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Tue Feb  7 00:04:18 2017
New Revision: 294282

URL: http://llvm.org/viewvc/llvm-project?rev=294282=rev
Log:
Revert "Revert "[AVR] Allow specifying the CPU on the command line""

This reverts commit 7ac30e0f839fdab6d723ce2ef6a5b7a4cf03d150.

Added:
cfe/trunk/test/CodeGen/avr/target-cpu-defines/atmega328p.c
cfe/trunk/test/CodeGen/avr/target-cpu-defines/attiny104.c
cfe/trunk/test/CodeGen/avr/target-cpu-defines/common.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294282=294281=294282=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Tue Feb  7 00:04:18 2017
@@ -8446,6 +8446,254 @@ public:
   }
 };
 
+/// Information about a specific microcontroller.
+struct MCUInfo {
+  const char *Name;
+  const char *DefineName;
+};
+
+// This list should be kept up-to-date with AVRDevices.td in LLVM.
+static ArrayRef AVRMcus = {
+  { "at90s1200", "__AVR_AT90S1200__" },
+  { "attiny11", "__AVR_ATtiny11" },
+  { "attiny12", "__AVR_ATtiny12" },
+  { "attiny15", "__AVR_ATtiny15" },
+  { "attiny28", "__AVR_ATtiny28" },
+  { "at90s2313", "__AVR_AT90S2313" },
+  { "at90s2323", "__AVR_AT90S2323" },
+  { "at90s2333", "__AVR_AT90S2333" },
+  { "at90s2343", "__AVR_AT90S2343" },
+  { "attiny22", "__AVR_ATtiny22" },
+  { "attiny26", "__AVR_ATtiny26" },
+  { "at86rf401", "__AVR_AT86RF401" },
+  { "at90s4414", "__AVR_AT90S4414" },
+  { "at90s4433", "__AVR_AT90S4433" },
+  { "at90s4434", "__AVR_AT90S4434" },
+  { "at90s8515", "__AVR_AT90S8515" },
+  { "at90c8534", "__AVR_AT90c8534" },
+  { "at90s8535", "__AVR_AT90S8535" },
+  { "ata5272", "__AVR_ATA5272" },
+  { "attiny13", "__AVR_ATtiny13" },
+  { "attiny13a", "__AVR_ATtiny13A" },
+  { "attiny2313", "__AVR_ATtiny2313" },
+  { "attiny2313a", "__AVR_ATtiny2313A" },
+  { "attiny24", "__AVR_ATtiny24" },
+  { "attiny24a", "__AVR_ATtiny24A" },
+  { "attiny4313", "__AVR_ATtiny4313" },
+  { "attiny44", "__AVR_ATtiny44" },
+  { "attiny44a", "__AVR_ATtiny44A" },
+  { "attiny84", "__AVR_ATtiny84" },
+  { "attiny84a", "__AVR_ATtiny84A" },
+  { "attiny25", "__AVR_ATtiny25" },
+  { "attiny45", "__AVR_ATtiny45" },
+  { "attiny85", "__AVR_ATtiny85" },
+  { "attiny261", "__AVR_ATtiny261" },
+  { "attiny261a", "__AVR_ATtiny261A" },
+  { "attiny461", "__AVR_ATtiny461" },
+  { "attiny461a", "__AVR_ATtiny461A" },
+  { "attiny861", "__AVR_ATtiny861" },
+  { "attiny861a", "__AVR_ATtiny861A" },
+  { "attiny87", "__AVR_ATtiny87" },
+  { "attiny43u", "__AVR_ATtiny43U" },
+  { "attiny48", "__AVR_ATtiny48" },
+  { "attiny88", "__AVR_ATtiny88" },
+  { "attiny828", "__AVR_ATtiny828" },
+  { "at43usb355", "__AVR_AT43USB355" },
+  { "at76c711", "__AVR_AT76C711" },
+  { "atmega103", "__AVR_ATmega103" },
+  { "at43usb320", "__AVR_AT43USB320" },
+  { "attiny167", "__AVR_ATtiny167" },
+  { "at90usb82", "__AVR_AT90USB82" },
+  { "at90usb162", "__AVR_AT90USB162" },
+  { "ata5505", "__AVR_ATA5505" },
+  { "atmega8u2", "__AVR_ATmega8U2" },
+  { "atmega16u2", "__AVR_ATmega16U2" },
+  { "atmega32u2", "__AVR_ATmega32U2" },
+  { "attiny1634", "__AVR_ATtiny1634" },
+  { "atmega8", "__AVR_ATmega8" },
+  { "ata6289", "__AVR_ATA6289" },
+  { "atmega8a", "__AVR_ATmega8A" },
+  { "ata6285", "__AVR_ATA6285" },
+  { "ata6286", "__AVR_ATA6286" },
+  { "atmega48", "__AVR_ATmega48" },
+  { "atmega48a", "__AVR_ATmega48A" },
+  { "atmega48pa", "__AVR_ATmega48PA" },
+  { "atmega48p", "__AVR_ATmega48P" },
+  { "atmega88", "__AVR_ATmega88" },
+  { "atmega88a", "__AVR_ATmega88A" },
+  { "atmega88p", "__AVR_ATmega88P" },
+  { "atmega88pa", "__AVR_ATmega88PA" },
+  { "atmega8515", "__AVR_ATmega8515" },
+  { "atmega8535", "__AVR_ATmega8535" },
+  { "atmega8hva", "__AVR_ATmega8HVA" },
+  { "at90pwm1", "__AVR_AT90PWM1" },
+  { "at90pwm2", "__AVR_AT90PWM2" },
+  { "at90pwm2b", "__AVR_AT90PWM2B" },
+  { "at90pwm3", "__AVR_AT90PWM3" },
+  { "at90pwm3b", "__AVR_AT90PWM3B" },
+  { "at90pwm81", "__AVR_AT90PWM81" },
+  { "ata5790", "__AVR_ATA5790" },
+  { "ata5795", "__AVR_ATA5795" },
+  { "atmega16", "__AVR_ATmega16" },
+  { "atmega16a", "__AVR_ATmega16A" },
+  { "atmega161", "__AVR_ATmega161" },
+  { "atmega162", "__AVR_ATmega162" },
+  { "atmega163", "__AVR_ATmega163" },
+  { "atmega164a", "__AVR_ATmega164A" },
+  { "atmega164p", "__AVR_ATmega164P" },
+  { "atmega164pa", "__AVR_ATmega164PA" },
+  { "atmega165", "__AVR_ATmega165" },
+  { "atmega165a", "__AVR_ATmega165A" },
+  { "atmega165p", "__AVR_ATmega165P" },
+  { "atmega165pa", "__AVR_ATmega165PA" },
+  { "atmega168", "__AVR_ATmega168" },
+  { "atmega168a", "__AVR_ATmega168A" },
+  { "atmega168p", "__AVR_ATmega168P" },
+  { "atmega168pa", "__AVR_ATmega168PA" },
+  { "atmega169", "__AVR_ATmega169" },
+  { "atmega169a", "__AVR_ATmega169A" },
+  { "atmega169p", "__AVR_ATmega169P" },
+  { "atmega169pa", "__AVR_ATmega169PA" },
+  {

Re: r294177 - [AVR] Allow specifying the CPU on the command line

2017-02-06 Thread Dylan McKay via cfe-commits 
No problem - thanks for reverting this.

I'll fix up the patch and re-commit later today.

On Tue, Feb 7, 2017 at 12:47 AM, Diana Picus via cfe-commits <
cfe-commits@lists.llvm.org> wrote:

> Hi Dylan,
>
> I reverted this in r294180 because I think it broke some of the
> buildbots. See for example
> http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/3599
> http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/2271
>
> Sorry,
> Diana
>
> On 6 February 2017 at 10:07, Dylan McKay via cfe-commits
> <cfe-commits@lists.llvm.org> wrote:
> > Author: dylanmckay
> > Date: Mon Feb  6 03:07:56 2017
> > New Revision: 294177
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=294177=rev
> > Log:
> > [AVR] Allow specifying the CPU on the command line
> >
> > Summary:
> > This tells clang about all of the different AVR microcontrollers.
> >
> > It also adds code to define the correct preprocessor macros for each
> > device.
> >
> > Reviewers: jroelofs, asl
> >
> > Reviewed By: asl
> >
> > Subscribers: asl, cfe-commits
> >
> > Differential Revision: https://reviews.llvm.org/D28346
> >
> > Added:
> > cfe/trunk/test/CodeGen/avr/
> > cfe/trunk/test/CodeGen/avr/target-cpu-defines/
> > cfe/trunk/test/CodeGen/avr/target-cpu-defines/atmega328p.c
> > cfe/trunk/test/CodeGen/avr/target-cpu-defines/attiny104.c
> > cfe/trunk/test/CodeGen/avr/target-cpu-defines/common.c
> > Modified:
> > cfe/trunk/lib/Basic/Targets.cpp
> >
> > Modified: cfe/trunk/lib/Basic/Targets.cpp
> > URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/
> Targets.cpp?rev=294177=294176=294177=diff
> > 
> ==
> > --- cfe/trunk/lib/Basic/Targets.cpp (original)
> > +++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:07:56 2017
> > @@ -8435,6 +8435,254 @@ public:
> >}
> >  };
> >
> > +/// Information about a specific microcontroller.
> > +struct MCUInfo {
> > +  const char *Name;
> > +  const char *DefineName;
> > +};
> > +
> > +// This list should be kept up-to-date with AVRDevices.td in LLVM.
> > +static ArrayRef AVRMcus = {
> > +  { "at90s1200", "__AVR_AT90S1200__" },
> > +  { "attiny11", "__AVR_ATtiny11" },
> > +  { "attiny12", "__AVR_ATtiny12" },
> > +  { "attiny15", "__AVR_ATtiny15" },
> > +  { "attiny28", "__AVR_ATtiny28" },
> > +  { "at90s2313", "__AVR_AT90S2313" },
> > +  { "at90s2323", "__AVR_AT90S2323" },
> > +  { "at90s2333", "__AVR_AT90S2333" },
> > +  { "at90s2343", "__AVR_AT90S2343" },
> > +  { "attiny22", "__AVR_ATtiny22" },
> > +  { "attiny26", "__AVR_ATtiny26" },
> > +  { "at86rf401", "__AVR_AT86RF401" },
> > +  { "at90s4414", "__AVR_AT90S4414" },
> > +  { "at90s4433", "__AVR_AT90S4433" },
> > +  { "at90s4434", "__AVR_AT90S4434" },
> > +  { "at90s8515", "__AVR_AT90S8515" },
> > +  { "at90c8534", "__AVR_AT90c8534" },
> > +  { "at90s8535", "__AVR_AT90S8535" },
> > +  { "ata5272", "__AVR_ATA5272" },
> > +  { "attiny13", "__AVR_ATtiny13" },
> > +  { "attiny13a", "__AVR_ATtiny13A" },
> > +  { "attiny2313", "__AVR_ATtiny2313" },
> > +  { "attiny2313a", "__AVR_ATtiny2313A" },
> > +  { "attiny24", "__AVR_ATtiny24" },
> > +  { "attiny24a", "__AVR_ATtiny24A" },
> > +  { "attiny4313", "__AVR_ATtiny4313" },
> > +  { "attiny44", "__AVR_ATtiny44" },
> > +  { "attiny44a", "__AVR_ATtiny44A" },
> > +  { "attiny84", "__AVR_ATtiny84" },
> > +  { "attiny84a", "__AVR_ATtiny84A" },
> > +  { "attiny25", "__AVR_ATtiny25" },
> > +  { "attiny45", "__AVR_ATtiny45" },
> > +  { "attiny85", "__AVR_ATtiny85" },
> > +  { "attiny261", "__AVR_ATtiny261" },
> > +  { "attiny261a", "__AVR_ATtiny261A" },
> > +  { "attiny461", "__AVR_ATtiny461" },
> > +  { "attiny461a&qu

r294177 - [AVR] Allow specifying the CPU on the command line

2017-02-06 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Mon Feb  6 03:07:56 2017
New Revision: 294177

URL: http://llvm.org/viewvc/llvm-project?rev=294177=rev
Log:
[AVR] Allow specifying the CPU on the command line

Summary:
This tells clang about all of the different AVR microcontrollers.

It also adds code to define the correct preprocessor macros for each
device.

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, cfe-commits

Differential Revision: https://reviews.llvm.org/D28346

Added:
cfe/trunk/test/CodeGen/avr/
cfe/trunk/test/CodeGen/avr/target-cpu-defines/
cfe/trunk/test/CodeGen/avr/target-cpu-defines/atmega328p.c
cfe/trunk/test/CodeGen/avr/target-cpu-defines/attiny104.c
cfe/trunk/test/CodeGen/avr/target-cpu-defines/common.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294177=294176=294177=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:07:56 2017
@@ -8435,6 +8435,254 @@ public:
   }
 };
 
+/// Information about a specific microcontroller.
+struct MCUInfo {
+  const char *Name;
+  const char *DefineName;
+};
+
+// This list should be kept up-to-date with AVRDevices.td in LLVM.
+static ArrayRef AVRMcus = {
+  { "at90s1200", "__AVR_AT90S1200__" },
+  { "attiny11", "__AVR_ATtiny11" },
+  { "attiny12", "__AVR_ATtiny12" },
+  { "attiny15", "__AVR_ATtiny15" },
+  { "attiny28", "__AVR_ATtiny28" },
+  { "at90s2313", "__AVR_AT90S2313" },
+  { "at90s2323", "__AVR_AT90S2323" },
+  { "at90s2333", "__AVR_AT90S2333" },
+  { "at90s2343", "__AVR_AT90S2343" },
+  { "attiny22", "__AVR_ATtiny22" },
+  { "attiny26", "__AVR_ATtiny26" },
+  { "at86rf401", "__AVR_AT86RF401" },
+  { "at90s4414", "__AVR_AT90S4414" },
+  { "at90s4433", "__AVR_AT90S4433" },
+  { "at90s4434", "__AVR_AT90S4434" },
+  { "at90s8515", "__AVR_AT90S8515" },
+  { "at90c8534", "__AVR_AT90c8534" },
+  { "at90s8535", "__AVR_AT90S8535" },
+  { "ata5272", "__AVR_ATA5272" },
+  { "attiny13", "__AVR_ATtiny13" },
+  { "attiny13a", "__AVR_ATtiny13A" },
+  { "attiny2313", "__AVR_ATtiny2313" },
+  { "attiny2313a", "__AVR_ATtiny2313A" },
+  { "attiny24", "__AVR_ATtiny24" },
+  { "attiny24a", "__AVR_ATtiny24A" },
+  { "attiny4313", "__AVR_ATtiny4313" },
+  { "attiny44", "__AVR_ATtiny44" },
+  { "attiny44a", "__AVR_ATtiny44A" },
+  { "attiny84", "__AVR_ATtiny84" },
+  { "attiny84a", "__AVR_ATtiny84A" },
+  { "attiny25", "__AVR_ATtiny25" },
+  { "attiny45", "__AVR_ATtiny45" },
+  { "attiny85", "__AVR_ATtiny85" },
+  { "attiny261", "__AVR_ATtiny261" },
+  { "attiny261a", "__AVR_ATtiny261A" },
+  { "attiny461", "__AVR_ATtiny461" },
+  { "attiny461a", "__AVR_ATtiny461A" },
+  { "attiny861", "__AVR_ATtiny861" },
+  { "attiny861a", "__AVR_ATtiny861A" },
+  { "attiny87", "__AVR_ATtiny87" },
+  { "attiny43u", "__AVR_ATtiny43U" },
+  { "attiny48", "__AVR_ATtiny48" },
+  { "attiny88", "__AVR_ATtiny88" },
+  { "attiny828", "__AVR_ATtiny828" },
+  { "at43usb355", "__AVR_AT43USB355" },
+  { "at76c711", "__AVR_AT76C711" },
+  { "atmega103", "__AVR_ATmega103" },
+  { "at43usb320", "__AVR_AT43USB320" },
+  { "attiny167", "__AVR_ATtiny167" },
+  { "at90usb82", "__AVR_AT90USB82" },
+  { "at90usb162", "__AVR_AT90USB162" },
+  { "ata5505", "__AVR_ATA5505" },
+  { "atmega8u2", "__AVR_ATmega8U2" },
+  { "atmega16u2", "__AVR_ATmega16U2" },
+  { "atmega32u2", "__AVR_ATmega32U2" },
+  { "attiny1634", "__AVR_ATtiny1634" },
+  { "atmega8", "__AVR_ATmega8" },
+  { "ata6289", "__AVR_ATA6289" },
+  { "atmega8a", "__AVR_ATmega8A" },
+  { "ata6285", "__AVR_ATA6285" },
+  { "ata6286", "__AVR_ATA6286" },
+  { "atmega48", "__AVR_ATmega48" },
+  { "atmega48a", "__AVR_ATmega48A" },
+  { "atmega48pa", "__AVR_ATmega48PA" },
+  { "atmega48p", "__AVR_ATmega48P" },
+  { "atmega88", "__AVR_ATmega88" },
+  { "atmega88a", "__AVR_ATmega88A" },
+  { "atmega88p", "__AVR_ATmega88P" },
+  { "atmega88pa", "__AVR_ATmega88PA" },
+  { "atmega8515", "__AVR_ATmega8515" },
+  { "atmega8535", "__AVR_ATmega8535" },
+  { "atmega8hva", "__AVR_ATmega8HVA" },
+  { "at90pwm1", "__AVR_AT90PWM1" },
+  { "at90pwm2", "__AVR_AT90PWM2" },
+  { "at90pwm2b", "__AVR_AT90PWM2B" },
+  { "at90pwm3", "__AVR_AT90PWM3" },
+  { "at90pwm3b", "__AVR_AT90PWM3B" },
+  { "at90pwm81", "__AVR_AT90PWM81" },
+  { "ata5790", "__AVR_ATA5790" },
+  { "ata5795", "__AVR_ATA5795" },
+  { "atmega16", "__AVR_ATmega16" },
+  { "atmega16a", "__AVR_ATmega16A" },
+  { "atmega161", "__AVR_ATmega161" },
+  { "atmega162", "__AVR_ATmega162" },
+  { "atmega163", "__AVR_ATmega163" },
+  { "atmega164a", "__AVR_ATmega164A" },
+  { "atmega164p", "__AVR_ATmega164P" },
+  { "atmega164pa", "__AVR_ATmega164PA" },
+  { "atmega165", "__AVR_ATmega165" },
+  { "atmega165a", "__AVR_ATmega165A" },
+  { "atmega165p", "__AVR_ATmega165P" },
+  { "atmega165pa", "__AVR_ATmega165PA" },
+  { "atmega168", "__AVR_ATmega168" },
+  {

r294176 - [AVR] Add support for the full set of inline asm constraints

2017-02-06 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Mon Feb  6 03:01:59 2017
New Revision: 294176

URL: http://llvm.org/viewvc/llvm-project?rev=294176=rev
Log:
[AVR] Add support for the full set of inline asm constraints

Summary:
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.

This adds inline assembly constraint support for the AVR target.

This patch is derived from the code in
AVRISelLowering::getConstraintType.

More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, ahatanak, saaadhu, cfe-commits

Differential Revision: https://reviews.llvm.org/D28344

Added:
cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176=294175=294176=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:01:59 2017
@@ -8517,6 +8517,57 @@ public:
 
   bool validateAsmConstraint(const char *,
  TargetInfo::ConstraintInfo ) const override {
+// There aren't any multi-character AVR specific constraints.
+if (StringRef(Name).size() > 1) return false;
+
+switch (*Name) {
+  default: return false;
+  case 'a': // Simple upper registers
+  case 'b': // Base pointer registers pairs
+  case 'd': // Upper register
+  case 'l': // Lower registers
+  case 'e': // Pointer register pairs
+  case 'q': // Stack pointer register
+  case 'r': // Any register
+  case 'w': // Special upper register pairs
+  case 't': // Temporary register
+  case 'x': case 'X': // Pointer register pair X
+  case 'y': case 'Y': // Pointer register pair Y
+  case 'z': case 'Z': // Pointer register pair Z
+Info.setAllowsRegister();
+return true;
+  case 'I': // 6-bit positive integer constant
+Info.setRequiresImmediate(0, 63);
+return true;
+  case 'J': // 6-bit negative integer constant
+Info.setRequiresImmediate(-63, 0);
+return true;
+  case 'K': // Integer constant (Range: 2)
+Info.setRequiresImmediate(2);
+return true;
+  case 'L': // Integer constant (Range: 0)
+Info.setRequiresImmediate(0);
+return true;
+  case 'M': // 8-bit integer constant
+Info.setRequiresImmediate(0, 0xff);
+return true;
+  case 'N': // Integer constant (Range: -1)
+Info.setRequiresImmediate(-1);
+return true;
+  case 'O': // Integer constant (Range: 8, 16, 24)
+Info.setRequiresImmediate({8, 16, 24});
+return true;
+  case 'P': // Integer constant (Range: 1)
+Info.setRequiresImmediate(1);
+return true;
+  case 'R': // Integer constant (Range: -6 to 5)
+Info.setRequiresImmediate(-6, 5);
+return true;
+  case 'G': // Floating point constant
+  case 'Q': // A memory address based on Y or Z pointer with displacement.
+return true;
+}
+
 return false;
   }
 

Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176=auto
==
--- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)
+++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb  6 03:01:59 2017
@@ -0,0 +1,124 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck 
%s
+
+int data;
+
+void a() {
+  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
+  asm("add r5, %0" :: "a"(data));
+}
+
+void b() {
+  // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)
+  asm("add r5, %0" :: "b"(data));
+}
+
+void d() {
+  // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)
+  asm("add r5, %0" :: "d"(data));
+}
+
+void l() {
+  // CHECK: call void asm sideeffect "add r5, $0", "l"(i16 %0)
+  asm("add r5, %0" :: "l"(data));
+}
+
+void e() {
+  // CHECK: call void asm sideeffect "add r5, $0", "e"(i16 %0)
+  asm("add r5, %0" :: "e"(data));
+}
+
+void q() {
+  // CHECK: call void asm sideeffect "add r5, $0", "q"(i16 %0)
+  asm("add r5, %0" :: "q"(data));
+}
+
+void r() {
+  // CHECK: call void asm sideeffect "add r5, $0", "r"(i16 %0)
+  asm("add r5, %0" :: "r"(data));
+}
+
+void w() {
+  // CHECK: call void asm sideeffect "add r5, $0", "w"(i16 %0)
+  asm("add r5, %0" :: "w"(data));
+}
+
+void t() {
+  // CHECK: call void asm sideeffect "add r5, $0", "t"(i16 %0)
+  asm("add r5, %0" :: "t"(data));
+}
+
+void x() {
+  // CHECK: call void

r291090 - [AVR] Revert the functional part of r291083

2017-01-04 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Thu Jan  5 01:17:46 2017
New Revision: 291090

URL: http://llvm.org/viewvc/llvm-project?rev=291090=rev
Log:
[AVR] Revert the functional part of r291083

As Senthil points out, this is unnecessary as we already have these
registers in AddlRegNames.

Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291090=291089=291090=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu Jan  5 01:17:46 2017
@@ -8446,8 +8446,7 @@ public:
   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
-  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
-  "X","Y","Z","SP"
+  "r24",  "r25",  "X","Y","Z","SP"
 };
 return llvm::makeArrayRef(GCCRegNames);
   }


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Re: [PATCH] D28343: [AVR] Fix register numbers for in getGCCAddlRegNames()

2017-01-04 Thread Dylan McKay via cfe-commits 
I see, that's a good idea.

I'll revert r291083 and we can go forward with this patch.

On Thu, Jan 5, 2017 at 8:05 PM, Senthil Kumar Selvaraj via Phabricator <
revi...@reviews.llvm.org> wrote:

> saaadhu added a comment.
>
> If you've added X, Y, Z and SP to GCCRegNames, you don't need AddlRegNames
> array at all,
>
> The reason I had them in AddlRegNames was to tell Clang that they alias
> regs in GCCRegNames.  I followed X86TargetInfo's example - it has "ax" in
> GCCRegNames, and "al", "ah", "eax" and "rax" in AddlRegNames. I figured
> Clang could potentially use the fact that they alias when analyzing inline
> asm to detect unintended clobbers.
>
>
> https://reviews.llvm.org/D28343
>
>
>
>
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r291083 - [AVR] Support r26 through r31 in inline assembly

2017-01-04 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Wed Jan  4 23:31:12 2017
New Revision: 291083

URL: http://llvm.org/viewvc/llvm-project?rev=291083=rev
Log:
[AVR] Support r26 through r31 in inline assembly

These are synonyms for the X,Y, and Z registers.

Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291083=291082=291083=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jan  4 23:31:12 2017
@@ -8423,31 +8423,39 @@ public:
 resetDataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
"-f32:32:32-f64:64:64-n8");
   }
+
   void getTargetDefines(const LangOptions ,
 MacroBuilder ) const override {
 Builder.defineMacro("__AVR__");
   }
+
   ArrayRef getTargetBuiltins() const override {
 return None;
   }
+
   BuiltinVaListKind getBuiltinVaListKind() const override {
 return TargetInfo::VoidPtrBuiltinVaList;
   }
+
   const char *getClobbers() const override {
 return "";
   }
+
   ArrayRef getGCCRegNames() const override {
 static const char * const GCCRegNames[] = {
   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
-  "r24",  "r25",  "X","Y","Z","SP"
+  "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",
+  "X","Y","Z","SP"
 };
 return llvm::makeArrayRef(GCCRegNames);
   }
+
   ArrayRef getGCCRegAliases() const override {
 return None;
   }
+
   ArrayRef getGCCAddlRegNames() const override {
 static const TargetInfo::AddlRegName AddlRegNames[] = {
   { { "r26", "r27"}, 26 },
@@ -8457,16 +8465,19 @@ public:
 };
 return llvm::makeArrayRef(AddlRegNames);
   }
+
   bool validateAsmConstraint(const char *,
  TargetInfo::ConstraintInfo ) const override {
 return false;
   }
+
   IntType getIntTypeByWidth(unsigned BitWidth,
 bool IsSigned) const final {
 // AVR prefers int for 16-bit integers.
 return BitWidth == 16 ? (IsSigned ? SignedInt : UnsignedInt)
   : TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
   }
+
   IntType getLeastIntTypeByWidth(unsigned BitWidth,
  bool IsSigned) const final {
 // AVR uses int for int_least16_t and int_fast16_t.


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r291082 - Add AVR target and toolchain to Clang

2017-01-04 Thread Dylan McKay via cfe-commits 
Author: dylanmckay
Date: Wed Jan  4 23:20:27 2017
New Revision: 291082

URL: http://llvm.org/viewvc/llvm-project?rev=291082=rev
Log:
Add AVR target and toolchain to Clang

Summary:
Authored by Senthil Kumar Selvaraj

This patch adds barebones support in Clang for the (experimental) AVR target. 
It uses the integrated assembler for assembly, and the GNU linker for linking, 
as lld doesn't know about the target yet.

The DataLayout string is the same as the one in AVRTargetMachine.cpp. The 
alignment specs look wrong to me, as it's an 8 bit target and all types only 
need 8 bit alignment. Clang failed with a datalayout mismatch error when I 
tried to change it, so I left it that way for now.

Reviewers: rsmith, dylanmckay, cfe-commits, rengolin

Subscribers: rengolin, jroelofs, wdng

Differential Revision: https://reviews.llvm.org/D27123

Added:
cfe/trunk/test/Driver/avr-toolchain.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Driver/Driver.cpp
cfe/trunk/lib/Driver/ToolChains.cpp
cfe/trunk/lib/Driver/ToolChains.h
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/lib/Driver/Tools.h
cfe/trunk/test/Preprocessor/init.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291082=291081=291082=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jan  4 23:20:27 2017
@@ -8385,6 +8385,97 @@ public:
   }
 };
 
+
+// AVR Target
+class AVRTargetInfo : public TargetInfo {
+public:
+  AVRTargetInfo(const llvm::Triple , const TargetOptions &)
+  : TargetInfo(Triple) {
+TLSSupported = false;
+PointerWidth = 16;
+PointerAlign = 8;
+IntWidth = 16;
+IntAlign = 8;
+LongWidth = 32;
+LongAlign = 8;
+LongLongWidth = 64;
+LongLongAlign = 8;
+SuitableAlign = 8;
+DefaultAlignForAttributeAligned = 8;
+HalfWidth = 16;
+HalfAlign = 8;
+FloatWidth = 32;
+FloatAlign = 8;
+DoubleWidth = 32;
+DoubleAlign = 8;
+DoubleFormat = ::APFloat::IEEEsingle();
+LongDoubleWidth = 32;
+LongDoubleAlign = 8;
+LongDoubleFormat = ::APFloat::IEEEsingle();
+SizeType = UnsignedInt;
+PtrDiffType = SignedInt;
+IntPtrType = SignedInt;
+Char16Type = UnsignedInt;
+WCharType = SignedInt;
+WIntType = SignedInt;
+Char32Type = UnsignedLong;
+SigAtomicType = SignedChar;
+resetDataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+   "-f32:32:32-f64:64:64-n8");
+  }
+  void getTargetDefines(const LangOptions ,
+MacroBuilder ) const override {
+Builder.defineMacro("__AVR__");
+  }
+  ArrayRef getTargetBuiltins() const override {
+return None;
+  }
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+return TargetInfo::VoidPtrBuiltinVaList;
+  }
+  const char *getClobbers() const override {
+return "";
+  }
+  ArrayRef getGCCRegNames() const override {
+static const char * const GCCRegNames[] = {
+  "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",
+  "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",
+  "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",
+  "r24",  "r25",  "X","Y","Z","SP"
+};
+return llvm::makeArrayRef(GCCRegNames);
+  }
+  ArrayRef getGCCRegAliases() const override {
+return None;
+  }
+  ArrayRef getGCCAddlRegNames() const override {
+static const TargetInfo::AddlRegName AddlRegNames[] = {
+  { { "r26", "r27"}, 26 },
+  { { "r28", "r29"}, 27 },
+  { { "r30", "r31"}, 28 },
+  { { "SPL", "SPH"}, 29 },
+};
+return llvm::makeArrayRef(AddlRegNames);
+  }
+  bool validateAsmConstraint(const char *,
+ TargetInfo::ConstraintInfo ) const override {
+return false;
+  }
+  IntType getIntTypeByWidth(unsigned BitWidth,
+bool IsSigned) const final {
+// AVR prefers int for 16-bit integers.
+return BitWidth == 16 ? (IsSigned ? SignedInt : UnsignedInt)
+  : TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
+  }
+  IntType getLeastIntTypeByWidth(unsigned BitWidth,
+ bool IsSigned) const final {
+// AVR uses int for int_least16_t and int_fast16_t.
+return BitWidth == 16
+   ? (IsSigned ? SignedInt : UnsignedInt)
+   : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
+  }
+};
+
 } // end anonymous namespace
 
 
//===--===//
@@ -8507,6 +8598,8 @@ static TargetInfo *AllocateTarget(const
   return new ARMbeTargetInfo(Triple, Opts);
 }
 
+  case llvm::Triple::avr:
+return new AVRTargetInfo(Triple, Opts);
   case llvm::Triple::bpfeb:
   case llvm::Triple::bpfel:
 return new BPFTargetInfo(Triple, Opts);

Modified:

Re: [PATCH] D27123: Add AVR target and toolchain to Clang

2017-01-04 Thread Dylan McKay via cfe-commits 
I've just raised a bug here

https://llvm.org/bugs/show_bug.cgi?id=31530

> What's necessary for sign-off? Should I ping the reviewer (Richard Smith)
again?

I think so long as Richard or someone else who actively works on Clang
signs off. Perhaps somebody else is keen to review?

On the other hand, I can review it and then ask if there aren't any
objections to it being in-tree within a few days, I can commit it.

On Wed, Jan 4, 2017 at 7:20 PM, Senthil Kumar Selvaraj <
senthilkumar.selva...@microchip.com> wrote:

>
> Dylan McKay writes:
>
> > Did you get the BugZilla account sorted Senthil?
>
> Nope, direct email also didn't help. Can you please file a bug with
>
> Title:
>
> UINT16_TYPE and INT16_TYPE are defined as short instead of int for AVR
>
> Description:
>
>UINT16_TYPE and INT16_TYPE are implicitly defined by the preprocessor
>to the short type, rather than int. While shorts and ints are both
>16 bits wide on the avr, gcc picks ints to represent 16 bits wherever
>possible, and picking short can cause issues with C++ name mangling
>(see https://reviews.llvm.org/D27123#615854). Therefore, clang should
>define the two types to short.
>
>Clang's lib/Frontend/InitPreprocessor.cpp::DefineExactWidthIntType
> does not
>use TargetInfo::getIntTypeByWidth. Instead,
>InitializePredefinedMacros calls
>the function with the specific type (SignedShort/UnsignedShort), because
>getShortWidth() > getCharWidth(), but getIntWidth() ==
>getShortWidth().
>
>
> What's necessary for sign-off? Should I ping the reviewer (Richard Smith)
> again?
>
> Regards
> Senthil
>
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Re: [PATCH] D27123: Add AVR target and toolchain to Clang

2017-01-04 Thread Dylan McKay via cfe-commits 
Did you get the BugZilla account sorted Senthil?

On Thu, Dec 22, 2016 at 10:47 AM, Nico Weber  wrote:

> On Wed, Dec 21, 2016 at 6:42 AM, Senthil Kumar Selvaraj via Phabricator
> via cfe-commits  wrote:
>
>> saaadhu added a comment.
>>
>> Would someone with a llvm bugzilla account please file the PR for me? New
>> user registration is disabled, and I've been waiting for
>> llvm-ad...@lists.llvm.org to respond for nearly a week now.
>>
>
> Email to...@nondot.org directly, see http://lists.llvm.org/
> pipermail/cfe-dev/2016-December/051921.html
>
>
>>
>> And how should I proceed after that? Would one of the reviewers commit
>> the patch for me?
>>
>>
>> https://reviews.llvm.org/D27123
>>
>>
>>
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Re: [PATCH] D27123: Add AVR target and toolchain to Clang

2016-12-21 Thread Dylan McKay via cfe-commits 
I'm happy to file a bug if you give me a description

> Would one of the reviewers commit the patch for me?

I'm happy to commit it, so long as somebody else signs off on it.

On Thu, Dec 22, 2016 at 12:42 AM, Senthil Kumar Selvaraj via Phabricator <
revi...@reviews.llvm.org> wrote:

> saaadhu added a comment.
>
> Would someone with a llvm bugzilla account please file the PR for me? New
> user registration is disabled, and I've been waiting for
> llvm-ad...@lists.llvm.org to respond for nearly a week now.
>
> And how should I proceed after that? Would one of the reviewers commit the
> patch for me?
>
>
> https://reviews.llvm.org/D27123
>
>
>
>
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