[PATCH] D130766: [SPIR-V] Disable opaque pointers in relese 15

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D130766#3687240 , @Anastasia wrote:

> CC to @linjamaki in case there is anything else/different needed for HIP.

LGMT.


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[PATCH] D125679: [Clang] Added options for integrated backend only used for SPIR-V for now

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

From my point of view this patch LGTM.




Comment at: clang/include/clang/Driver/Options.td:4164-4169
+def fintegrated_objemitter : Flag<["-"], "fintegrated-objemitter">,
+  Flags<[CoreOption, NoXarchOption]>, Group,
+  HelpText<"Use internal machine object code emitter.">;
+def fno_integrated_objemitter : Flag<["-"], "fno-integrated-objemitter">,
+ Flags<[CoreOption, NoXarchOption]>, Group,
+ HelpText<"Use external machine object code emitter.">;

Adjust indentation?


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[PATCH] D110685: [HIPSPV][4/4] Add option to use llc to emit SPIR-V

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki abandoned this revision.
linjamaki added a comment.

Sounds good to me. I’ll make a new patch when there is a need for it and close 
this one.


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[PATCH] D124776: [SPIR-V] Allow setting SPIR-V version via target triple

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added inline comments.



Comment at: llvm/docs/SPIRVUsage.rst:55
+  
==
+ ** Generic SPIR-V target without any vendor-specific settings.
+  
==

Should the explicit `unknown` string default to the generic SPIR-V too? Maybe 
change this to  `''unknown'' or **` here? 



Comment at: llvm/docs/SPIRVUsage.rst:63
+ == 

+ **  Defaults to the OpenCL runtime.
+ == 


`’’unknown’’ or **` here too?



Comment at: llvm/docs/SPIRVUsage.rst:71
+  
==
+ **Defaults to the OpenCL environment.
+  
==

`’’unknown’’ or **` here too?


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[PATCH] D118876: [HIPSPV] Fix literals are mapped to Generic address space

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks for the review, @yaxunl. Could you push this to the LLVM? And to the 
LLVM 14 release branch too, if possible?


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[PATCH] D118876: [HIPSPV] Fix literals are mapped to Generic address space

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added a subscriber: yaxunl.
linjamaki edited the summary of this revision.
Herald added a subscriber: Anastasia.
linjamaki published this revision for review.
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Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This issue is an oversight in D108621 .

Literals in HIP are emitted as global constant variables with default
address space which maps to `Generic` address space for HIPSPV. In
SPIR-V such variables translate to `OpVariable` instructions with
`Generic` storage class which are not legal. Fix by mapping literals
to `CrossWorkGroup` address space.

The literals are not mapped to `UniformConstant` because the “flat” 
pointers in HIP may reference them and “flat” pointers are modeled 
as `Generic` pointers in SPIR-V. In SPIR-V/OpenCL `UniformConstant`
 pointers may not be casted to `Generic`.


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Files:
  clang/lib/CodeGen/CodeGenModule.cpp
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -22,6 +22,9 @@
   int* pi;
 } foo;
 
+// Check literals are placed in address space 1 (CrossWorkGroup/__global).
+// CHECK: @.str ={{.*}} unnamed_addr addrspace(1) constant
+
 // CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z3barPi(i32 
addrspace(4)*
 __device__ int* bar(int *x) {
   return x;
@@ -44,3 +47,8 @@
   // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 
addrspace(4)*
   return 
 }
+
+// CHECK: define{{.*}} spir_func noundef i8 addrspace(4)* @_Z3quzv()
+__device__ const char* quz() {
+  return "abc";
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4381,6 +4381,14 @@
 return LangAS::opencl_constant;
   if (LangOpts.SYCLIsDevice)
 return LangAS::sycl_global;
+  if (LangOpts.HIP && LangOpts.CUDAIsDevice && getTriple().isSPIRV())
+// For HIPSPV map literals to cuda_device (maps to CrossWorkGroup in 
SPIR-V)
+// instead of default AS (maps to Generic in SPIR-V). Otherwise, we end up
+// with OpVariable instructions with Generic storage class which is not
+// allowed (SPIR-V V1.6 s3.42.8). Also, mapping literals to SPIR-V
+// UniformConstant storage class is not viable as pointers to it may not be
+// casted to Generic pointers which are used to model HIP's "flat" 
pointers.
+return LangAS::cuda_device;
   if (auto AS = getTarget().getConstantAddressSpace())
 return AS.getValue();
   return LangAS::Default;


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -22,6 +22,9 @@
   int* pi;
 } foo;
 
+// Check literals are placed in address space 1 (CrossWorkGroup/__global).
+// CHECK: @.str ={{.*}} unnamed_addr addrspace(1) constant
+
 // CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
 __device__ int* bar(int *x) {
   return x;
@@ -44,3 +47,8 @@
   // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 addrspace(4)*
   return 
 }
+
+// CHECK: define{{.*}} spir_func noundef i8 addrspace(4)* @_Z3quzv()
+__device__ const char* quz() {
+  return "abc";
+}
Index: clang/lib/CodeGen/CodeGenModule.cpp
===
--- clang/lib/CodeGen/CodeGenModule.cpp
+++ clang/lib/CodeGen/CodeGenModule.cpp
@@ -4381,6 +4381,14 @@
 return LangAS::opencl_constant;
   if (LangOpts.SYCLIsDevice)
 return LangAS::sycl_global;
+  if (LangOpts.HIP && LangOpts.CUDAIsDevice && getTriple().isSPIRV())
+// For HIPSPV map literals to cuda_device (maps to CrossWorkGroup in SPIR-V)
+// instead of default AS (maps to Generic in SPIR-V). Otherwise, we end up
+// with OpVariable instructions with Generic storage class which is not
+// allowed (SPIR-V V1.6 s3.42.8). Also, mapping literals to SPIR-V
+// UniformConstant storage class is not viable as pointers to it may not be
+// casted to Generic pointers which are used to model HIP's "flat" pointers.
+return LangAS::cuda_device;
   if (auto AS = getTarget().getConstantAddressSpace())
 return AS.getValue();
   return LangAS::Default;
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[PATCH] D117137: [Driver] Add CUDA support for --offload param

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D117137#3269365 , @yaxunl wrote:

> Does that mean only "spirv{64}-unknown-unknown" is acceptable, or 
> "spirv{64}-amd-unknown-unknown" is also acceptable?

Having a vendor component in the triple seems to be acceptable for the SPIR-V 
target.


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[PATCH] D117137: [Driver] Add CUDA support for --offload param

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

SPIR-V target requires that the OS and the environment type is unknown (see 
TargetInfo::AllocateTarget and BaseSPIRTargetInfo). The clang would fail to 
create a SPIR-V target if there is an OS or environment component in the target 
string known by the Triple. This could lead to a misleading error message.


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

This patch should be ready to land. @tra, could you please commit it to the 
LLVM for us? Thanks.


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 395649.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/SemaCUDA/allow-int128.cu
  clang/test/SemaCUDA/spirv-int128.cu


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type 
support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1495,8 +1495,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp
===
--- clang/lib/Sema/Sema.cpp
+++ clang/lib/Sema/Sema.cpp
@@ -1932,7 +1932,8 @@
   };
 
   auto CheckType = [&](QualType Ty, bool IsRetTy = false) {
-if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice))
+if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice) 
||
+LangOpts.CUDAIsDevice)
   CheckDeviceType(Ty);
 
 QualType UnqualTy = Ty.getCanonicalType().getUnqualifiedType();


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1495,8 +1495,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks, @yaxunl.


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Assuming that this patch is ready to land. @tra or @yaxunl, could you please 
commit this patch to the LLVM for us? Thanks.


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[PATCH] D112410: [SPIR-V] Add a toolchain for SPIR-V in clang

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

If I understand correctly, the default optimization level is `-O2` for the 
OpenCL and OpenCL++ language mode (according to 
CompilerInvocation.cpp:getOptimizationLevel()). Since higher than `-O0` may not 
work with the translator, should the SPIR-V tool chain override this default 
and set it to -O0 (unless a user passes some -O option)?


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 394789.
linjamaki added a comment.

Rebase.


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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,31 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// In the future we should be able to specify multiple targets for HIP
+// compilation but currently it is not supported.
+//
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu \
+// RUN:   --offload=foo --offload=bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu -nogpuinc -nogpulib \
+// RUN:   --offload=amdgcn-amd-amdhsa --offload-arch=gfx900 %s \
+// RUN: 2>&1 | FileCheck --check-prefix=OFFLOAD-ARCH-MIX %s
+
+// OFFLOAD-ARCH-MIX: error: option '--offload-arch' cannot be specified with '--offload'
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks, @tra.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

This patch should be ready to land. @tra, could you please commit this to the 
LLVM for us. Thanks.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 394208.
linjamaki added a comment.

Rebase.


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,103 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  void adjustDebugInfoKind(codegenoptions::DebugInfoKind ,
+   const llvm::opt::ArgList ) const override;
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,292 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH 

[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks, @yaxunl.


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[PATCH] D108367: [NFC] computeSPIRKernelABIInfo(): use SPIRABInfo

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki abandoned this revision.
linjamaki added a comment.

D109818  includes the change in this patch.


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[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Assuming this patch is ready to land. @yaxunl, Could you please commit this 
patch to the LLVM for us. Thanks.


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[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 393465.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/HIP.cpp
  clang/lib/Driver/ToolChains/HIP.h
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/lib/Driver/ToolChains/HIPAMD.h
  clang/lib/Driver/ToolChains/HIPUtility.cpp
  clang/lib/Driver/ToolChains/HIPUtility.h

Index: clang/lib/Driver/ToolChains/HIPUtility.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.h
@@ -0,0 +1,35 @@
+//===--- HIPUtility.h - Common HIP Tool Chain Utilities -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+
+#include "clang/Driver/Tool.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIP {
+
+// Construct command for creating HIP fatbin.
+void constructHIPFatbinCommand(Compilation , const JobAction ,
+   StringRef OutputFileName,
+   const InputInfoList ,
+   const llvm::opt::ArgList , const Tool );
+
+// Construct command for creating Object from HIP fatbin.
+void constructGenerateObjFileFromHIPFatBinary(
+Compilation , const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList , const JobAction , const Tool );
+
+} // namespace HIP
+} // namespace tools
+} // namespace driver
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
Index: clang/lib/Driver/ToolChains/HIPUtility.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.cpp
@@ -0,0 +1,166 @@
+//===--- HIPUtility.cpp - Common HIP Tool Chain Utilities ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPUtility.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Path.h"
+
+using namespace clang::driver;
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+#if defined(_WIN32) || defined(_WIN64)
+#define NULL_FILE "nul"
+#else
+#define NULL_FILE "/dev/null"
+#endif
+
+namespace {
+const unsigned HIPCodeObjectAlign = 4096;
+} // namespace
+
+// Constructs a triple string for clang offload bundler.
+static std::string normalizeForBundler(const llvm::Triple ,
+   bool HasTargetID) {
+  return HasTargetID ? (T.getArchName() + "-" + T.getVendorName() + "-" +
+T.getOSName() + "-" + T.getEnvironmentName())
+   .str()
+ : T.normalize();
+}
+
+// Construct a clang-offload-bundler command to bundle code objects for
+// different devices into a HIP fat binary.
+void HIP::constructHIPFatbinCommand(Compilation , const JobAction ,
+StringRef OutputFileName,
+const InputInfoList ,
+const llvm::opt::ArgList ,
+const Tool ) {
+  // Construct clang-offload-bundler command to bundle object files for
+  // for different GPU archs.
+  ArgStringList BundlerArgs;
+  BundlerArgs.push_back(Args.MakeArgString("-type=o"));
+  BundlerArgs.push_back(
+  Args.MakeArgString("-bundle-align=" + Twine(HIPCodeObjectAlign)));
+
+  // ToDo: Remove the dummy host binary entry which is required by
+  // clang-offload-bundler.
+  std::string BundlerTargetArg = "-targets=host-x86_64-unknown-linux";
+  std::string BundlerInputArg = "-inputs=" NULL_FILE;
+
+  // AMDGCN:
+  // For code object version 2 and 3, the offload kind in bundle ID is 'hip'
+  // for backward compatibility. For code object version 4 and greater, the
+  // offload kind in bundle ID is 'hipv4'.
+  std::string OffloadKind = "hip";
+  auto  = T.getToolChain().getTriple();
+  if (TT.isAMDGCN() && getAMDGPUCodeObjectVersion(C.getDriver(), Args) >= 4)
+OffloadKind = OffloadKind + "v4";
+  for (const auto  : Inputs) {
+const auto *A = II.getAction();
+auto ArchStr = StringRef(A->getOffloadingArch());
+

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks, @bader.


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks for the feedback. The `--offload` is meant to support multiple targets 
but right now it is restricted to one at most. The limitation comes from the 
HIPActionBuilder and CudaActionBuilderBase which currently expects a single 
target triple and toolchain for all offload devices. To relax the `--offload` 
target count cap we would need to adjust the action builders to support 
multiple target triples and create a separate toolchain for each (unique) 
target triple.

Details for  the `--offload` option for specifying multiple targets are left 
open in this patch. What this patch needs is at least an ability to specify a 
single target (e.g. `--offload=spirv64`).


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 392675.
linjamaki added a comment.

- Add comments to clarify the limitation of the `--offload` option to one 
target.

- Add test for multiple `--offload` option instances.


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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,31 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// In the future we should be able to specify multiple targets for HIP
+// compilation but currently it is not supported.
+//
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu \
+// RUN:   --offload=foo --offload=bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu -nogpuinc -nogpulib \
+// RUN:   --offload=amdgcn-amd-amdhsa --offload-arch=gfx900 %s \
+// RUN: 2>&1 | FileCheck --check-prefix=OFFLOAD-ARCH-MIX %s
+
+// OFFLOAD-ARCH-MIX: error: option '--offload-arch' cannot be specified with '--offload'
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 392665.
linjamaki added a comment.

Rebase.


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,103 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  void adjustDebugInfoKind(codegenoptions::DebugInfoKind ,
+   const llvm::opt::ArgList ) const override;
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,292 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH 

[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 392664.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/HIP.cpp
  clang/lib/Driver/ToolChains/HIP.h
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/lib/Driver/ToolChains/HIPAMD.h
  clang/lib/Driver/ToolChains/HIPUtility.cpp
  clang/lib/Driver/ToolChains/HIPUtility.h

Index: clang/lib/Driver/ToolChains/HIPUtility.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.h
@@ -0,0 +1,35 @@
+//===--- HIPUtility.h - Common HIP Tool Chain Utilities -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+
+#include "clang/Driver/Tool.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIP {
+
+// Construct command for creating HIP fatbin.
+void constructHIPFatbinCommand(Compilation , const JobAction ,
+   StringRef OutputFileName,
+   const InputInfoList ,
+   const llvm::opt::ArgList , const Tool );
+
+// Construct command for creating Object from HIP fatbin.
+void constructGenerateObjFileFromHIPFatBinary(
+Compilation , const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList , const JobAction , const Tool );
+
+} // namespace HIP
+} // namespace tools
+} // namespace driver
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
Index: clang/lib/Driver/ToolChains/HIPUtility.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.cpp
@@ -0,0 +1,166 @@
+//===--- HIPUtility.cpp - Common HIP Tool Chain Utilities ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPUtility.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Path.h"
+
+using namespace clang::driver;
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+#if defined(_WIN32) || defined(_WIN64)
+#define NULL_FILE "nul"
+#else
+#define NULL_FILE "/dev/null"
+#endif
+
+namespace {
+const unsigned HIPCodeObjectAlign = 4096;
+} // namespace
+
+// Constructs a triple string for clang offload bundler.
+static std::string normalizeForBundler(const llvm::Triple ,
+   bool HasTargetID) {
+  return HasTargetID ? (T.getArchName() + "-" + T.getVendorName() + "-" +
+T.getOSName() + "-" + T.getEnvironmentName())
+   .str()
+ : T.normalize();
+}
+
+// Construct a clang-offload-bundler command to bundle code objects for
+// different devices into a HIP fat binary.
+void HIP::constructHIPFatbinCommand(Compilation , const JobAction ,
+StringRef OutputFileName,
+const InputInfoList ,
+const llvm::opt::ArgList ,
+const Tool ) {
+  // Construct clang-offload-bundler command to bundle object files for
+  // for different GPU archs.
+  ArgStringList BundlerArgs;
+  BundlerArgs.push_back(Args.MakeArgString("-type=o"));
+  BundlerArgs.push_back(
+  Args.MakeArgString("-bundle-align=" + Twine(HIPCodeObjectAlign)));
+
+  // ToDo: Remove the dummy host binary entry which is required by
+  // clang-offload-bundler.
+  std::string BundlerTargetArg = "-targets=host-x86_64-unknown-linux";
+  std::string BundlerInputArg = "-inputs=" NULL_FILE;
+
+  // AMDGCN:
+  // For code object version 2 and 3, the offload kind in bundle ID is 'hip'
+  // for backward compatibility. For code object version 4 and greater, the
+  // offload kind in bundle ID is 'hipv4'.
+  std::string OffloadKind = "hip";
+  auto  = T.getToolChain().getTriple();
+  if (TT.isAMDGCN() && getAMDGPUCodeObjectVersion(C.getDriver(), Args) >= 4)
+OffloadKind = OffloadKind + "v4";
+  for (const auto  : Inputs) {
+const auto *A = II.getAction();
+auto ArchStr = StringRef(A->getOffloadingArch());
+

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Cherry-picking should work now, @bader.


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[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 392662.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenHIP/hipspv-kernel.cpp

Index: clang/test/CodeGenHIP/hipspv-kernel.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-kernel.cpp
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __global__ __attribute__((global))
+
+// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}})
+__global__ void foo(float *a, float b) {
+  *a = b;
+}
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10228,12 +10228,23 @@
 private:
   void setCCs();
 };
+
+class SPIRVABIInfo : public CommonSPIRABIInfo {
+public:
+  SPIRVABIInfo(CodeGenTypes ) : CommonSPIRABIInfo(CGT) {}
+  void computeInfo(CGFunctionInfo ) const override;
+
+private:
+  ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+};
 } // end anonymous namespace
 namespace {
 class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   CommonSPIRTargetCodeGenInfo(CodeGen::CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
+  CommonSPIRTargetCodeGenInfo(std::unique_ptr ABIInfo)
+  : TargetCodeGenInfo(std::move(ABIInfo)) {}
 
   LangAS getASTAllocaAddressSpace() const override {
 return getLangASFromTargetAS(
@@ -10242,18 +10253,60 @@
 
   unsigned getOpenCLKernelCallingConv() const override;
 };
-
+class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
+public:
+  SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes )
+  : CommonSPIRTargetCodeGenInfo(std::make_unique(CGT)) {}
+  void setCUDAKernelCallingConvention(const FunctionType *) const override;
+};
 } // End anonymous namespace.
+
 void CommonSPIRABIInfo::setCCs() {
   assert(getRuntimeCC() == llvm::CallingConv::C);
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP) {
+// Coerce pointer arguments with default address space to CrossWorkGroup
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);
+auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
+auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+if (LTy->isPointerTy() && LTy->getPointerAddressSpace() == DefaultAS) {
+  LTy = llvm::PointerType::get(
+  cast(LTy)->getElementType(), GlobalAS);
+  return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+}
+  }
+  return classifyArgumentType(Ty);
+}
+
+void SPIRVABIInfo::computeInfo(CGFunctionInfo ) const {
+  // The logic is same as in DefaultABIInfo with an exception on the kernel
+  // arguments handling.
+  llvm::CallingConv::ID CC = FI.getCallingConvention();
+
+  if (!getCXXABI().classifyReturnType(FI))
+FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+
+  for (auto  : FI.arguments()) {
+if (CC == llvm::CallingConv::SPIR_KERNEL) {
+  I.info = classifyKernelArgumentType(I.type);
+} else {
+  I.info = classifyArgumentType(I.type);
+}
+  }
+}
+
 namespace clang {
 namespace CodeGen {
 void computeSPIRKernelABIInfo(CodeGenModule , CGFunctionInfo ) {
-  DefaultABIInfo SPIRABI(CGM.getTypes());
-  SPIRABI.computeInfo(FI);
+  if (CGM.getTarget().getTriple().isSPIRV())
+SPIRVABIInfo(CGM.getTypes()).computeInfo(FI);
+  else
+CommonSPIRABIInfo(CGM.getTypes()).computeInfo(FI);
 }
 }
 }
@@ -10262,6 +10315,16 @@
   return llvm::CallingConv::SPIR_KERNEL;
 }
 
+void SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
+const FunctionType *) const {
+  // Convert HIP kernels to SPIR-V kernels.
+  if (getABIInfo().getContext().getLangOpts().HIP) {
+FT = getABIInfo().getContext().adjustFunctionType(
+FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
+return;
+  }
+}
+
 static bool appendType(SmallStringEnc , QualType QType,
const CodeGen::CodeGenModule ,
TypeStringCache );
@@ -11327,9 +11390,10 @@
 return SetCGInfo(new ARCTargetCodeGenInfo(Types));
   case llvm::Triple::spir:
   case llvm::Triple::spir64:
+return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
   case llvm::Triple::spirv32:
   case llvm::Triple::spirv64:
-return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
+return SetCGInfo(new SPIRVTargetCodeGenInfo(Types));
   case llvm::Triple::ve:
 return SetCGInfo(new VETargetCodeGenInfo(Types));
   }

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

The patch is ready to land. @Anastasia, @bader, could you commit this patch to 
the LLVM for us? Thanks.


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[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks, @Anastasia.


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

@tra, gentle ping.


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[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

@Anastasia, Could you please commit this patch to the LLVM for us? Thanks.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 389702.
linjamaki added a comment.

Disable debug info generation for device code.


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,103 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  void adjustDebugInfoKind(codegenoptions::DebugInfoKind ,
+   const llvm::opt::ArgList ) const override;
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,292 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D110618#3148501 , @Anastasia wrote:

> Could you please clarify the interface to SPIRV-LLVM-Translator tool, 
> specifically:
>
> - Does clang lookup the path to the translator or assume any default path?

HIPSPV primarily relies on the system’s PATH for locating the translator.

Additionally, the translator is sought in the same directory where the Clang 
driver is installed in. This is rather a side-effect than a feature. The 
directory is added to Clang’s internal search paths for looking up the 
`clang-offload-bundler` tool required by the HIPSPV tool chain.

> - Is there any diagnostic provided if the translator not installed/found?

Clang displays the following standard error if the translator is not found:

  error: unable to execute command: Executable "llvm-spirv" doesn't exist!



> - How does clang synchronize with the translator versions i.e. some LLVM IR 
> might not be ingested by certain version of the translator. Would this 
> results in the translator ICE or error in the translator, or is it something 
> that can be diagnosed early by clang or during clang build/installation?

A version mismatch may result in an error in the translator. This is a known 
issue and a reason we want to switch to the SPIR-V backend when it lands on the 
LLVM - **the translator is meant to be used temporarily by the HIPSPV**. The 
synchronization could be improved by having the Clang to seek a SPIR-V 
Translator binary that is named with the LLVM version it has been built against 
- e.g. “llvm-spirv-14” for the next LLVM release.

AFAIK, Clang’s infrastructure does not support early diagnosis on external 
tools. The diagnosis during Clang’s build and installation probably won’t 
matter much if the Clang is distributed as binary to other systems - the 
destination system might not have the required translator version.


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[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks for the review.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki marked 4 inline comments as done.
linjamaki added a comment.

Thanks for the review.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 389118.
linjamaki added a comment.

Retry push changes.


Repository:
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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,102 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,283 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 389114.
linjamaki marked 2 inline comments as done.
linjamaki added a comment.

Update a driver test case.


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,24 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu -nogpuinc -nogpulib \
+// RUN:   --offload=amdgcn-amd-amdhsa --offload-arch=gfx900 %s \
+// RUN: 2>&1 | FileCheck --check-prefix=OFFLOAD-ARCH-MIX %s
+
+// OFFLOAD-ARCH-MIX: error: option '--offload-arch' cannot be specified with '--offload'
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit objects for host side path
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 389112.
linjamaki added a comment.

Combine options with append().


Repository:
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  https://reviews.llvm.org/D110618/new/

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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,102 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,288 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//

[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks for the help!


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki marked 2 inline comments as done.
linjamaki added inline comments.



Comment at: clang/include/clang/Basic/Cuda.h:109
+  // Generic processor model is for testing only.
+  return A >= CudaArch::GFX600 && A <= CudaArch::GFX1035;
 }

yaxunl wrote:
> can we use A < CudaArch::Generic instead? to avoid updating this line each 
> time we add a new gfx arch.
Changed as suggested.



Comment at: clang/include/clang/Driver/Options.td:1136
+def offload_EQ : CommaJoined<["--"], "offload=">, Flags<[NoXarchOption]>,
+  HelpText<"Specify comma-separated list of offloading targets.">;
+

yaxunl wrote:
> linjamaki wrote:
> > tra wrote:
> > > `comma-separated list of offloading targets.` is, unfortunately, somewhat 
> > > ambiguous.
> > > Does it mean "how the offload will be done". I.e. HSA, OpenMP, SPIRV, 
> > > CUDA? 
> > > Or does it mean specific hardware we need to generate the code for? 
> > > The code suggests it's a variant of the former, but the option 
> > > description does not. 
> > > 
> > > E.g. `offload_arch_EQ ` also uses the term "offloading target" but with a 
> > > different meaning.
> > > 
> > I’m not sure how to rephrase the option description to be more clear. In 
> > the [1] the `--offload` option is envisioned to be quite 
> > flexible/expressive - it can take in target triples, offload kinds, 
> > processors, aliases for processor sets, etc.
> > 
> > FYI, I have imagined that the `--offload` option would take in explicit 
> > offload kind and target triple combinations as the basis. For example, 
> > something like this:
> > 
> > 
> > ```
> > --offload=hip-amdgcn-amd-amdhsa,openmp-x86_64-pc-linux-gnu
> > ```
> > 
> > And top of that, there would be predefined strings/shortcuts/aliases that 
> > expand to the basic form. For example, 
> > `--offload=sm_70,openmp-host` could expand to something like:
> > 
> > 
> > ```
> > --offload=cuda-nvptx64-nvidia-cuda,openmp-x86_64-pc-linux-gnu 
> > -Xoffload=cuda-nvptx64-nvidia-cuda -march=sm_70 ...
> > 
> > ```
> > Then there is a feature as discussed in [1] that the offload kind can be 
> > dropped if it can be inferred by other means (e.g. from `-x hip` option). 
> > 
> The description better matches the current implementation.
> 
> By this patch, `--offload=` only supports specifying target triple for HIP 
> and assumes default processor. The description should reflect that.
> 
> In the future, as `--offload=` supports more values, the description may be 
> updated.
> 
> Also, `--offload=` is designed to be mutually exclusive with 
> `--offload-arch=`. Probably we should check and diagnose that.
Thanks for the feedback. The option description has been changed to reflect the 
current state. 


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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 388146.
linjamaki added a comment.

- Adjust `--offload` description: reflect the current state.
- Adjust enum range check in IsAMDGpuArch().
- Make `--offload` and `--offload-arch` options mutually exclusive.


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110622/new/

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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,24 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu -nogpuinc -nogpulib \
+// RUN:   --offload=amdgcn-amd-amdhsa --offload-arch=gfx900 %s \
+// RUN: 2>&1 | FileCheck --check-prefix=OFFLOAD-ARCH-MIX %s
+
+// OFFLOAD-ARCH-MIX: error: option '--offload-arch' cannot be specified with '--offload'
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit 

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Gentle ping.


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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Gentle ping.


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[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Ping?


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[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Hi @Anastasia and @bader,

This patch should be ready to land, I think. Could you please push it to the 
LLVM for us? Thanks.


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387511.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/SemaCUDA/allow-int128.cu
  clang/test/SemaCUDA/spirv-int128.cu


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type 
support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,8 +1496,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp
===
--- clang/lib/Sema/Sema.cpp
+++ clang/lib/Sema/Sema.cpp
@@ -1932,7 +1932,8 @@
   };
 
   auto CheckType = [&](QualType Ty, bool IsRetTy = false) {
-if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice))
+if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice) 
||
+LangOpts.CUDAIsDevice)
   CheckDeviceType(Ty);
 
 QualType UnqualTy = Ty.getCanonicalType().getUnqualifiedType();


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,8 +1496,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp

[PATCH] D110685: [HIPSPV][4/4] Add option to use llc to emit SPIR-V

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387510.
linjamaki added a comment.

Rebase.


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Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/test/Driver/hipspv-options.hip


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+assert(A->getNumValues() <= 1);
+const char *LlcExe = nullptr;
+if (A->getNumValues() == 1 && !StringRef(A->getValue()).empty())
+  LlcExe = A->getValue();
+else
+  LlcExe = Args.MakeArgString(getToolChain().GetProgramPath("llc"));
+ArgStringList LlcArgs{"--mattr=+spirv1.1", "--filetype=obj", TempFile, 
"-o",
+  Output.getFilename()};
+C.addCommand(std::make_unique(JA, *this,
+   ResponseFileSupport::None(), LlcExe,
+   LlcArgs, Inputs, Output));
+return;
+  }
+
+  // Use SPIRV-LLVM Translator.
   llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
   "--spirv-ext=+all"};
   InputInfo TrInput = InputInfo(types::TY_LLVM_BC, TempFile, "");
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1539,6 +1539,14 @@
 Group, Flags<[CC1Option]>, MetaVarName<"">,
 HelpText<"Enable heap memory profiling and dump results into ">;
 
+def spirv_use_llc : Flag<["--"], "spirv-use-llc">, Flags<[HelpHidden]>,
+HelpText<"Use (in-tree) llc to emit SPIR-V. Use for development and "
+"testing only.">;
+def spirv_use_llc_EQ : Joined<["--"], "spirv-use-llc=">,
+MetaVarName<"">, Flags<[HelpHidden]>,
+HelpText<"Use speficied llc to emit SPIR-V. Use for development and "
+"testing only.">;
+
 // Begin sanitizer flags. These should all be core options exposed in all 
driver
 // modes.
 let Flags = [CC1Option, CoreOption] in {


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+assert(A->getNumValues() <= 1);
+const char *LlcExe = nullptr;
+if (A->getNumValues() == 1 && !StringRef(A->getValue()).empty())
+  LlcExe = A->getValue();
+else
+  LlcExe = Args.MakeArgString(getToolChain().GetProgramPath("llc"));
+ArgStringList LlcArgs{"--mattr=+spirv1.1", "--filetype=obj", TempFile, "-o",
+  Output.getFilename()};
+C.addCommand(std::make_unique(JA, *this,
+   ResponseFileSupport::None(), LlcExe,
+   LlcArgs, Inputs, Output));
+return;
+  }
+
+  // Use SPIRV-LLVM Translator.
   llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
 

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387509.
linjamaki added a comment.
Herald added a subscriber: asavonic.

Rebase.


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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,18 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo   \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit objects for host side path
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fgpu-rdc"
+// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
+// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
+
+// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387508.
linjamaki added a comment.

Rebase.


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  https://reviews.llvm.org/D110618/new/

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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,102 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault(const llvm::opt::ArgList ) const override {
+return false;
+  }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,288 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//

[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387507.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110549/new/

https://reviews.llvm.org/D110549

Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/HIP.cpp
  clang/lib/Driver/ToolChains/HIP.h
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/lib/Driver/ToolChains/HIPAMD.h
  clang/lib/Driver/ToolChains/HIPUtility.cpp
  clang/lib/Driver/ToolChains/HIPUtility.h

Index: clang/lib/Driver/ToolChains/HIPUtility.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.h
@@ -0,0 +1,35 @@
+//===--- HIPUtility.h - Common HIP Tool Chain Utilities -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+
+#include "clang/Driver/Tool.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIP {
+
+// Construct command for creating HIP fatbin.
+void constructHIPFatbinCommand(Compilation , const JobAction ,
+   StringRef OutputFileName,
+   const InputInfoList ,
+   const llvm::opt::ArgList , const Tool );
+
+// Construct command for creating Object from HIP fatbin.
+void constructGenerateObjFileFromHIPFatBinary(
+Compilation , const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList , const JobAction , const Tool );
+
+} // namespace HIP
+} // namespace tools
+} // namespace driver
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
Index: clang/lib/Driver/ToolChains/HIPUtility.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.cpp
@@ -0,0 +1,155 @@
+//===--- HIPUtility.cpp - Common HIP Tool Chain Utilities ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPUtility.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Path.h"
+
+using namespace clang::driver;
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+#if defined(_WIN32) || defined(_WIN64)
+#define NULL_FILE "nul"
+#else
+#define NULL_FILE "/dev/null"
+#endif
+
+namespace {
+const unsigned HIPCodeObjectAlign = 4096;
+} // namespace
+
+// Constructs a triple string for clang offload bundler.
+static std::string normalizeForBundler(const llvm::Triple ,
+   bool HasTargetID) {
+  return HasTargetID ? (T.getArchName() + "-" + T.getVendorName() + "-" +
+T.getOSName() + "-" + T.getEnvironmentName())
+   .str()
+ : T.normalize();
+}
+
+// Construct a clang-offload-bundler command to bundle code objects for
+// different devices into a HIP fat binary.
+void HIP::constructHIPFatbinCommand(Compilation , const JobAction ,
+StringRef OutputFileName,
+const InputInfoList ,
+const llvm::opt::ArgList ,
+const Tool ) {
+  // Construct clang-offload-bundler command to bundle object files for
+  // for different GPU archs.
+  ArgStringList BundlerArgs;
+  BundlerArgs.push_back(Args.MakeArgString("-type=o"));
+  BundlerArgs.push_back(
+  Args.MakeArgString("-bundle-align=" + Twine(HIPCodeObjectAlign)));
+
+  // ToDo: Remove the dummy host binary entry which is required by
+  // clang-offload-bundler.
+  std::string BundlerTargetArg = "-targets=host-x86_64-unknown-linux";
+  std::string BundlerInputArg = "-inputs=" NULL_FILE;
+
+  // AMDGCN:
+  // For code object version 2 and 3, the offload kind in bundle ID is 'hip'
+  // for backward compatibility. For code object version 4 and greater, the
+  // offload kind in bundle ID is 'hipv4'.
+  std::string OffloadKind = "hip";
+  auto  = T.getToolChain().getTriple();
+  if (TT.isAMDGCN() && getAMDGPUCodeObjectVersion(C.getDriver(), Args) >= 4)
+OffloadKind = OffloadKind + "v4";
+  for (const auto  : Inputs) {
+const auto *A = II.getAction();
+auto ArchStr = StringRef(A->getOffloadingArch());
+

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387506.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109818/new/

https://reviews.llvm.org/D109818

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenHIP/hipspv-kernel.cpp

Index: clang/test/CodeGenHIP/hipspv-kernel.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-kernel.cpp
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __global__ __attribute__((global))
+
+// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}})
+__global__ void foo(float *a, float b) {
+  *a = b;
+}
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10183,12 +10183,23 @@
 private:
   void setCCs();
 };
+
+class SPIRVABIInfo : public CommonSPIRABIInfo {
+public:
+  SPIRVABIInfo(CodeGenTypes ) : CommonSPIRABIInfo(CGT) {}
+  void computeInfo(CGFunctionInfo ) const override;
+
+private:
+  ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+};
 } // end anonymous namespace
 namespace {
 class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   CommonSPIRTargetCodeGenInfo(CodeGen::CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
+  CommonSPIRTargetCodeGenInfo(std::unique_ptr ABIInfo)
+  : TargetCodeGenInfo(std::move(ABIInfo)) {}
 
   LangAS getASTAllocaAddressSpace() const override {
 return getLangASFromTargetAS(
@@ -10197,18 +10208,60 @@
 
   unsigned getOpenCLKernelCallingConv() const override;
 };
-
+class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
+public:
+  SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes )
+  : CommonSPIRTargetCodeGenInfo(std::make_unique(CGT)) {}
+  void setCUDAKernelCallingConvention(const FunctionType *) const override;
+};
 } // End anonymous namespace.
+
 void CommonSPIRABIInfo::setCCs() {
   assert(getRuntimeCC() == llvm::CallingConv::C);
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP) {
+// Coerce pointer arguments with default address space to CrossWorkGroup
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);
+auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
+auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+if (LTy->isPointerTy() && LTy->getPointerAddressSpace() == DefaultAS) {
+  LTy = llvm::PointerType::get(
+  cast(LTy)->getElementType(), GlobalAS);
+  return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+}
+  }
+  return classifyArgumentType(Ty);
+}
+
+void SPIRVABIInfo::computeInfo(CGFunctionInfo ) const {
+  // The logic is same as in DefaultABIInfo with an exception on the kernel
+  // arguments handling.
+  llvm::CallingConv::ID CC = FI.getCallingConvention();
+
+  if (!getCXXABI().classifyReturnType(FI))
+FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+
+  for (auto  : FI.arguments()) {
+if (CC == llvm::CallingConv::SPIR_KERNEL) {
+  I.info = classifyKernelArgumentType(I.type);
+} else {
+  I.info = classifyArgumentType(I.type);
+}
+  }
+}
+
 namespace clang {
 namespace CodeGen {
 void computeSPIRKernelABIInfo(CodeGenModule , CGFunctionInfo ) {
-  DefaultABIInfo SPIRABI(CGM.getTypes());
-  SPIRABI.computeInfo(FI);
+  if (CGM.getTarget().getTriple().isSPIRV())
+SPIRVABIInfo(CGM.getTypes()).computeInfo(FI);
+  else
+CommonSPIRABIInfo(CGM.getTypes()).computeInfo(FI);
 }
 }
 }
@@ -10217,6 +10270,16 @@
   return llvm::CallingConv::SPIR_KERNEL;
 }
 
+void SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
+const FunctionType *) const {
+  // Convert HIP kernels to SPIR-V kernels.
+  if (getABIInfo().getContext().getLangOpts().HIP) {
+FT = getABIInfo().getContext().adjustFunctionType(
+FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
+return;
+  }
+}
+
 static bool appendType(SmallStringEnc , QualType QType,
const CodeGen::CodeGenModule ,
TypeStringCache );
@@ -11282,9 +11345,10 @@
 return SetCGInfo(new ARCTargetCodeGenInfo(Types));
   case llvm::Triple::spir:
   case llvm::Triple::spir64:
+return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
   case llvm::Triple::spirv32:
   case llvm::Triple::spirv64:
-return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
+return SetCGInfo(new SPIRVTargetCodeGenInfo(Types));
   case llvm::Triple::ve:
 return SetCGInfo(new VETargetCodeGenInfo(Types));
   }

[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added inline comments.



Comment at: clang/lib/Basic/Targets/SPIR.h:233
+if (Opts.HIP && Opts.CUDAIsDevice)
+  // Enable address space mapping from HIP to SPIR-V.
+  // See comment on the SPIRDefIsGenMap table.

Anastasia wrote:
> linjamaki wrote:
> > Anastasia wrote:
> > > My guess is that this is not only HIP specific but for example the same 
> > > applies to SYCL.
> > > 
> > > I am not sure if it makes more sense to move this into a 
> > > `BaseSPIRTargetInfo` since this is not really SPIR-V specific logic. It 
> > > is just a clang design misalignment between two address space concepts 
> > > that has to be addressed properly at some point.
> > > 
> > The DefaultIsGeneric AS mapping is enabled for SYCL in the 
> > BaseSPIRTargetInfo::adjust (which also means the mapping is available for 
> > both the SPIR and SPIR-V targets). On the other hand, the AS mapping for 
> > HIPSPV is enabled in SPIRVTargetInfo::adjust only as we intend to emit 
> > SPIR-V only. I’m under the impression that this is what was wanted.
> I think the issues here is not related to the target but to the flaw in the 
> address space design in clang. So right now all languages that don't derive 
> the address space semantic from embedded C (SYCL/CUDA/HIP) would need to 
> reset the address space map. See FIXME comment in the definition of `adjust`.
> 
> So the right thing to do would be to set the address space map correctly 
> straight away based on the language being compiled for which would avoid 
> overriding this in `adjust`. But if we do override it then it makes more 
> sense to at least unify the logic among targets.
> 
> 
> > 
> > On the other hand, the AS mapping for HIPSPV is enabled in 
> > SPIRVTargetInfo::adjust only as we intend to emit SPIR-V only. 
> > 
> 
> 
> I am not really sure how you would support one target only.
> Clang architecture (at least originally) assumes that all languages can map 
> to all targets which in practice is not true in some cases. This is why we 
> need to provide an address space map even for targets that have no memory 
> segmented language compiled to it. 

> So the right thing to do would be to set the address space map correctly 
> straight away based on the language being compiled for which would avoid 
> overriding this in `adjust`. But if we do override it then it makes more 
> sense to at least unify the logic among targets.
> 

Since we are not sure how we would solve this issue optimally, we adjusted the 
patch to avoid adding more overrides for the `adjust` method and the logic 
previously in the `SPIRVTargetInfo::adjust` is moved to 
`BaseSPIRTargetInfo::adjust` with the SYCL.  Would this be sufficient for the 
functionality added by this patch?

> I am not really sure how you would support one target only.
> Clang architecture (at least originally) assumes that all languages can map 
> to all targets which in practice is not true in some cases. This is why we 
> need to provide an address space map even for targets that have no memory 
> segmented language compiled to it. 

“HIPSPV” is not meant to be a new language. We are just adjusting the address 
space mapping from the HIP language (for device code) to SPIR-V that suits 
better than the default mapping where all the HIP address spaces would be 
mapped to target address space zero. We map the address spaces to the suitable 
ones in the OpenCL standard, which works both for HIPCL (which uses the 
OpenCL-based runtime and the OpenCL SPIR-V profile) and HIPLZ (which uses the 
LZ-based runtime and also the OpenCL SPIR-V profile).


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[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387500.
linjamaki added a comment.

Rebase, add asserts and move address space map reset for HIP from 
SPIRVTargetInfo to BaseSPIRTargetInfo


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108621/new/

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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp

Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 addrspace(4)*
+  return 
+}
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -56,9 +56,14 @@
 0, // opencl_generic
 0, // opencl_global_device
 0, // opencl_global_host
-0, // cuda_device
-0, // cuda_constant
-0, // cuda_shared
+// cuda_* address space mapping is intended for HIPSPV (HIP to SPIR-V
+// translation). This mapping is enabled when the language mode is HIP.
+1, // cuda_device
+// cuda_constant pointer can be casted to default/"flat" pointer, but in
+// SPIR-V casts between constant and generic pointers are not allowed. For
+// this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
+1, // cuda_constant
+3, // cuda_shared
 1, // sycl_global
 5, // sycl_global_device
 6, // sycl_global_host
@@ -74,6 +79,8 @@
 protected:
   BaseSPIRTargetInfo(const llvm::Triple , const TargetOptions &)
   : TargetInfo(Triple) {
+assert((Triple.isSPIR() || Triple.isSPIRV()) &&
+   "Invalid architecture for SPIR or SPIR-V.");
 assert(getTriple().getOS() == llvm::Triple::UnknownOS &&
"SPIR(-V) target must use unknown OS");
 assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
@@ -137,11 +144,16 @@
 // FIXME: SYCL specification considers unannotated pointers and references
 // to be pointing to the generic address space. See section 5.9.3 of
 // SYCL 2020 specification.
-// Currently, there is no way of representing SYCL's default address space
-// language semantic along with the semantics of embedded C's default
-// address space in the same address space map. Hence the map needs to be
-// reset to allow mapping to the desired value of 'Default' entry for SYCL.
-setAddressSpaceMap(/*DefaultIsGeneric=*/Opts.SYCLIsDevice);
+// Currently, there is no way of representing SYCL's and HIP's default
+// address space language semantic along with the semantics of embedded C's
+// default address space in the same address space map. Hence the map needs
+// to be reset to allow mapping to the desired value of 'Default' entry for
+// SYCL and HIP.
+setAddressSpaceMap(
+/*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
+// The address mapping from HIP language for device code is only defined
+// for SPIR-V.
+(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
   }
 
   void setSupportedOpenCLOpts() override {
@@ -159,6 +171,7 @@
 public:
   SPIRTargetInfo(const llvm::Triple , const TargetOptions )
   : BaseSPIRTargetInfo(Triple, Opts) {
+assert(Triple.isSPIR() && "Invalid architecture for SPIR.");
 assert(getTriple().getOS() == llvm::Triple::UnknownOS &&
"SPIR target must use unknown OS");
 assert(getTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
@@ -177,6 +190,8 @@
 public:
   

[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 387499.
linjamaki marked an inline comment as done.
linjamaki added a comment.

Rebase.


Repository:
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Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h

Index: clang/lib/Driver/ToolChains/SPIRV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.h
@@ -0,0 +1,46 @@
+//===--- SPIRV.h - SPIR-V Tool Implementations --*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace SPIRV {
+
+void addTranslatorArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList );
+
+void constructTranslateCommand(Compilation , const Tool ,
+   const JobAction , const InputInfo ,
+   const InputInfo ,
+   const llvm::opt::ArgStringList );
+
+class LLVM_LIBRARY_VISIBILITY Translator : public Tool {
+public:
+  Translator(const ToolChain )
+  : Tool("SPIR-V::Translator", "llvm-spirv", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+  bool hasIntegratedAssembler() const override { return true; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+};
+
+} // namespace SPIRV
+} // namespace tools
+} // namespace driver
+} // namespace clang
+#endif
Index: clang/lib/Driver/ToolChains/SPIRV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.cpp
@@ -0,0 +1,48 @@
+//===--- SPIRV.cpp - SPIR-V Tool Implementations *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+#include "SPIRV.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "clang/Driver/Driver.h"
+#include "clang/Driver/InputInfo.h"
+#include "clang/Driver/Options.h"
+
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+void SPIRV::constructTranslateCommand(Compilation , const Tool ,
+  const JobAction ,
+  const InputInfo ,
+  const InputInfo ,
+  const llvm::opt::ArgStringList ) {
+  llvm::opt::ArgStringList CmdArgs(Args);
+  CmdArgs.push_back(Input.getFilename());
+
+  if (Input.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-to-binary");
+  if (Output.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-spirv-text");
+
+  CmdArgs.append({"-o", Output.getFilename()});
+
+  const char *Exec =
+  C.getArgs().MakeArgString(T.getToolChain().GetProgramPath("llvm-spirv"));
+  C.addCommand(std::make_unique(JA, T, ResponseFileSupport::None(),
+ Exec, CmdArgs, Input, Output));
+}
+
+void SPIRV::Translator::ConstructJob(Compilation , const JobAction ,
+ const InputInfo ,
+ const InputInfoList ,
+ const ArgList ,
+ const char *LinkingOutput) const {
+  claimNoWarnArgs(Args);
+  if (Inputs.size() != 1)
+llvm_unreachable("Invalid number of input files.");
+  constructTranslateCommand(C, *this, JA, Output, Inputs[0], {});
+}
Index: clang/lib/Driver/CMakeLists.txt
===
--- clang/lib/Driver/CMakeLists.txt
+++ clang/lib/Driver/CMakeLists.txt
@@ -69,6 +69,7 @@
   ToolChains/PS4CPU.cpp
   ToolChains/RISCVToolchain.cpp
   ToolChains/Solaris.cpp
+  ToolChains/SPIRV.cpp
   ToolChains/TCE.cpp
   ToolChains/VEToolchain.cpp
   ToolChains/WebAssembly.cpp
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[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Is this patch ready to land on the LLVM? We do not have commit rights, so can 
you please commit this patch for us? Thanks.


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[PATCH] D112410: [SPIR-V] Add a tool chain for SPIR-V (incomplete)

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 383019.
linjamaki added a comment.

Rebase on updated llvm-spirv tool (D112404 ).


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Driver/Tool.h
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChain.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/Clang.h
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h
  clang/test/Driver/spirv-toolchain.c

Index: clang/test/Driver/spirv-toolchain.c
===
--- /dev/null
+++ clang/test/Driver/spirv-toolchain.c
@@ -0,0 +1,57 @@
+// Check object emission.
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x cl -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x ir -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x c -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+
+// SPV64: clang{{.*}} "-cc1" "-triple" "spirv64"
+// SPV64-SAME: "-o" [[BC:".*bc"]]
+// SPV64: {{".*llvm-spirv.*"}} [[BC]] "-o" {{".*o"}}
+
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x cl -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x ir -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x c -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+
+// SPV32: clang{{.*}} "-cc1" "-triple" "spirv32"
+// SPV32-SAME: "-o" [[BC:".*bc"]]
+// SPV32: {{".*llvm-spirv.*"}} [[BC]] "-o" {{".*o"}}
+
+//-
+// Check Assembly emission.
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x cl -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x ir -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x c -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+
+// SPT64: clang{{.*}} "-cc1" "-triple" "spirv64"
+// SPT64-SAME: "-o" [[BC:".*bc"]]
+// SPT64: {{".*llvm-spirv.*"}} [[BC]] "-spirv-text" "-o" {{".*s"}}
+
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x cl -S %s 2>&1 | FileCheck --check-prefix=SPT32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x ir -S %s 2>&1 | FileCheck --check-prefix=SPT32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x c -S %s 2>&1 | FileCheck --check-prefix=SPT32 %s
+
+// SPT32: clang{{.*}} "-cc1" "-triple" "spirv32"
+// SPT32-SAME: "-o" [[BC:".*bc"]]
+// SPT32: {{".*llvm-spirv.*"}} [[BC]] "-spirv-text" "-o" {{".*s"}}
+
+//-
+// Check assembly input -> object output
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x assembler -c %s 2>&1 | FileCheck --check-prefix=ASM %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x assembler -c %s 2>&1 | FileCheck --check-prefix=ASM %s
+// ASM: {{".*llvm-spirv.*"}} {{".*"}} "-to-binary" "-o" {{".*o"}}
+
+//-
+// Check --save-temps.
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x cl -c %s --save-temps 2>&1 | FileCheck --check-prefix=TMP %s
+
+// TMP: clang{{.*}} "-cc1" "-triple" "spirv64"
+// TMP-SAME: "-E"
+// TMP-SAME: "-o" [[I:".*i"]]
+// TMP: clang{{.*}} "-cc1" "-triple" "spirv64"
+// TMP-SAME: "-o" [[BC:".*bc"]]
+// TMP-SAME: [[I]]
+// TMP: {{".*llvm-spirv.*"}} [[BC]] "-spirv-text" "-o" [[S:".*s"]]
+// TMP: {{".*llvm-spirv.*"}} [[S]] "-to-binary" "-o" {{".*o"}}
Index: clang/lib/Driver/ToolChains/SPIRV.h
===
--- clang/lib/Driver/ToolChains/SPIRV.h
+++ clang/lib/Driver/ToolChains/SPIRV.h
@@ -41,6 +41,37 @@
 
 } // namespace SPIRV
 } // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY SPIRVToolChain final : public ToolChain {
+  mutable std::unique_ptr Translator;
+
+public:
+  SPIRVToolChain(const Driver , const llvm::Triple ,
+ const llvm::opt::ArgList )
+  : ToolChain(D, Triple, Args) {}
+
+  bool useIntegratedAs() const override { return true; }
+  bool 

[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki marked an inline comment as done.
linjamaki added a comment.

Thanks for the review.




Comment at: clang/lib/Driver/ToolChains/SPIRV.cpp:18
+
+void SPIRV::constructTranslateCommand(Compilation , const Tool ,
+  const JobAction ,

bader wrote:
> If this function is going to be used only by 
> `SPIRV::Translator::ConstructJob`, it's better to make it `static` or 
> manually inline into 4-line `SPIRV::Translator::ConstructJob`.
This function is used by HIPSPV tool chain too (D110618) by the 
HIPSPV::Linker::constructLinkAndEmitSpirvCommand() function.



Comment at: clang/lib/Driver/ToolChains/SPIRV.h:31
+  Translator(const ToolChain )
+  : Tool("SPIRV::Translator", "translator", TC) {}
+

bader wrote:
> I think using just "translator" as a short name might be ambiguous.
Updated.


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[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 383001.
linjamaki added a comment.

Rename SPIRV::Translator's tool names as suggested by bader.


Repository:
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Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h

Index: clang/lib/Driver/ToolChains/SPIRV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.h
@@ -0,0 +1,46 @@
+//===--- SPIRV.h - SPIR-V Tool Implementations --*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace SPIRV {
+
+void addTranslatorArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList );
+
+void constructTranslateCommand(Compilation , const Tool ,
+   const JobAction , const InputInfo ,
+   const InputInfo ,
+   const llvm::opt::ArgStringList );
+
+class LLVM_LIBRARY_VISIBILITY Translator : public Tool {
+public:
+  Translator(const ToolChain )
+  : Tool("SPIR-V::Translator", "llvm-spirv", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+  bool hasIntegratedAssembler() const override { return true; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+};
+
+} // namespace SPIRV
+} // namespace tools
+} // namespace driver
+} // namespace clang
+#endif
Index: clang/lib/Driver/ToolChains/SPIRV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.cpp
@@ -0,0 +1,48 @@
+//===--- SPIRV.cpp - SPIR-V Tool Implementations *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+#include "SPIRV.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "clang/Driver/Driver.h"
+#include "clang/Driver/InputInfo.h"
+#include "clang/Driver/Options.h"
+
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+void SPIRV::constructTranslateCommand(Compilation , const Tool ,
+  const JobAction ,
+  const InputInfo ,
+  const InputInfo ,
+  const llvm::opt::ArgStringList ) {
+  llvm::opt::ArgStringList CmdArgs(Args);
+  CmdArgs.push_back(Input.getFilename());
+
+  if (Input.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-to-binary");
+  if (Output.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-spirv-text");
+
+  CmdArgs.append({"-o", Output.getFilename()});
+
+  const char *Exec =
+  C.getArgs().MakeArgString(T.getToolChain().GetProgramPath("llvm-spirv"));
+  C.addCommand(std::make_unique(JA, T, ResponseFileSupport::None(),
+ Exec, CmdArgs, Input, Output));
+}
+
+void SPIRV::Translator::ConstructJob(Compilation , const JobAction ,
+ const InputInfo ,
+ const InputInfoList ,
+ const ArgList ,
+ const char *LinkingOutput) const {
+  claimNoWarnArgs(Args);
+  if (Inputs.size() != 1)
+llvm_unreachable("Invalid number of input files.");
+  constructTranslateCommand(C, *this, JA, Output, Inputs[0], {});
+}
Index: clang/lib/Driver/CMakeLists.txt
===
--- clang/lib/Driver/CMakeLists.txt
+++ clang/lib/Driver/CMakeLists.txt
@@ -69,6 +69,7 @@
   ToolChains/PS4CPU.cpp
   ToolChains/RISCVToolchain.cpp
   ToolChains/Solaris.cpp
+  ToolChains/SPIRV.cpp
   ToolChains/TCE.cpp
   ToolChains/VEToolchain.cpp
   ToolChains/WebAssembly.cpp
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[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 382932.
linjamaki added a comment.

Update for changes in D112404 .


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Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,100 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,288 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//

[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 382931.
linjamaki marked an inline comment as done.
linjamaki added a comment.

Remove `--spirv-ext` and `--spirv-max-version`.


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Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h

Index: clang/lib/Driver/ToolChains/SPIRV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.h
@@ -0,0 +1,46 @@
+//===--- SPIRV.h - SPIR-V Tool Implementations --*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace SPIRV {
+
+void addTranslatorArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList );
+
+void constructTranslateCommand(Compilation , const Tool ,
+   const JobAction , const InputInfo ,
+   const InputInfo ,
+   const llvm::opt::ArgStringList );
+
+class LLVM_LIBRARY_VISIBILITY Translator : public Tool {
+public:
+  Translator(const ToolChain )
+  : Tool("SPIRV::Translator", "translator", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+  bool hasIntegratedAssembler() const override { return true; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+};
+
+} // namespace SPIRV
+} // namespace tools
+} // namespace driver
+} // namespace clang
+#endif
Index: clang/lib/Driver/ToolChains/SPIRV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.cpp
@@ -0,0 +1,48 @@
+//===--- SPIRV.cpp - SPIR-V Tool Implementations *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+#include "SPIRV.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "clang/Driver/Driver.h"
+#include "clang/Driver/InputInfo.h"
+#include "clang/Driver/Options.h"
+
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+void SPIRV::constructTranslateCommand(Compilation , const Tool ,
+  const JobAction ,
+  const InputInfo ,
+  const InputInfo ,
+  const llvm::opt::ArgStringList ) {
+  llvm::opt::ArgStringList CmdArgs(Args);
+  CmdArgs.push_back(Input.getFilename());
+
+  if (Input.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-to-binary");
+  if (Output.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-spirv-text");
+
+  CmdArgs.append({"-o", Output.getFilename()});
+
+  const char *Exec =
+  C.getArgs().MakeArgString(T.getToolChain().GetProgramPath("llvm-spirv"));
+  C.addCommand(std::make_unique(JA, T, ResponseFileSupport::None(),
+ Exec, CmdArgs, Input, Output));
+}
+
+void SPIRV::Translator::ConstructJob(Compilation , const JobAction ,
+ const InputInfo ,
+ const InputInfoList ,
+ const ArgList ,
+ const char *LinkingOutput) const {
+  claimNoWarnArgs(Args);
+  if (Inputs.size() != 1)
+llvm_unreachable("Invalid number of input files.");
+  constructTranslateCommand(C, *this, JA, Output, Inputs[0], {});
+}
Index: clang/lib/Driver/CMakeLists.txt
===
--- clang/lib/Driver/CMakeLists.txt
+++ clang/lib/Driver/CMakeLists.txt
@@ -69,6 +69,7 @@
   ToolChains/PS4CPU.cpp
   ToolChains/RISCVToolchain.cpp
   ToolChains/Solaris.cpp
+  ToolChains/SPIRV.cpp
   ToolChains/TCE.cpp
   ToolChains/VEToolchain.cpp
   ToolChains/WebAssembly.cpp
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[PATCH] D112410: [SPIR-V] Add a tool chain for SPIR-V (incomplete)

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

> Do I read it correctly that you would have no objections for others to rework 
> this patch if needed? :)

Yes, anyone can work on this patch.


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[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki marked an inline comment as done.
linjamaki added inline comments.



Comment at: clang/include/clang/Driver/Options.td:1534
+HelpText<"Specify maximum SPIR-V version which can be emitted">;
+def spirv_ext_EQ : CommaJoined<["--"], "spirv-ext">,
+HelpText<"Specify comma separated list of allowed/disallowed SPIR-V "

Anastasia wrote:
> Is this flag expected to be similar to `-cl-ext`?
> 
> https://clang.llvm.org/docs/OpenCLSupport.html#cmdoption-cl-ext
> 
> It might be good to see how those can align? I imagine for HIP you haven't 
> used such flags yet?
> Is this flag expected to be similar to `-cl-ext`?
> 
> https://clang.llvm.org/docs/OpenCLSupport.html#cmdoption-cl-ext
> 
> It might be good to see how those can align? 

It is similar to -cl-ext. I thought it would make sense to have --spirv-ext for 
defining allowed SPIR-V extensions via the clang driver. I did not think that 
having both the -cl-ext and the --spirv-ext at the same time may conflict 
and/or contradict so I’ll remove the options here (--spirv-max-version too). 
Let’s introduce them in D112410 if needed.

> I imagine for HIP you haven't used such flags yet?

HIPSPV tool chain passes --spirv-max-version and --spirv-ext options to the 
LLVM-SPIR-V translator for overriding its defaults.




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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 382244.
linjamaki added a comment.

Improve `--offload` option description.


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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,18 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo   \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit objects for host side path
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fgpu-rdc"
+// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
+// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
+
+// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Gentle ping. Is anything needed to be addressed to get this patch accepted?


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[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Gentle ping.


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[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Gentle ping. Is anything needed to be addressed to get this patch accepted?


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

Thanks for the review. Updated the patch with the style suggestions.


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 382228.
linjamaki added a comment.

Rephrase expressions.


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Files:
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/SemaCUDA/allow-int128.cu
  clang/test/SemaCUDA/spirv-int128.cu


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type 
support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,8 +1496,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp
===
--- clang/lib/Sema/Sema.cpp
+++ clang/lib/Sema/Sema.cpp
@@ -1855,7 +1855,8 @@
 }
 
 void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) {
-  if (!LangOpts.SYCLIsDevice && !(LangOpts.OpenMP && LangOpts.OpenMPIsDevice))
+  if (!(LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice) 
||
+LangOpts.CUDAIsDevice))
 return;
 
   if (isUnevaluatedContext() || Ty.isNull())


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,8 +1496,8 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
-!(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
+!(S.getLangOpts().SYCLIsDevice || S.getLangOpts().CUDAIsDevice ||
+  (S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice)))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
 if (DS.getTypeSpecSign() == TypeSpecifierSign::Unsigned)
Index: clang/lib/Sema/Sema.cpp

[PATCH] D112410: [SPIR-V] Add a tool chain for SPIR-V (incomplete)

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added a subscriber: ThomasRaoux.
linjamaki published this revision for review.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This patch adds a tool chain (TC) for SPIR-V for demonstration purposes. The TC 
is not complete but it is functional enough for producing SPIR-V assembly*1 and 
object code directly via clang from a language of choice, for example:

  clang -target spirv64 foo.cl -c -o foo.spv
  clang -target spirv64 baz.clcpp -c -o baz.spv
  clang -target spirv64 bar.c -S -o bar.spt

The SPIR-V code is generated by the SPIRV-LLVM translator tool or other 
compatible tool named as `llvm-spirv` that is sought in PATH.

List of things the TC is missing but not limited to:

- Linking and image generation.
- Complete and proper overrides from the base TC.
- Proper SPIR-V assembly output *1.
- Complete command line interface laid out in [1].

*1: The output from the SPIRV-LLVM Translator is its internal text presentation.

Changes in the Driver and base ToolChain and Tool:
Added a mechanism to work with the lack of SPIR-V backend in LLVM for SPIR-V 
TC. Until SPIR-V backend lands on LLVM, compilation phases/actions should be 
bound for SPIR-V in the meantime as following:

- compile -> tools::Clang
- backend -> tools::SPIRV::Translator
- assemble -> tools::SPIRV::Translator

However, Driver’s ToolSelector collapses compile-backend-assemble and 
compile-backend sequences to tools::Clang. To prevent this, added new 
{use,has}IntegratedBackend properties in ToolChain and Tool to which the 
ToolSelector reacts on, and which SPIR-V TC overrides.

We contributed this patch and the previous one in the stack (D112404 
 - [SPIR-V] Add translator tool) to address 
Anastasia’s feedback in (https://reviews.llvm.org/D110618#3062078) and other 
concerns around the SPIR-V tool chain adoption for languages other than HIP. 
However, we do not currently have the resources to allocate for continuing much 
further work in this patch unrelated to the needs of the HIP frontend. Thus, 
please consider this as a potentially useful starting point for further work 
needed to support other frontends, hopefully good enough minimal code to get 
this side started with and our patch set integrated to the master.

[1]: 
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/wiki/SPIRV-Toolchain-for-Clang


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Files:
  clang/include/clang/Driver/Tool.h
  clang/include/clang/Driver/ToolChain.h
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChain.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/Clang.h
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h
  clang/test/Driver/spirv-toolchain.c

Index: clang/test/Driver/spirv-toolchain.c
===
--- /dev/null
+++ clang/test/Driver/spirv-toolchain.c
@@ -0,0 +1,57 @@
+// Check object emission.
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x cl -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x ir -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x c -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+
+// SPV64: clang{{.*}} "-cc1" "-triple" "spirv64"
+// SPV64-SAME: "-o" [[BC:".*bc"]]
+// SPV64: {{".*llvm-spirv.*"}} [[BC]] "-o" {{".*o"}}
+
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x cl -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x ir -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv32 -x c -c %s 2>&1 | FileCheck --check-prefix=SPV32 %s
+
+// SPV32: clang{{.*}} "-cc1" "-triple" "spirv32"
+// SPV32-SAME: "-o" [[BC:".*bc"]]
+// SPV32: {{".*llvm-spirv.*"}} [[BC]] "-o" {{".*o"}}
+
+//-
+// Check Assembly emission.
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x cl -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x ir -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x clcpp -c %s 2>&1 | FileCheck --check-prefix=SPV64 %s
+// RUN: %clang -### -no-canonical-prefixes -target spirv64 -x c -S %s 2>&1 | FileCheck --check-prefix=SPT64 %s
+
+// SPT64: clang{{.*}} "-cc1" "-triple" "spirv64"
+// SPT64-SAME: "-o" [[BC:".*bc"]]
+// SPT64: {{".*llvm-spirv.*"}} [[BC]] "-spirv-text" "-o" {{".*s"}}
+
+// RUN: %clang -### 

[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381858.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111047/new/

https://reviews.llvm.org/D111047

Files:
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/SemaCUDA/allow-int128.cu
  clang/test/SemaCUDA/spirv-int128.cu


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type 
support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,7 +1496,7 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
+!S.getLangOpts().SYCLIsDevice && !S.getLangOpts().CUDAIsDevice &&
 !(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
Index: clang/lib/Sema/Sema.cpp
===
--- clang/lib/Sema/Sema.cpp
+++ clang/lib/Sema/Sema.cpp
@@ -1855,7 +1855,8 @@
 }
 
 void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) {
-  if (!LangOpts.SYCLIsDevice && !(LangOpts.OpenMP && LangOpts.OpenMPIsDevice))
+  if (!LangOpts.SYCLIsDevice && !(LangOpts.OpenMP && LangOpts.OpenMPIsDevice) 
&&
+  !LangOpts.CUDAIsDevice)
 return;
 
   if (isUnevaluatedContext() || Ty.isNull())


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type support, but target 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,7 +1496,7 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
+!S.getLangOpts().SYCLIsDevice && !S.getLangOpts().CUDAIsDevice &&
 !(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
Index: clang/lib/Sema/Sema.cpp
===
--- clang/lib/Sema/Sema.cpp
+++ clang/lib/Sema/Sema.cpp
@@ -1855,7 +1855,8 @@
 }
 
 void Sema::checkTypeSupport(QualType Ty, SourceLocation Loc, ValueDecl *D) {
-  if (!LangOpts.SYCLIsDevice && !(LangOpts.OpenMP && 

[PATCH] D110685: [HIPSPV][4/4] Add option to use llc to emit SPIR-V

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381857.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110685/new/

https://reviews.llvm.org/D110685

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/test/Driver/hipspv-options.hip


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+assert(A->getNumValues() <= 1);
+const char *LlcExe = nullptr;
+if (A->getNumValues() == 1 && !StringRef(A->getValue()).empty())
+  LlcExe = A->getValue();
+else
+  LlcExe = Args.MakeArgString(getToolChain().GetProgramPath("llc"));
+ArgStringList LlcArgs{"--mattr=+spirv1.1", "--filetype=obj", TempFile, 
"-o",
+  Output.getFilename()};
+C.addCommand(std::make_unique(JA, *this,
+   ResponseFileSupport::None(), LlcExe,
+   LlcArgs, Inputs, Output));
+return;
+  }
+
+  // Use SPIRV-LLVM Translator.
   llvm::opt::ArgStringList TrArgs;
   SPIRV::addTranslatorArgs(Args, TrArgs);
   if (!Args.hasArg(options::OPT_spirv_max_version_EQ))
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1541,6 +1541,13 @@
 HelpText<"Specify comma separated list of allowed/disallowed SPIR-V "
 "extensions prefixed with '+' or '-'. '+' and '-' allows and disallows "
 "the extension, respectively. Special value 'all' affects all extensions">;
+def spirv_use_llc : Flag<["--"], "spirv-use-llc">, Flags<[HelpHidden]>,
+HelpText<"Use (in-tree) llc to emit SPIR-V. Use for development and "
+"testing only.">;
+def spirv_use_llc_EQ : Joined<["--"], "spirv-use-llc=">,
+MetaVarName<"">, Flags<[HelpHidden]>,
+HelpText<"Use speficied llc to emit SPIR-V. Use for development and "
+"testing only.">;
 
 // Begin sanitizer flags. These should all be core options exposed in all 
driver
 // modes.


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+assert(A->getNumValues() <= 1);
+const char *LlcExe = nullptr;
+if (A->getNumValues() == 1 && !StringRef(A->getValue()).empty())
+  LlcExe = A->getValue();
+else
+  LlcExe = Args.MakeArgString(getToolChain().GetProgramPath("llc"));
+ArgStringList LlcArgs{"--mattr=+spirv1.1", "--filetype=obj", TempFile, "-o",
+  Output.getFilename()};
+C.addCommand(std::make_unique(JA, *this,
+   ResponseFileSupport::None(), LlcExe,
+   LlcArgs, Inputs, Output));
+return;
+  }
+
+  // Use SPIRV-LLVM Translator.
   llvm::opt::ArgStringList TrArgs;
   

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381855.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110622/new/

https://reviews.llvm.org/D110622

Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/Basic/Targets/NVPTX.h
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,18 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo   \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "--spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit objects for host side path
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fgpu-rdc"
+// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
+// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
+
+// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381854.
linjamaki added a comment.

Rebase and use SPIRV::constructTranslateCommand() to contruct
the LLVM-SPIR-V translation command.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110618/new/

https://reviews.llvm.org/D110618

Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,100 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "SPIRV.h"
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructLinkAndEmitSpirvCommand(Compilation , const JobAction ,
+const InputInfoList ,
+const InputInfo ,
+const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,293 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception

[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381852.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110549/new/

https://reviews.llvm.org/D110549

Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/HIP.cpp
  clang/lib/Driver/ToolChains/HIP.h
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/lib/Driver/ToolChains/HIPAMD.h
  clang/lib/Driver/ToolChains/HIPUtility.cpp
  clang/lib/Driver/ToolChains/HIPUtility.h

Index: clang/lib/Driver/ToolChains/HIPUtility.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.h
@@ -0,0 +1,35 @@
+//===--- HIPUtility.h - Common HIP Tool Chain Utilities -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+
+#include "clang/Driver/Tool.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIP {
+
+// Construct command for creating HIP fatbin.
+void constructHIPFatbinCommand(Compilation , const JobAction ,
+   StringRef OutputFileName,
+   const InputInfoList ,
+   const llvm::opt::ArgList , const Tool );
+
+// Construct command for creating Object from HIP fatbin.
+void constructGenerateObjFileFromHIPFatBinary(
+Compilation , const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList , const JobAction , const Tool );
+
+} // namespace HIP
+} // namespace tools
+} // namespace driver
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
Index: clang/lib/Driver/ToolChains/HIPUtility.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.cpp
@@ -0,0 +1,155 @@
+//===--- HIPUtility.cpp - Common HIP Tool Chain Utilities ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPUtility.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Path.h"
+
+using namespace clang::driver;
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+#if defined(_WIN32) || defined(_WIN64)
+#define NULL_FILE "nul"
+#else
+#define NULL_FILE "/dev/null"
+#endif
+
+namespace {
+const unsigned HIPCodeObjectAlign = 4096;
+} // namespace
+
+// Constructs a triple string for clang offload bundler.
+static std::string normalizeForBundler(const llvm::Triple ,
+   bool HasTargetID) {
+  return HasTargetID ? (T.getArchName() + "-" + T.getVendorName() + "-" +
+T.getOSName() + "-" + T.getEnvironmentName())
+   .str()
+ : T.normalize();
+}
+
+// Construct a clang-offload-bundler command to bundle code objects for
+// different devices into a HIP fat binary.
+void HIP::constructHIPFatbinCommand(Compilation , const JobAction ,
+StringRef OutputFileName,
+const InputInfoList ,
+const llvm::opt::ArgList ,
+const Tool ) {
+  // Construct clang-offload-bundler command to bundle object files for
+  // for different GPU archs.
+  ArgStringList BundlerArgs;
+  BundlerArgs.push_back(Args.MakeArgString("-type=o"));
+  BundlerArgs.push_back(
+  Args.MakeArgString("-bundle-align=" + Twine(HIPCodeObjectAlign)));
+
+  // ToDo: Remove the dummy host binary entry which is required by
+  // clang-offload-bundler.
+  std::string BundlerTargetArg = "-targets=host-x86_64-unknown-linux";
+  std::string BundlerInputArg = "-inputs=" NULL_FILE;
+
+  // AMDGCN:
+  // For code object version 2 and 3, the offload kind in bundle ID is 'hip'
+  // for backward compatibility. For code object version 4 and greater, the
+  // offload kind in bundle ID is 'hipv4'.
+  std::string OffloadKind = "hip";
+  auto  = T.getToolChain().getTriple();
+  if (TT.isAMDGCN() && getAMDGPUCodeObjectVersion(C.getDriver(), Args) >= 4)
+OffloadKind = OffloadKind + "v4";
+  for (const auto  : Inputs) {
+const auto *A = II.getAction();
+auto ArchStr = StringRef(A->getOffloadingArch());
+

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381851.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109818/new/

https://reviews.llvm.org/D109818

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenHIP/hipspv-kernel.cpp

Index: clang/test/CodeGenHIP/hipspv-kernel.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-kernel.cpp
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __global__ __attribute__((global))
+
+// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}})
+__global__ void foo(float *a, float b) {
+  *a = b;
+}
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10183,12 +10183,23 @@
 private:
   void setCCs();
 };
+
+class SPIRVABIInfo : public CommonSPIRABIInfo {
+public:
+  SPIRVABIInfo(CodeGenTypes ) : CommonSPIRABIInfo(CGT) {}
+  void computeInfo(CGFunctionInfo ) const override;
+
+private:
+  ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+};
 } // end anonymous namespace
 namespace {
 class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   CommonSPIRTargetCodeGenInfo(CodeGen::CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
+  CommonSPIRTargetCodeGenInfo(std::unique_ptr ABIInfo)
+  : TargetCodeGenInfo(std::move(ABIInfo)) {}
 
   LangAS getASTAllocaAddressSpace() const override {
 return getLangASFromTargetAS(
@@ -10197,18 +10208,60 @@
 
   unsigned getOpenCLKernelCallingConv() const override;
 };
-
+class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
+public:
+  SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes )
+  : CommonSPIRTargetCodeGenInfo(std::make_unique(CGT)) {}
+  void setCUDAKernelCallingConvention(const FunctionType *) const override;
+};
 } // End anonymous namespace.
+
 void CommonSPIRABIInfo::setCCs() {
   assert(getRuntimeCC() == llvm::CallingConv::C);
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP) {
+// Coerce pointer arguments with default address space to CrossWorkGroup
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);
+auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
+auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+if (LTy->isPointerTy() && LTy->getPointerAddressSpace() == DefaultAS) {
+  LTy = llvm::PointerType::get(
+  cast(LTy)->getElementType(), GlobalAS);
+  return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+}
+  }
+  return classifyArgumentType(Ty);
+}
+
+void SPIRVABIInfo::computeInfo(CGFunctionInfo ) const {
+  // The logic is same as in DefaultABIInfo with an exception on the kernel
+  // arguments handling.
+  llvm::CallingConv::ID CC = FI.getCallingConvention();
+
+  if (!getCXXABI().classifyReturnType(FI))
+FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+
+  for (auto  : FI.arguments()) {
+if (CC == llvm::CallingConv::SPIR_KERNEL) {
+  I.info = classifyKernelArgumentType(I.type);
+} else {
+  I.info = classifyArgumentType(I.type);
+}
+  }
+}
+
 namespace clang {
 namespace CodeGen {
 void computeSPIRKernelABIInfo(CodeGenModule , CGFunctionInfo ) {
-  DefaultABIInfo SPIRABI(CGM.getTypes());
-  SPIRABI.computeInfo(FI);
+  if (CGM.getTarget().getTriple().isSPIRV())
+SPIRVABIInfo(CGM.getTypes()).computeInfo(FI);
+  else
+CommonSPIRABIInfo(CGM.getTypes()).computeInfo(FI);
 }
 }
 }
@@ -10217,6 +10270,16 @@
   return llvm::CallingConv::SPIR_KERNEL;
 }
 
+void SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
+const FunctionType *) const {
+  // Convert HIP kernels to SPIR-V kernels.
+  if (getABIInfo().getContext().getLangOpts().HIP) {
+FT = getABIInfo().getContext().adjustFunctionType(
+FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
+return;
+  }
+}
+
 static bool appendType(SmallStringEnc , QualType QType,
const CodeGen::CodeGenModule ,
TypeStringCache );
@@ -11282,9 +11345,10 @@
 return SetCGInfo(new ARCTargetCodeGenInfo(Types));
   case llvm::Triple::spir:
   case llvm::Triple::spir64:
+return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
   case llvm::Triple::spirv32:
   case llvm::Triple::spirv64:
-return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
+return SetCGInfo(new SPIRVTargetCodeGenInfo(Types));
   case llvm::Triple::ve:
 return SetCGInfo(new VETargetCodeGenInfo(Types));
   }

[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381850.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108621/new/

https://reviews.llvm.org/D108621

Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 
addrspace(4)*
+  return 
+}
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -56,9 +56,14 @@
 0, // opencl_generic
 0, // opencl_global_device
 0, // opencl_global_host
-0, // cuda_device
-0, // cuda_constant
-0, // cuda_shared
+// cuda_* address space mapping is intended for HIPSPV (HIP to SPIR-V
+// translation). This mapping is enabled when the language mode is HIP.
+1, // cuda_device
+// cuda_constant pointer can be casted to default/"flat" pointer, but in
+// SPIR-V casts between constant and generic pointers are not allowed. For
+// this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
+1, // cuda_constant
+3, // cuda_shared
 1, // sycl_global
 5, // sycl_global_device
 6, // sycl_global_host
@@ -219,6 +224,16 @@
   bool hasFeature(StringRef Feature) const override {
 return Feature == "spirv";
   }
+
+  void adjust(DiagnosticsEngine , LangOptions ) override {
+BaseSPIRTargetInfo::adjust(Diags, Opts);
+// Guarded so we don't override address space map setting set by
+// BaseSPIRTargetInfo::adjust.
+if (Opts.HIP && Opts.CUDAIsDevice)
+  // Enable address space mapping from HIP to SPIR-V.
+  // See comment on the SPIRDefIsGenMap table.
+  setAddressSpaceMap(/*DefaultIsGeneric=*/true);
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public SPIRVTargetInfo {


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 

[PATCH] D112404: [SPIR-V] Add translator tool

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: ThomasRaoux, dang, mgorny.
linjamaki requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Add a tool for constructing commands for translating LLVM IR to
SPIR-V.

Used by HIPSPV tool chain (D110618 ).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D112404

Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/SPIRV.cpp
  clang/lib/Driver/ToolChains/SPIRV.h

Index: clang/lib/Driver/ToolChains/SPIRV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.h
@@ -0,0 +1,46 @@
+//===--- SPIRV.h - SPIR-V Tool Implementations --*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_SPIRV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace SPIRV {
+
+void addTranslatorArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList );
+
+void constructTranslateCommand(Compilation , const Tool ,
+   const JobAction , const InputInfo ,
+   const InputInfo ,
+   const llvm::opt::ArgStringList );
+
+class LLVM_LIBRARY_VISIBILITY Translator : public Tool {
+public:
+  Translator(const ToolChain )
+  : Tool("SPIRV::Translator", "translator", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+  bool hasIntegratedAssembler() const override { return true; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+};
+
+} // namespace SPIRV
+} // namespace tools
+} // namespace driver
+} // namespace clang
+#endif
Index: clang/lib/Driver/ToolChains/SPIRV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/SPIRV.cpp
@@ -0,0 +1,55 @@
+//===--- SPIRV.cpp - SPIR-V Tool Implementations *- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+#include "SPIRV.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "clang/Driver/Driver.h"
+#include "clang/Driver/InputInfo.h"
+#include "clang/Driver/Options.h"
+
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+void SPIRV::addTranslatorArgs(const ArgList , ArgStringList ) {
+  InArgs.AddLastArg(OutArgs, options::OPT_spirv_max_version_EQ,
+options::OPT_spirv_ext_EQ);
+}
+
+void SPIRV::constructTranslateCommand(Compilation , const Tool ,
+  const JobAction ,
+  const InputInfo ,
+  const InputInfo ,
+  const llvm::opt::ArgStringList ) {
+  llvm::opt::ArgStringList CmdArgs(Args);
+  CmdArgs.push_back(Input.getFilename());
+
+  if (Input.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-to-binary");
+  if (Output.getType() == types::TY_PP_Asm)
+CmdArgs.push_back("-spirv-text");
+
+  CmdArgs.append({"-o", Output.getFilename()});
+
+  const char *Exec =
+  C.getArgs().MakeArgString(T.getToolChain().GetProgramPath("llvm-spirv"));
+  C.addCommand(std::make_unique(JA, T, ResponseFileSupport::None(),
+ Exec, CmdArgs, Input, Output));
+}
+
+void SPIRV::Translator::ConstructJob(Compilation , const JobAction ,
+ const InputInfo ,
+ const InputInfoList ,
+ const ArgList ,
+ const char *LinkingOutput) const {
+  claimNoWarnArgs(Args);
+  ArgStringList FilteredArgs;
+  addTranslatorArgs(Args, FilteredArgs);
+  if (Inputs.size() != 1)
+llvm_unreachable("Invalid number of input files.");
+  constructTranslateCommand(C, *this, JA, Output, Inputs[0], FilteredArgs);
+}
Index: clang/lib/Driver/CMakeLists.txt
===
--- clang/lib/Driver/CMakeLists.txt
+++ clang/lib/Driver/CMakeLists.txt
@@ -69,6 

[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 381847.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109144/new/

https://reviews.llvm.org/D109144

Files:
  clang/include/clang/Basic/DiagnosticGroups.td
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/SPIR.cpp
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/InitPreprocessor.cpp
  clang/lib/Headers/opencl-c-base.h
  clang/lib/Headers/opencl-c.h
  clang/test/CodeGenOpenCL/spirv_target.cl
  clang/test/Headers/opencl-c-header.cl
  clang/test/Preprocessor/predefined-macros.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -224,6 +224,16 @@
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
   EXPECT_EQ(Triple::UnknownOS, T.getOS());
 
+  T = Triple("spirv32-unknown-unknown");
+  EXPECT_EQ(Triple::spirv32, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+  T = Triple("spirv64-unknown-unknown");
+  EXPECT_EQ(Triple::spirv64, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
   T = Triple("x86_64-unknown-ananas");
   EXPECT_EQ(Triple::x86_64, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
@@ -865,6 +875,16 @@
   EXPECT_FALSE(T.isArch32Bit());
   EXPECT_TRUE(T.isArch64Bit());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_TRUE(T.isArch32Bit());
+  EXPECT_FALSE(T.isArch64Bit());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_FALSE(T.isArch32Bit());
+  EXPECT_TRUE(T.isArch64Bit());
+
   T.setArch(Triple::sparc);
   EXPECT_FALSE(T.isArch16Bit());
   EXPECT_TRUE(T.isArch32Bit());
@@ -1000,6 +1020,14 @@
   EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
   T.setArch(Triple::wasm32);
   EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -67,6 +67,8 @@
   case sparcv9:return "sparcv9";
   case spir64: return "spir64";
   case spir:   return "spir";
+  case spirv32:return "spirv32";
+  case spirv64:return "spirv64";
   case systemz:return "s390x";
   case tce:return "tce";
   case tcele:  return "tcele";
@@ -147,6 +149,10 @@
 
   case spir:
   case spir64:  return "spir";
+
+  case spirv32:
+  case spirv64: return "spirv";
+
   case kalimba: return "kalimba";
   case lanai:   return "lanai";
   case shave:   return "shave";
@@ -323,6 +329,8 @@
 .Case("hsail64", hsail64)
 .Case("spir", spir)
 .Case("spir64", spir64)
+.Case("spirv32", spirv32)
+.Case("spirv64", spirv64)
 .Case("kalimba", kalimba)
 .Case("lanai", lanai)
 .Case("shave", shave)
@@ -456,6 +464,8 @@
 .Case("hsail64", Triple::hsail64)
 .Case("spir", Triple::spir)
 .Case("spir64", Triple::spir64)
+.Case("spirv32", Triple::spirv32)
+.Case("spirv64", Triple::spirv64)
 .StartsWith("kalimba", Triple::kalimba)
 .Case("lanai", Triple::lanai)
 .Case("renderscript32", Triple::renderscript32)
@@ -759,6 +769,11 @@
   case Triple::wasm32:
   case Triple::wasm64:
 return Triple::Wasm;
+
+  case Triple::spirv32:
+  case Triple::spirv64:
+// TODO: In future this will be Triple::SPIRV.
+return Triple::UnknownObjectFormat;
   }
   llvm_unreachable("unknown architecture");
 }
@@ -1304,6 +1319,7 @@
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel:
   case llvm::Triple::spir:
+  case llvm::Triple::spirv32:
   case llvm::Triple::tce:
   case llvm::Triple::tcele:
   case llvm::Triple::thumb:
@@ -1330,6 +1346,7 @@
   case llvm::Triple::riscv64:
   case llvm::Triple::sparcv9:
   case llvm::Triple::spir64:
+  case llvm::Triple::spirv64:
   case llvm::Triple::systemz:
   case llvm::Triple::ve:
   case llvm::Triple::wasm64:
@@ -1389,6 +1406,7 @@
   case Triple::sparc:
   case Triple::sparcel:
   case Triple::spir:
+  case Triple::spirv32:
   case Triple::tce:
   case Triple::tcele:
   case Triple::thumb:
@@ -1413,6 +1431,7 @@
 

[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a subscriber: yaxunl.
linjamaki added a comment.



> Thanks for the clarifications. So it seems that you are not expecting that 
> the device target triple is being explicitly passed anywhere then and that 
> means you pass the device triple implicitly?

We are meaning to use the `--offload` as a way to pass device target triple 
explicitly.

> Although your `--offload` option does seem conceptually like a device target 
> triple, so I wonder if better naming for it would be `--offload-target`? 
> Would it work for you if we introduce SPIR-V triple explicitly and you use it 
> as a device offload triple?

To introduce a way to pass a device target triple in HIP compilation, we 
decided it to be aligned with the envisioned “Unified Offload Option” feature 
[1] to avoid overlap with similar concept. The design of the feature is 
pending. AFAIK, @yaxunl, who is working on it, hasn't got time yet to continue 
the work. In D110622  we propose adding the 
`--offload` option as partial implementation and there is a bit of discussion 
about the design too.

> It would probably makes sense to use the same triple to targeting SPIR-V 
> generation by everyone?

Yes, it makes sense.

> However I appreciate that OpenCL flow would be somewhat different since it 
> doesn't have a split into host and device but only contains device 
> compilation phase...

The split is specific to offloading languages (such as CUDA, HIP and OpenMP) 
whose compilation flow is different from the traditional compilation flow. The 
traditional compilation flow used for non-offloading languages naturally does 
not have the host/device compilation split.


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[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

> Can you explain what does this mean

It was trying to clarify a potential misunderstanding of how programs are 
compiled when HIPSPV is targeted:  For HIPSPV, the SPIR-V code generation is 
done by the clang driver. When we compile HIP programs for HIPCL or the HIPLZ 
runtime, we issue a single clang command such as this:

  clang++ --offload=spirv64 foo.hip -l -o foo

With this, the clang driver compiles the device side code to a SPIR-V binary 
and then compiles host side code, and embeds the SPIR-V binary to the host 
(fat) binary.

> ? In the tests I can see the following `--offload=spirv64` which does feel 
> like it is specified explicitly that the target is SPIR-V...

For HIPSPV the `--offload` option is used to specify the device code target but 
the end result is a host binary (e.g. x86_64) with device code (SPIR-V binary) 
embedded in it. We need a way to specify the device code target to be other 
than the currently fixed `amdgcn-amd-amdhsa` and using the `--offload` switch 
is a solution we are suggesting here.


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[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

> What I have in mind is to continue using SPIR target for now (until SPIR-V 
> back-end is added).

> For instance, SYCL compiler emits code for SPIR target and code format is 
> configured via flag.
>
> `-emit-llvm` changes output file format for regular C++ compilation flow:
>
>   clang++ a.cpp -c -o a.o  # object format by default 
>   clang++ a.cpp -c -emit-llvm -o a.bc  # LLVM IR format with 
> `-emit-llvm`
>
> Similar approach for HIP device compilation flow:
>
>   clang++ -target spir -x hip a.cpp -cuda-device-only -o a.spv
>  # SPIR-V format by default
>   clang++ -target spir -x hip a.cpp -cuda-device-only -emit-llvm -o a.bc  
>  # LLVM IR (aka SPIR) format with `-emit-llvm` if needed
>
> I think this was proposed in RFC. @linjamaki, am I right?

In the RFC we proposed a HIP compilation flow for producing and **embedding** 
SPIR-V binary into the host executable. What was not stated in the RFC clearly 
is that the process is supposed to be carried out without the need for clients 
to issue explicit commands for producing SPIR-V binaries and then to link them 
into the final executable separately. D110622 
 has test cases as examples for this.


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[PATCH] D110685: [HIPSPV][4/4] Add option to use llc to emit SPIR-V

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D110685#3044993 , @Anastasia wrote:

> Ok, is the idea to deprecate this flag once we switch to `llc` by default 
> then?

The idea is to remove the flags if no one else needs them when the HIPSPV tool 
chain switches over to `llc`.


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[PATCH] D111047: CUDA/HIP: Allow __int128 on the host side

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added a subscriber: yaxunl.
linjamaki edited the summary of this revision.
linjamaki added a reviewer: rsmith.
linjamaki added subscribers: bader, Anastasia.
linjamaki published this revision for review.
Herald added a reviewer: jdoerfert.
Herald added subscribers: cfe-commits, sstefan1.
Herald added a project: clang.

Consider case where `__int128` type is supported by the host target but
not by a device target (e.g. spirv*). Clang emits an error message for
unsupported type even if the device code does not use it. This patch
fixes this issue by emitting the error message when the device code
attempts to use the unsupported type.


Repository:
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https://reviews.llvm.org/D111047

Files:
  clang/lib/Sema/SemaDecl.cpp
  clang/lib/Sema/SemaExpr.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/SemaCUDA/allow-int128.cu
  clang/test/SemaCUDA/spirv-int128.cu


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type 
support, but device 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+__device__ __int128 d_unused;
+__device__ __int128 d_glb;
+__device__ __int128 bar() {
+  return d_glb;
+}
Index: clang/lib/Sema/SemaType.cpp
===
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -1496,7 +1496,7 @@
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
-!S.getLangOpts().SYCLIsDevice &&
+!S.getLangOpts().SYCLIsDevice && !S.getLangOpts().CUDAIsDevice &&
 !(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";
Index: clang/lib/Sema/SemaExpr.cpp
===
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -366,7 +366,8 @@
 
   diagnoseUseOfInternalDeclInInlineFunction(*this, D, Loc);
 
-  if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice)) {
+  if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice) ||
+  LangOpts.CUDAIsDevice) {
 if (auto *VD = dyn_cast(D))
   checkDeviceDecl(VD, Loc);
 
Index: clang/lib/Sema/SemaDecl.cpp
===
--- clang/lib/Sema/SemaDecl.cpp
+++ clang/lib/Sema/SemaDecl.cpp
@@ -9569,7 +9569,8 @@
 }
   }
 
-  if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice))
+  if (LangOpts.SYCLIsDevice || (LangOpts.OpenMP && LangOpts.OpenMPIsDevice) ||
+  LangOpts.CUDAIsDevice)
 checkDeviceDecl(NewFD, D.getBeginLoc());
 
   if (!getLangOpts().CPlusPlus) {


Index: clang/test/SemaCUDA/spirv-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/spirv-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+#define __device__ __attribute__((device))
+
+__int128 h_glb;
+
+__device__ __int128 d_unused;
+
+// expected-note@+1 {{'d_glb' defined here}}
+__device__ __int128 d_glb;
+
+__device__ __int128 bar() {
+  // expected-error@+1 {{'d_glb' requires 128 bit size '__int128' type support, but device 'spirv64' does not support it}}
+  return d_glb;
+}
Index: clang/test/SemaCUDA/allow-int128.cu
===
--- /dev/null
+++ clang/test/SemaCUDA/allow-int128.cu
@@ -0,0 +1,16 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple nvptx \
+// RUN:   -aux-triple x86_64-unknown-linux-gnu \
+// RUN:   -fcuda-is-device -verify -fsyntax-only %s
+
+// expected-no-diagnostics
+#define __device__ 

[PATCH] D110685: [HIPSPV][4/4] Add option to use llc to emit SPIR-V

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: dang, yaxunl.
linjamaki updated this revision to Diff 376838.
linjamaki added a comment.
linjamaki edited the summary of this revision.
linjamaki added a reviewer: Anastasia.
linjamaki updated this revision to Diff 376848.
linjamaki published this revision for review.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Rebase.


linjamaki added a comment.

Remove metavar from --spirv-use-llc.


Add two hidden options for emitting SPIR-V binary via LLC. The options are only 
meant for testing and development.

´--spirv-use-llc´ invokes in-tree llc. Not usable at the moment until the 
SPIR-V backend lands on LLVM.

´--spirv-use-llc=´ invokes llc tool given as path. Meant for 
trying out out-of-tree SPIR-V backend.

The HIPSPV tool chain is the only one responding to these options.


Repository:
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Files:
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/test/Driver/hipspv-options.hip


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+assert(A->getNumValues() <= 1);
+const char *LlcExe = nullptr;
+if (A->getNumValues() == 1 && !StringRef(A->getValue()).empty())
+  LlcExe = A->getValue();
+else
+  LlcExe = Args.MakeArgString(getToolChain().GetProgramPath("llc"));
+ArgStringList LlcArgs{"--mattr=+spirv1.1", "--filetype=obj", TempFile, 
"-o",
+  Output.getFilename()};
+C.addCommand(std::make_unique(JA, *this,
+   ResponseFileSupport::None(), LlcExe,
+   LlcArgs, Inputs, Output));
+return;
+  }
+
+  // Use SPIRV-LLVM Translator.
   ArgStringList LlvmSpirvArgs{"-spirv-max-version=1.1", "--spirv-ext=+all",
   TempFile, "-o", Output.getFilename()};
   const char *LlvmSpirv =
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -1528,6 +1528,12 @@
 Group, Flags<[CC1Option]>, MetaVarName<"">,
 HelpText<"Enable heap memory profiling and dump results into ">;
 
+def spirv_use_llc : Flag<["--"], "spirv-use-llc">, Flags<[HelpHidden]>,
+HelpText<"Use (in-tree) llc to emit SPIR-V. Use for development and 
testing only.">;
+def spirv_use_llc_EQ : Joined<["--"], "spirv-use-llc=">,
+MetaVarName<"">, Flags<[HelpHidden]>,
+HelpText<"Use speficied llc to emit SPIR-V. Use for development and 
testing only.">;
+
 // Begin sanitizer flags. These should all be core options exposed in all 
driver
 // modes.
 let Flags = [CC1Option, CoreOption] in {


Index: clang/test/Driver/hipspv-options.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-options.hip
@@ -0,0 +1,12 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN:   --spirv-use-llc=/foo/bar/llc 2>&1 | FileCheck %s
+
+// CHECK-NOT: llvm-spirv
+// CHECK: "/foo/bar/llc" "--mattr=+spirv1.1" "--filetype=obj" "{{.*}}.bc"
+// CHECK-SAME: "-o" "{{.*}}.out"
+
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- clang/lib/Driver/ToolChains/HIPSPV.cpp
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -97,6 +97,25 @@
 
   // Emit SPIR-V binary.
 
+  // Use llc. Meant for testing out LLVM SPIR-V backend. Eventually HIPSPV will
+  // switch to use in-tree SPIR-V backend for binary emission.
+  if (auto *A = Args.getLastArg(options::OPT_spirv_use_llc,
+options::OPT_spirv_use_llc_EQ)) {
+

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 376829.
linjamaki added a comment.

Repurpose 'Generic' CudaArch, Use getAllArgValues() for reading
--offload values and fix a enum range.


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Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,18 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo   \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "-spirv-max-version=1.1" "--spirv-ext=+all"
+// CHECK-SAME: [[LOWER_BC]] "-o" "[[SPIRV_OUT:.*out]]"
+
+// CHECK: {{".*clang-offload-bundler"}} "-type=o" "-bundle-align=4096"
+// CHECK-SAME: "-targets=host-x86_64-unknown-linux,hip-spirv64generic"
+// CHECK-SAME: "-inputs={{.*}},[[SPIRV_OUT]]" "-outputs=[[BUNDLE:.*hipfb]]"
+
+// CHECK: [[CLANG]] "-cc1" "-triple" {{".*"}} "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fcuda-include-gpubinary" "[[BUNDLE]]"
+// CHECK-SAME: "-o" [[OBJ_HOST:".*o"]] "-x" "hip"
+
+// CHECK: {{".*ld.*"}} {{.*}}[[OBJ_HOST]]
Index: clang/test/Driver/hipspv-toolchain-rdc.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain-rdc.hip
@@ -0,0 +1,63 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   -fgpu-rdc --hip-path=%S/Inputs/hipspv -nohipwrapperinc \
+// RUN:   %S/Inputs/hip_multiple_inputs/a.cu \
+// RUN:   %S/Inputs/hip_multiple_inputs/b.hip \
+// RUN: 2>&1 | FileCheck %s
+
+// Emit objects for host side path
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: "-aux-triple" "spirv64"
+// CHECK-SAME: "-emit-obj"
+// CHECK-SAME: "-fgpu-rdc"
+// CHECK-SAME: {{.*}} "-o" [[A_OBJ_HOST:".*o"]] "-x" "hip"
+// CHECK-SAME: {{.*}} [[A_SRC:".*a.cu"]]
+
+// CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
+// CHECK-SAME: 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 376822.
linjamaki added a comment.

Update option description.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110618/new/

https://reviews.llvm.org/D110618

Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,99 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructEmitSpirvCommand(Compilation , const JobAction ,
+ const InputInfoList ,
+ const InputInfo ,
+ const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const override { return false; }
+  bool useIntegratedAs() const override { return true; }
+  bool isCrossCompiling() const override { return true; }
+  bool isPICDefault() const override { return false; }
+  bool isPIEDefault() const override { return false; }
+  bool isPICDefaultForced() const override { return false; }
+  bool SupportsProfiling() const override { return false; }
+
+  const ToolChain 
+
+protected:
+  Tool *buildLinker() const override;
+};
+
+} // end namespace toolchains
+} // end namespace driver
+} // end namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
Index: clang/lib/Driver/ToolChains/HIPSPV.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.cpp
@@ -0,0 +1,290 @@
+//===--- HIPSPV.cpp - HIPSPV ToolChain Implementation ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPSPV.h"
+#include 

[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D110622#3030792 , @tra wrote:

>> A Cuda GPU architecture ‘generic’ is added. The name is picked from the LLVM 
>> SPIR-V Backend. In the HIPSPV code path the architecture name is inserted to 
>> the bundle entry ID as target ID. Target ID is expected to be always present 
>> so a component in the target triple is not mistaken as target ID.
>
> How generic is 'generic'? If I understand the statement above correctly, it 
> should probably reflect that it's specific to spir-v.
> If it's the only possible spir-v variant, then calling it`spir-v` might be 
> more meaningful.
> If we expect to see other spir-v variants in the future it would allow us to 
> clearly differentiate between them later. 
> E.g. `--offload=spirv-a,spirv-b`. It would be rather odd if we had to use 
> `--offload=generic, spirv-b`.

In this patch the ‘generic’ is meant to be a processor model defined in the 
SPIR-V backend. Now to come to think of it a bit more, I think it should not be 
specific to the SPIR-V target but the target at hand if its backend defines 
one. What I’m seeing is that each entry in the CudaArch has a processor by the 
same name in the NVPTX and AMGPU backends.

If I need to set different processor other from the SPIR-V backend than what is 
set as the default in HIP compilation, I thought from the [1] it could be 
carried out with something like:

  --offload=spirv64 -Xoffload=spirv64 -march=other-spirv-cpu

[1]: https://lists.llvm.org/pipermail/cfe-dev/2020-December/067362.html

In D110622#3031010 , @tra wrote:

>> --offload’ option, which is envisioned in [1], is added for specifying 
>> offload targets. This option is used to override default device target 
>> (amdgcn-amd-amdhsa) for HIP compilation for emitting device code as SPIR-V 
>> binary. The option is handled in getHIPOffloadTargetTriple().
>
> Can you elaborate on what exactly this option does and how it's intended to 
> interact with the existing `--offload-arch`?

I think that the --offload-arch interaction question is for @yaxunl. What is 
being contributed here is a partial implementation for the unified offloading 
options. The --offload option in this patch is used to supply the offload 
device target triple (in HIP compilation mode) for retargeting the device code 
emission to SPIR-V instead of emitting HSA.

> In general a list of values, combined with the `getLastArg` will potentially 
> be an issue if/when more than one list value will be supported.
> In a large build it's fairly common for the build infrastructure to set the 
> default options and allowing users to extend/override them with *additional* 
> options. `getLastArg` works great for scalar options, not so much for the 
> lists.
> If an option is a list, modifying it requires prior knowledge of preceding 
> values and that may not always be easy.
> E.g. a build configuration may be set to  target gfx900 and gfx908. If I want 
> to *add* an option to target gfx1030, I would need to dig out the options for 
> the currently-enabled architectures and specify all of them again. It's 
> doable once, manually, but it does not scale if this option is expected to be 
> regularly tweaked by the end user, as is the case with `--offload-arch`. If 
> `--offload` is expected to have similar use patterns, you may need to 
> consider allowing it to be adjusted per-list-element.

The use of getLastArg() is an oversight. I’ll fix it with getAllArgValues().




Comment at: clang/include/clang/Basic/Cuda.h:106
 static inline bool IsAMDGpuArch(CudaArch A) {
   return A >= CudaArch::GFX600 && A < CudaArch::LAST;
 }

tra wrote:
> Does this need to be adjusted to exclude SPIR-V? If so, you may want to add 
> another enum range for SPIR-V.
> 
Didn't notice this. I'll fix this.



Comment at: clang/include/clang/Driver/Options.td:1136
+def offload_EQ : CommaJoined<["--"], "offload=">, Flags<[NoXarchOption]>,
+  HelpText<"Specify comma-separated list of offloading targets.">;
+

tra wrote:
> `comma-separated list of offloading targets.` is, unfortunately, somewhat 
> ambiguous.
> Does it mean "how the offload will be done". I.e. HSA, OpenMP, SPIRV, CUDA? 
> Or does it mean specific hardware we need to generate the code for? 
> The code suggests it's a variant of the former, but the option description 
> does not. 
> 
> E.g. `offload_arch_EQ ` also uses the term "offloading target" but with a 
> different meaning.
> 
I’m not sure how to rephrase the option description to be more clear. In the 
[1] the `--offload` option is envisioned to be quite flexible/expressive - it 
can take in target triples, offload kinds, processors, aliases for processor 
sets, etc.

FYI, I have imagined that the `--offload` option would take in explicit offload 
kind and target triple combinations as the basis. For example, something like 
this:


```

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added a comment.

In D110618#3032899 , @Anastasia wrote:

> Considering that SPIR-V translation step is also required for other languages 
> would it make sense to add `llvm-spirv` as a common tool like for example 
> C/C++ linkers and create a bit of common infrastructure? It might be 
> something we can do as a separate step too but it would be good to make sure 
> nothing prevents us from doing this in the future... We should probably also 
> think about the command line interface unification as it probably doesn't 
> make sense for every language to add their own flags for locating SPIR-V 
> translator.

I don’t think it would work out well. llvm-spirv (or other tool relying on LLVM 
bitcode input) and LLVM may have version differences that cause obscure error 
cases - like newer LLVM producing bitcode with new features the tools are not 
expecting and ready for them. The usage of llvm-spirv tool in the HIPSPV tool 
chain is not intended to be a longer term solution due to this shortcoming.

> Another question I have is whether `--hipspv-pass-plugin` would be needed 
> when we switch to SPIR-V backend or is this something that would be 
> integrated fully upstream eventually. Then we might need to think more of the 
> suitable transition path.

It’s too early to say if we can integrate --hipspv-pass-plugin fully in the 
future. It would be the preferred outcome. We are not finished with the HIP 
expanders we need for supporting various HIP features so we don’t know for 
certain what will be the outcome for the integration. It’s possible that some 
of the solutions are going to be tightly coupled with runtimes (HIPLZ, HIPCL) 
and others that may not generalize for different SPIR-V execution environments.




Comment at: clang/include/clang/Driver/Options.td:3701
   " do not include the default CUDA/HIP wrapper headers">;
+def nohipwrapperinc : Flag<["-"], "nohipwrapperinc">,
+  HelpText<"Do not include the default HIP wrapper headers">;

tra wrote:
> Is the idea to still add relevant include paths to the wrappers and SDK 
> headers, but not `-include` the wrapper?
> 
> If that's the case, it should probably be generalized into `-nogpuwrapperinc` 
> and apply to both CUDA and HIP.
> 
> Is the idea to still add relevant include paths to the wrappers and SDK 
> headers, but not `-include` the wrapper?
> 
Include paths are meant to be excluded too. I’ll fix the option description.

> If that's the case, it should probably be generalized into `-nogpuwrapperinc` 
> and apply to both CUDA and HIP.
> 
I don’t see an immediate need to generalize the option as I don’t think there 
will be a need for it in the CUDA path. The option could be generalized later 
if the need comes (add generalized option, set -nohipwrapperinc to be alias to 
it).



Repository:
  rG LLVM Github Monorepo

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[PATCH] D110622: [HIPSPV][3/4] Enable SPIR-V emission for HIP

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: Naghasan, dexonsmith, dang, Anastasia, yaxunl, 
jholewinski.
linjamaki updated this revision to Diff 375783.
linjamaki added a comment.
linjamaki updated this revision to Diff 375786.
linjamaki added reviewers: yaxunl, bader.
linjamaki published this revision for review.
Herald added a reviewer: jdoerfert.
Herald added subscribers: cfe-commits, sstefan1.
Herald added a project: clang.

Style fixes.


linjamaki added a comment.

Remove noisy change.


This patch enables SPIR-V binary emission for HIP device code via the
HIPSPV tool chain.

- ‘--offload’ option, which is envisioned in [1], is added for specifying 
offload targets. This option is used to override default device target 
(amdgcn-amd-amdhsa) for HIP compilation for emitting device code as SPIR-V 
binary. The option is handled in getHIPOffloadTargetTriple().

- getOffloadingDeviceToolChain() function (based on the design in the SYCL 
repository) is added to select HIPSPVToolChain when HIP offload target is 
‘spirv64’.

- The HIPActionBuilder is modified to produce LLVM IR at the backend phase. 
HIPSPV tool chain expects to receive HIP device code as LLVM IR so it can run 
external LLVM passes over them. HIPSPV TC is also responsible for emitting the 
SPIR-V binary.

- A Cuda GPU architecture ‘generic’ is added. The name is picked from the LLVM 
SPIR-V Backend. In the HIPSPV code path the architecture name is inserted to 
the bundle entry ID as target ID. Target ID is expected to be always present so 
a component in the target triple is not mistaken as target ID.

- Tests are added for checking the HIPSPV tool chain.

[1]: https://lists.llvm.org/pipermail/cfe-dev/2020-December/067362.html


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110622

Files:
  clang/include/clang/Basic/Cuda.h
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Driver.h
  clang/include/clang/Driver/Options.td
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/Inputs/hipspv-dev-lib/a/a.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/b/b.bc
  clang/test/Driver/Inputs/hipspv-dev-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/bin/.hipVersion
  clang/test/Driver/Inputs/hipspv/lib/hip-device-lib/hipspv-spirv64.bc
  clang/test/Driver/Inputs/hipspv/lib/libLLVMHipSpvPasses.so
  clang/test/Driver/Inputs/pass-plugin.so
  clang/test/Driver/hipspv-device-libs.hip
  clang/test/Driver/hipspv-pass-plugin.hip
  clang/test/Driver/hipspv-toolchain-rdc.hip
  clang/test/Driver/hipspv-toolchain.hip
  clang/test/Driver/invalid-offload-options.cpp

Index: clang/test/Driver/invalid-offload-options.cpp
===
--- /dev/null
+++ clang/test/Driver/invalid-offload-options.cpp
@@ -0,0 +1,18 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload= \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo   \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=INVALID-TARGET %s
+
+// INVALID-TARGET: error: Invalid or unsupported offload target: '{{.*}}'
+
+// RUN: %clang -### -x hip -target x86_64-linux-gnu --offload=foo,bar \
+// RUN:   --hip-path=%S/Inputs/hipspv -nogpuinc -nogpulib %s \
+// RUN: 2>&1 | FileCheck --check-prefix=TOO-MANY-TARGETS %s
+
+// TOO-MANY-TARGETS: error: Only one offload target is supported in HIP.
Index: clang/test/Driver/hipspv-toolchain.hip
===
--- /dev/null
+++ clang/test/Driver/hipspv-toolchain.hip
@@ -0,0 +1,37 @@
+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// UNSUPPORTED: system-windows
+
+// RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \
+// RUN:   --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \
+// RUN: 2>&1 | FileCheck %s
+
+// CHECK: [[CLANG:".*clang.*"]] "-cc1" "-triple" "spirv64"
+// CHECK-SAME: "-aux-triple" "{{.*}}" "-emit-llvm-bc"
+// CHECK-SAME: "-fcuda-is-device"
+// CHECK-SAME: "-fcuda-allow-variadic-functions"
+// CHECK-SAME: "-mlink-builtin-bitcode" {{".*/hipspv/lib/hip-device-lib/hipspv-spirv64.bc"}}
+// CHECK-SAME: "-isystem" {{".*/hipspv/include"}}
+// CHECK-SAME: "-fhip-new-launch-api"
+// CHECK-SAME: "-o" [[DEV_BC:".*bc"]]
+// CHECK-SAME: "-x" "hip"
+
+// CHECK: {{".*llvm-link"}} [[DEV_BC]] "-o" [[LINK_BC:".*bc"]]
+
+// CHECK: {{".*opt"}} [[LINK_BC]] "-load-pass-plugin"
+// CHECK-SAME: {{".*/hipspv/lib/libLLVMHipSpvPasses.so"}}
+// CHECK-SAME: "-passes=hip-post-link-passes" "-o" [[LOWER_BC:".*bc"]]
+
+// CHECK: {{".*llvm-spirv"}} "-spirv-max-version=1.1" "--spirv-ext=+all"
+// 

[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: dang, kerbowa, yaxunl, mgorny, nhaehnle, jvesely.
linjamaki updated this revision to Diff 375526.
linjamaki added a comment.
linjamaki published this revision for review.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Style fixes.


This patch adds a new tool chain, HIPSPVToolChain, for emitting HIP
device code as SPIR-V binary. The SPIR-V binary is emitted by using an
external tool, SPIRV-LLVM-Translator, temporarily. We intend to switch
the translator to the llc tool when the SPIR-V backend lands on LLVM
and proves to work well on HIP implementations which consume SPIR-V.

Before the SPIR-V emission the tool chain loads an optional external
pass plugin, either automatically from a HIP installation or from a
path pointed by --hipspv-pass-plugin, and runs passes that are meant
to expand/lower HIP features that do not have direct counterpart in
SPIR-V (e.g. dynamic shared memory).

Code emission for SPIR-V will be enabled and HIPSPVToolChain tests
will be added in the follow up patch part 3.

Other changes: New option ‘-nohipwrapperinc’ is added to exclude HIP
include wrappers. The reason for the addition is that they cause
compile errors when compiling HIP sources for the host side for HIPCL
and HIPLZ implementations. New option is added to avoid this issue.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110618

Files:
  clang/include/clang/Basic/DiagnosticDriverKinds.td
  clang/include/clang/Driver/Options.td
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/lib/Driver/ToolChains/HIPSPV.cpp
  clang/lib/Driver/ToolChains/HIPSPV.h

Index: clang/lib/Driver/ToolChains/HIPSPV.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPSPV.h
@@ -0,0 +1,99 @@
+//===--- HIPSPV.h - HIP ToolChain Implementations ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPSPV_H
+
+#include "clang/Driver/Tool.h"
+#include "clang/Driver/ToolChain.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIPSPV {
+
+// Runs llvm-link/opt/llc/lld, which links multiple LLVM bitcode, together with
+// device library, then compiles it to SPIR-V in a shared object.
+class LLVM_LIBRARY_VISIBILITY Linker : public Tool {
+public:
+  Linker(const ToolChain ) : Tool("HIPSPV::Linker", "hipspv-link", TC) {}
+
+  bool hasIntegratedCPP() const override { return false; }
+
+  void ConstructJob(Compilation , const JobAction ,
+const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList ,
+const char *LinkingOutput) const override;
+
+private:
+  void constructEmitSpirvCommand(Compilation , const JobAction ,
+ const InputInfoList ,
+ const InputInfo ,
+ const llvm::opt::ArgList ) const;
+};
+
+} // namespace HIPSPV
+} // namespace tools
+
+namespace toolchains {
+
+class LLVM_LIBRARY_VISIBILITY HIPSPVToolChain final : public ToolChain {
+public:
+  HIPSPVToolChain(const Driver , const llvm::Triple ,
+  const ToolChain , const llvm::opt::ArgList );
+
+  const llvm::Triple *getAuxTriple() const override {
+return ();
+  }
+
+  void
+  addClangTargetOptions(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ,
+Action::OffloadKind DeviceOffloadKind) const override;
+  void addClangWarningOptions(llvm::opt::ArgStringList ) const override;
+  CXXStdlibType GetCXXStdlibType(const llvm::opt::ArgList ) const override;
+  void
+  AddClangSystemIncludeArgs(const llvm::opt::ArgList ,
+llvm::opt::ArgStringList ) const override;
+  void AddClangCXXStdlibIncludeArgs(
+  const llvm::opt::ArgList ,
+  llvm::opt::ArgStringList ) const override;
+  void AddIAMCUIncludeArgs(const llvm::opt::ArgList ,
+   llvm::opt::ArgStringList ) const override;
+  void AddHIPIncludeArgs(const llvm::opt::ArgList ,
+ llvm::opt::ArgStringList ) const override;
+  llvm::SmallVector
+  getHIPDeviceLibs(const llvm::opt::ArgList ) const override;
+
+  SanitizerMask getSupportedSanitizers() const override;
+
+  VersionTuple
+  computeMSVCVersion(const Driver *D,
+ const llvm::opt::ArgList ) const override;
+
+  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  bool IsIntegratedAssemblerDefault() const override { return true; }
+  bool IsMathErrnoDefault() const 

[PATCH] D110549: [HIPSPV][1/4] Refactor HIP tool chain

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: yaxunl, mgorny.
linjamaki edited the summary of this revision.
linjamaki updated this revision to Diff 375488.
linjamaki added a comment.
linjamaki edited the summary of this revision.
linjamaki added a reviewer: yaxunl.
linjamaki published this revision for review.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Style fixes.


This patch refactors the HIP tool chain for new HIP tool chain, HIPSPV
tool chain, which is added in the follow up patch part 2.

- Rename HIPToolChain to HIPAMDToolChain and Renames HIP.* files to HIPAMD.*.

- Introduce HIPUtility.* file where common HIP utilities, shared among HIP tool 
chain implementations, are placed in.

- Move constructHIPFatbinCommand() and 
constructGenerateObjFileFromHIPFatBinary() to HIPUtility. HIPSPV tool chain is 
going to use them.

- Tweak bundle target ID in constructHIPFatbinCommand(): extra dashes are 
dropped if the Target ID is empty and 'hip' offload kind is made default for 
non-AMD targets.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110549

Files:
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/Driver.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/HIP.cpp
  clang/lib/Driver/ToolChains/HIP.h
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/lib/Driver/ToolChains/HIPAMD.h
  clang/lib/Driver/ToolChains/HIPUtility.cpp
  clang/lib/Driver/ToolChains/HIPUtility.h

Index: clang/lib/Driver/ToolChains/HIPUtility.h
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.h
@@ -0,0 +1,35 @@
+//===--- HIPUtility.h - Common HIP Tool Chain Utilities -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+#define LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
+
+#include "clang/Driver/Tool.h"
+
+namespace clang {
+namespace driver {
+namespace tools {
+namespace HIP {
+
+// Construct command for creating HIP fatbin.
+void constructHIPFatbinCommand(Compilation , const JobAction ,
+   StringRef OutputFileName,
+   const InputInfoList ,
+   const llvm::opt::ArgList , const Tool );
+
+// Construct command for creating Object from HIP fatbin.
+void constructGenerateObjFileFromHIPFatBinary(
+Compilation , const InputInfo , const InputInfoList ,
+const llvm::opt::ArgList , const JobAction , const Tool );
+
+} // namespace HIP
+} // namespace tools
+} // namespace driver
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_DRIVER_TOOLCHAINS_HIPUTILITY_H
Index: clang/lib/Driver/ToolChains/HIPUtility.cpp
===
--- /dev/null
+++ clang/lib/Driver/ToolChains/HIPUtility.cpp
@@ -0,0 +1,155 @@
+//===--- HIPUtility.cpp - Common HIP Tool Chain Utilities ---*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "HIPUtility.h"
+#include "CommonArgs.h"
+#include "clang/Driver/Compilation.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Path.h"
+
+using namespace clang::driver;
+using namespace clang::driver::tools;
+using namespace llvm::opt;
+
+#if defined(_WIN32) || defined(_WIN64)
+#define NULL_FILE "nul"
+#else
+#define NULL_FILE "/dev/null"
+#endif
+
+namespace {
+const unsigned HIPCodeObjectAlign = 4096;
+} // namespace
+
+// Constructs a triple string for clang offload bundler.
+static std::string normalizeForBundler(const llvm::Triple ,
+   bool HasTargetID) {
+  return HasTargetID ? (T.getArchName() + "-" + T.getVendorName() + "-" +
+T.getOSName() + "-" + T.getEnvironmentName())
+   .str()
+ : T.normalize();
+}
+
+// Construct a clang-offload-bundler command to bundle code objects for
+// different devices into a HIP fat binary.
+void HIP::constructHIPFatbinCommand(Compilation , const JobAction ,
+StringRef OutputFileName,
+const InputInfoList ,
+const llvm::opt::ArgList ,
+const Tool ) {
+  // Construct clang-offload-bundler command to bundle object files for
+  // for different GPU archs.
+  ArgStringList BundlerArgs;
+  

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 375233.
linjamaki added a comment.

Put HIPSPV logic into new SPIRV{ABI,TargetCodeGen}Info subclassed from
CommonSPIR{ABI,TargetCodeGen}Info.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109818/new/

https://reviews.llvm.org/D109818

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenHIP/hipspv-kernel.cpp

Index: clang/test/CodeGenHIP/hipspv-kernel.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-kernel.cpp
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __global__ __attribute__((global))
+
+// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}})
+__global__ void foo(float *a, float b) {
+  *a = b;
+}
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10194,12 +10194,23 @@
 private:
   void setCCs();
 };
+
+class SPIRVABIInfo : public CommonSPIRABIInfo {
+public:
+  SPIRVABIInfo(CodeGenTypes ) : CommonSPIRABIInfo(CGT) {}
+  void computeInfo(CGFunctionInfo ) const override;
+
+private:
+  ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
+};
 } // end anonymous namespace
 namespace {
 class CommonSPIRTargetCodeGenInfo : public TargetCodeGenInfo {
 public:
   CommonSPIRTargetCodeGenInfo(CodeGen::CodeGenTypes )
   : TargetCodeGenInfo(std::make_unique(CGT)) {}
+  CommonSPIRTargetCodeGenInfo(std::unique_ptr ABIInfo)
+  : TargetCodeGenInfo(std::move(ABIInfo)) {}
 
   LangAS getASTAllocaAddressSpace() const override {
 return getLangASFromTargetAS(
@@ -10208,18 +10219,60 @@
 
   unsigned getOpenCLKernelCallingConv() const override;
 };
-
+class SPIRVTargetCodeGenInfo : public CommonSPIRTargetCodeGenInfo {
+public:
+  SPIRVTargetCodeGenInfo(CodeGen::CodeGenTypes )
+  : CommonSPIRTargetCodeGenInfo(std::make_unique(CGT)) {}
+  void setCUDAKernelCallingConvention(const FunctionType *) const override;
+};
 } // End anonymous namespace.
+
 void CommonSPIRABIInfo::setCCs() {
   assert(getRuntimeCC() == llvm::CallingConv::C);
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP) {
+// Coerce pointer arguments with default address space to CrossWorkGroup
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);
+auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
+auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+if (LTy->isPointerTy() && LTy->getPointerAddressSpace() == DefaultAS) {
+  LTy = llvm::PointerType::get(
+  cast(LTy)->getElementType(), GlobalAS);
+  return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+}
+  }
+  return classifyArgumentType(Ty);
+}
+
+void SPIRVABIInfo::computeInfo(CGFunctionInfo ) const {
+  // The logic is same as in DefaultABIInfo with an exception on the kernel
+  // arguments handling.
+  llvm::CallingConv::ID CC = FI.getCallingConvention();
+
+  if (!getCXXABI().classifyReturnType(FI))
+FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+
+  for (auto  : FI.arguments()) {
+if (CC == llvm::CallingConv::SPIR_KERNEL) {
+  I.info = classifyKernelArgumentType(I.type);
+} else {
+  I.info = classifyArgumentType(I.type);
+}
+  }
+}
+
 namespace clang {
 namespace CodeGen {
 void computeSPIRKernelABIInfo(CodeGenModule , CGFunctionInfo ) {
-  DefaultABIInfo SPIRABI(CGM.getTypes());
-  SPIRABI.computeInfo(FI);
+  if (CGM.getTarget().getTriple().isSPIRV())
+SPIRVABIInfo(CGM.getTypes()).computeInfo(FI);
+  else
+CommonSPIRABIInfo(CGM.getTypes()).computeInfo(FI);
 }
 }
 }
@@ -10228,6 +10281,16 @@
   return llvm::CallingConv::SPIR_KERNEL;
 }
 
+void SPIRVTargetCodeGenInfo::setCUDAKernelCallingConvention(
+const FunctionType *) const {
+  // Convert HIP kernels to SPIR-V kernels.
+  if (getABIInfo().getContext().getLangOpts().HIP) {
+FT = getABIInfo().getContext().adjustFunctionType(
+FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
+return;
+  }
+}
+
 static bool appendType(SmallStringEnc , QualType QType,
const CodeGen::CodeGenModule ,
TypeStringCache );
@@ -11293,9 +11356,10 @@
 return SetCGInfo(new ARCTargetCodeGenInfo(Types));
   case llvm::Triple::spir:
   case llvm::Triple::spir64:
+return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
   case llvm::Triple::spirv32:
   case llvm::Triple::spirv64:
-return SetCGInfo(new CommonSPIRTargetCodeGenInfo(Types));
+return SetCGInfo(new 

[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 375221.
linjamaki added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108621/new/

https://reviews.llvm.org/D108621

Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 
addrspace(4)*
+  return 
+}
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -56,9 +56,14 @@
 0, // opencl_generic
 0, // opencl_global_device
 0, // opencl_global_host
-0, // cuda_device
-0, // cuda_constant
-0, // cuda_shared
+// cuda_* address space mapping is intended for HIPSPV (HIP to SPIR-V
+// translation). This mapping is enabled when the language mode is HIP.
+1, // cuda_device
+// cuda_constant pointer can be casted to default/"flat" pointer, but in
+// SPIR-V casts between constant and generic pointers are not allowed. For
+// this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
+1, // cuda_constant
+3, // cuda_shared
 1, // sycl_global
 5, // sycl_global_device
 6, // sycl_global_host
@@ -219,6 +224,16 @@
   bool hasFeature(StringRef Feature) const override {
 return Feature == "spirv";
   }
+
+  void adjust(DiagnosticsEngine , LangOptions ) override {
+BaseSPIRTargetInfo::adjust(Diags, Opts);
+// Guarded so we don't override address space map setting set by
+// BaseSPIRTargetInfo::adjust.
+if (Opts.HIP && Opts.CUDAIsDevice)
+  // Enable address space mapping from HIP to SPIR-V.
+  // See comment on the SPIRDefIsGenMap table.
+  setAddressSpaceMap(/*DefaultIsGeneric=*/true);
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public SPIRVTargetInfo {


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 

[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 375219.
linjamaki added a comment.
Herald added subscribers: llvm-commits, dexonsmith, hiraditya.
Herald added a project: LLVM.

Rebase.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108621/new/

https://reviews.llvm.org/D108621

Files:
  clang/include/clang/Basic/DiagnosticGroups.td
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/SPIR.cpp
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/InitPreprocessor.cpp
  clang/lib/Headers/opencl-c-base.h
  clang/lib/Headers/opencl-c.h
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
  clang/test/CodeGenOpenCL/spirv_target.cl
  clang/test/Headers/opencl-c-header.cl
  clang/test/Preprocessor/predefined-macros.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -224,6 +224,16 @@
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
   EXPECT_EQ(Triple::UnknownOS, T.getOS());
 
+  T = Triple("spirv32-unknown-unknown");
+  EXPECT_EQ(Triple::spirv32, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+  T = Triple("spirv64-unknown-unknown");
+  EXPECT_EQ(Triple::spirv64, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
   T = Triple("x86_64-unknown-ananas");
   EXPECT_EQ(Triple::x86_64, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
@@ -865,6 +875,16 @@
   EXPECT_FALSE(T.isArch32Bit());
   EXPECT_TRUE(T.isArch64Bit());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_TRUE(T.isArch32Bit());
+  EXPECT_FALSE(T.isArch64Bit());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_FALSE(T.isArch32Bit());
+  EXPECT_TRUE(T.isArch64Bit());
+
   T.setArch(Triple::sparc);
   EXPECT_FALSE(T.isArch16Bit());
   EXPECT_TRUE(T.isArch32Bit());
@@ -1000,6 +1020,14 @@
   EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
   T.setArch(Triple::wasm32);
   EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -67,6 +67,8 @@
   case sparcv9:return "sparcv9";
   case spir64: return "spir64";
   case spir:   return "spir";
+  case spirv32:return "spirv32";
+  case spirv64:return "spirv64";
   case systemz:return "s390x";
   case tce:return "tce";
   case tcele:  return "tcele";
@@ -147,6 +149,10 @@
 
   case spir:
   case spir64:  return "spir";
+
+  case spirv32:
+  case spirv64: return "spirv";
+
   case kalimba: return "kalimba";
   case lanai:   return "lanai";
   case shave:   return "shave";
@@ -323,6 +329,8 @@
 .Case("hsail64", hsail64)
 .Case("spir", spir)
 .Case("spir64", spir64)
+.Case("spirv32", spirv32)
+.Case("spirv64", spirv64)
 .Case("kalimba", kalimba)
 .Case("lanai", lanai)
 .Case("shave", shave)
@@ -456,6 +464,8 @@
 .Case("hsail64", Triple::hsail64)
 .Case("spir", Triple::spir)
 .Case("spir64", Triple::spir64)
+.Case("spirv32", Triple::spirv32)
+.Case("spirv64", Triple::spirv64)
 .StartsWith("kalimba", Triple::kalimba)
 .Case("lanai", Triple::lanai)
 .Case("renderscript32", Triple::renderscript32)
@@ -753,6 +763,11 @@
   case Triple::wasm32:
   case Triple::wasm64:
 return Triple::Wasm;
+
+  case Triple::spirv32:
+  case Triple::spirv64:
+// TODO: In future this will be Triple::SPIRV.
+return Triple::UnknownObjectFormat;
   }
   llvm_unreachable("unknown architecture");
 }
@@ -1298,6 +1313,7 @@
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel:
   case llvm::Triple::spir:
+  case llvm::Triple::spirv32:
   case llvm::Triple::tce:
   case llvm::Triple::tcele:
   case llvm::Triple::thumb:
@@ -1324,6 +1340,7 @@
   case llvm::Triple::riscv64:
   case llvm::Triple::sparcv9:
   case llvm::Triple::spir64:
+  case llvm::Triple::spirv64:
   case llvm::Triple::systemz:
   case llvm::Triple::ve:
   case llvm::Triple::wasm64:
@@ -1383,6 +1400,7 @@
   case Triple::sparc:
   case 

[PATCH] D109144: [SPIR-V] Add SPIR-V triple architecture and clang target info

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 375216.
linjamaki added a comment.

Rename SPIRABIInfo -> CommonSPIRABIInfo and SPIRTargetCodeGenInfo -> 
CommonSPIRTargetCodeGenInfo


Repository:
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  https://reviews.llvm.org/D109144/new/

https://reviews.llvm.org/D109144

Files:
  clang/include/clang/Basic/DiagnosticGroups.td
  clang/lib/Basic/Targets.cpp
  clang/lib/Basic/Targets/SPIR.cpp
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/InitPreprocessor.cpp
  clang/lib/Headers/opencl-c-base.h
  clang/lib/Headers/opencl-c.h
  clang/test/CodeGenOpenCL/spirv_target.cl
  clang/test/Headers/opencl-c-header.cl
  clang/test/Preprocessor/predefined-macros.c
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/Support/Triple.cpp
  llvm/unittests/ADT/TripleTest.cpp

Index: llvm/unittests/ADT/TripleTest.cpp
===
--- llvm/unittests/ADT/TripleTest.cpp
+++ llvm/unittests/ADT/TripleTest.cpp
@@ -224,6 +224,16 @@
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
   EXPECT_EQ(Triple::UnknownOS, T.getOS());
 
+  T = Triple("spirv32-unknown-unknown");
+  EXPECT_EQ(Triple::spirv32, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
+  T = Triple("spirv64-unknown-unknown");
+  EXPECT_EQ(Triple::spirv64, T.getArch());
+  EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
+  EXPECT_EQ(Triple::UnknownOS, T.getOS());
+
   T = Triple("x86_64-unknown-ananas");
   EXPECT_EQ(Triple::x86_64, T.getArch());
   EXPECT_EQ(Triple::UnknownVendor, T.getVendor());
@@ -865,6 +875,16 @@
   EXPECT_FALSE(T.isArch32Bit());
   EXPECT_TRUE(T.isArch64Bit());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_TRUE(T.isArch32Bit());
+  EXPECT_FALSE(T.isArch64Bit());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_FALSE(T.isArch16Bit());
+  EXPECT_FALSE(T.isArch32Bit());
+  EXPECT_TRUE(T.isArch64Bit());
+
   T.setArch(Triple::sparc);
   EXPECT_FALSE(T.isArch16Bit());
   EXPECT_TRUE(T.isArch32Bit());
@@ -1000,6 +1020,14 @@
   EXPECT_EQ(Triple::spir, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::spir64, T.get64BitArchVariant().getArch());
 
+  T.setArch(Triple::spirv32);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
+  T.setArch(Triple::spirv64);
+  EXPECT_EQ(Triple::spirv32, T.get32BitArchVariant().getArch());
+  EXPECT_EQ(Triple::spirv64, T.get64BitArchVariant().getArch());
+
   T.setArch(Triple::wasm32);
   EXPECT_EQ(Triple::wasm32, T.get32BitArchVariant().getArch());
   EXPECT_EQ(Triple::wasm64, T.get64BitArchVariant().getArch());
Index: llvm/lib/Support/Triple.cpp
===
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -67,6 +67,8 @@
   case sparcv9:return "sparcv9";
   case spir64: return "spir64";
   case spir:   return "spir";
+  case spirv32:return "spirv32";
+  case spirv64:return "spirv64";
   case systemz:return "s390x";
   case tce:return "tce";
   case tcele:  return "tcele";
@@ -147,6 +149,10 @@
 
   case spir:
   case spir64:  return "spir";
+
+  case spirv32:
+  case spirv64: return "spirv";
+
   case kalimba: return "kalimba";
   case lanai:   return "lanai";
   case shave:   return "shave";
@@ -323,6 +329,8 @@
 .Case("hsail64", hsail64)
 .Case("spir", spir)
 .Case("spir64", spir64)
+.Case("spirv32", spirv32)
+.Case("spirv64", spirv64)
 .Case("kalimba", kalimba)
 .Case("lanai", lanai)
 .Case("shave", shave)
@@ -456,6 +464,8 @@
 .Case("hsail64", Triple::hsail64)
 .Case("spir", Triple::spir)
 .Case("spir64", Triple::spir64)
+.Case("spirv32", Triple::spirv32)
+.Case("spirv64", Triple::spirv64)
 .StartsWith("kalimba", Triple::kalimba)
 .Case("lanai", Triple::lanai)
 .Case("renderscript32", Triple::renderscript32)
@@ -753,6 +763,11 @@
   case Triple::wasm32:
   case Triple::wasm64:
 return Triple::Wasm;
+
+  case Triple::spirv32:
+  case Triple::spirv64:
+// TODO: In future this will be Triple::SPIRV.
+return Triple::UnknownObjectFormat;
   }
   llvm_unreachable("unknown architecture");
 }
@@ -1298,6 +1313,7 @@
   case llvm::Triple::sparc:
   case llvm::Triple::sparcel:
   case llvm::Triple::spir:
+  case llvm::Triple::spirv32:
   case llvm::Triple::tce:
   case llvm::Triple::tcele:
   case llvm::Triple::thumb:
@@ -1324,6 +1340,7 @@
   case llvm::Triple::riscv64:
   case llvm::Triple::sparcv9:
   case llvm::Triple::spir64:
+  case llvm::Triple::spirv64:
   case llvm::Triple::systemz:
   case llvm::Triple::ve:
   case llvm::Triple::wasm64:
@@ -1383,6 +1400,7 @@
   case Triple::sparc:
   case Triple::sparcel:
   case Triple::spir:
+  case Triple::spirv32:

[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10224
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);

bader wrote:
> Anastasia wrote:
> > linjamaki wrote:
> > > Anastasia wrote:
> > > > Can you explain why this mapping is needed? We already have an address 
> > > > space map to perform the mapping of address spaces b/w language and 
> > > > target. It would be good if we don't replicate similar logic in too 
> > > > many places.
> > > HIP does not require address space qualifiers on kernel pointer arguments 
> > > (e.g. see hipspv-kernel.cpp) nor there are AS qualifiers that can be 
> > > placed on them. With the default logic, provided by SPIRVTargetInfo’s 
> > > address space map, the kernel pointer arguments get converted to generic 
> > > pointers which are not allowed by the OpenCL SPIR-V Environment 
> > > Specification.
> > I feel that it is the same for SYCL... It might be good to check with 
> > @bader whether there is already a way to handle this that can be reused for 
> > HIP...
> We need to do similar transformation for SYCL, but it's not exactly the same. 
> For SYCL kernels, which represented as function objects, compiler generates 
> SPIR kernel function and fixes up the address space for pointer arguments in 
> compiler generated declaration. For more details, see the description of 
> https://reviews.llvm.org/D71016  and `handlePointerType` function code in 
> clang/lib/Sema/SemaSYCL.cpp of this review request (lines 848-876). As 
> address space is fixed in Sema, it works for all targets SYCL currently 
> supports SPIR, NVPTX and AMDGPU.
> 
> If I understand it correctly, we are trying to do minimal amount of work for 
> convert HIP kernel function to SPIR kernel function, i.e. fix calling 
> convention and address spaces. 
> Are these two fixes enough or we need more fixes to enable more sophisticated 
> kernels?
This patch and D108621 covers only the calling convention and the address space 
aspects in HIP->SPIR-V conversion. There are still various HIP features [1] 
which need to be expanded or emulated afterwards. A fully linked device program 
is needed before the fixes can be applied, so these fixes won’t be implemented 
at Sema nor CodeGen which operate per translation unit. The full-program fixes 
are applied by the HIPSPV tool chain by applying LLVM passes provided by a 
HIPSPV runtime [2].  For the time being, we are not seeing a need to specialize 
SPIR target infos further.

[1]: “HIP code expansion” section of the “[RFC][HIPSPV] Emitting HIP device 
code as SPIR-V”
[2]: clang/lib/Driver/ToolChains/HIPSPV.cpp:constructEmitSpirvCommand() @ 
https://github.com/parmance/llvm-project/tree/hipspv-wip


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[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10221
+ABIArgInfo SPIRABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP && getTarget().getTriple().isSPIRV()) {
+// Coerce pointer arguments with default address space to CrossWorkGroup

Anastasia wrote:
> It feels like this needs to be in `SPIRVABIInfo`  or something? Or can this 
> be generalized to both  - SPIR and SPIR-V?
A comment was added in D109144 to state that the SPIRABIInfo is an ABI 
implementation for both the SPIR and SPIR-V. For now, there is not much 
difference between SPIR and SPIR-V for this class. Would it be satisfactory if 
the class is renamed to something more general (like CommonSPIRABIInfo)?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10224
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);

Anastasia wrote:
> Can you explain why this mapping is needed? We already have an address space 
> map to perform the mapping of address spaces b/w language and target. It 
> would be good if we don't replicate similar logic in too many places.
HIP does not require address space qualifiers on kernel pointer arguments (e.g. 
see hipspv-kernel.cpp) nor there are AS qualifiers that can be placed on them. 
With the default logic, provided by SPIRVTargetInfo’s address space map, the 
kernel pointer arguments get converted to generic pointers which are not 
allowed by the OpenCL SPIR-V Environment Specification.


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[PATCH] D109818: [HIPSPV] Convert HIP kernels to SPIR-V kernels

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki created this revision.
Herald added subscribers: Anastasia, yaxunl.
linjamaki updated this revision to Diff 372671.
linjamaki added a comment.
Herald added subscribers: dexonsmith, hiraditya.
linjamaki updated this revision to Diff 373494.
linjamaki edited the summary of this revision.
linjamaki published this revision for review.
linjamaki added reviewers: Anastasia, bader.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Rebase.


linjamaki added a comment.

Rebase.


This patch translates HIP kernels to SPIR-V kernels when the HIP 
compilation mode is targeting SPIR-S. This involves:

- Setting Cuda calling convention to CC_OpenCLKernel (which maps to SPIR_KERNEL 
in LLVM IR later on).

- Coercing pointer arguments with default address space (AS) qualifier to 
CrossWorkGroup AS (__global in OpenCL). HIPSPV's device code is ultimately 
SPIR-V for OpenCL execution environment (as starter/default) where Generic or 
Function (OpenCL's private) is not supported as storage class for kernel 
pointer types. This leaves the CrossWorkGroup to be the only reasonable choice 
for HIP buffers.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D109818

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenHIP/hipspv-kernel.cpp

Index: clang/test/CodeGenHIP/hipspv-kernel.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-kernel.cpp
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __global__ __attribute__((global))
+
+// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}})
+__global__ void foo(float *a, float b) {
+  *a = b;
+}
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10189,8 +10189,11 @@
 public:
   SPIRABIInfo(CodeGenTypes ) : DefaultABIInfo(CGT) { setCCs(); }
 
+  void computeInfo(CGFunctionInfo ) const override;
+
 private:
   void setCCs();
+  ABIArgInfo classifyKernelArgumentType(QualType Ty) const;
 };
 } // end anonymous namespace
 namespace {
@@ -10205,6 +10208,7 @@
   }
 
   unsigned getOpenCLKernelCallingConv() const override;
+  void setCUDAKernelCallingConvention(const FunctionType *) const override;
 };
 
 } // End anonymous namespace.
@@ -10213,10 +10217,44 @@
   RuntimeCC = llvm::CallingConv::SPIR_FUNC;
 }
 
+ABIArgInfo SPIRABIInfo::classifyKernelArgumentType(QualType Ty) const {
+  if (getContext().getLangOpts().HIP && getTarget().getTriple().isSPIRV()) {
+// Coerce pointer arguments with default address space to CrossWorkGroup
+// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
+// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+llvm::Type *LTy = CGT.ConvertType(Ty);
+auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
+auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
+if (LTy->isPointerTy() && LTy->getPointerAddressSpace() == DefaultAS) {
+  LTy = llvm::PointerType::get(
+  cast(LTy)->getElementType(), GlobalAS);
+  return ABIArgInfo::getDirect(LTy, 0, nullptr, false);
+}
+  }
+  return classifyArgumentType(Ty);
+}
+
+void SPIRABIInfo::computeInfo(CGFunctionInfo ) const {
+  // The logic is same as in DefaultABIInfo with an exception on the kernel
+  // arguments handling.
+  llvm::CallingConv::ID CC = FI.getCallingConvention();
+
+  if (!getCXXABI().classifyReturnType(FI))
+FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
+
+  for (auto  : FI.arguments()) {
+if (CC == llvm::CallingConv::SPIR_KERNEL) {
+  I.info = classifyKernelArgumentType(I.type);
+} else {
+  I.info = classifyArgumentType(I.type);
+}
+  }
+}
+
 namespace clang {
 namespace CodeGen {
 void computeSPIRKernelABIInfo(CodeGenModule , CGFunctionInfo ) {
-  DefaultABIInfo SPIRABI(CGM.getTypes());
+  SPIRABIInfo SPIRABI(CGM.getTypes());
   SPIRABI.computeInfo(FI);
 }
 }
@@ -10226,6 +10264,18 @@
   return llvm::CallingConv::SPIR_KERNEL;
 }
 
+void SPIRTargetCodeGenInfo::setCUDAKernelCallingConvention(
+const FunctionType *) const {
+  // Convert HIP kernels to SPIR-V kernels.
+  if (getABIInfo().getContext().getLangOpts().HIP &&
+  getABIInfo().getTarget().getTriple().isSPIRV()) {
+FT = getABIInfo().getContext().adjustFunctionType(
+FT, FT->getExtInfo().withCallingConv(CC_OpenCLKernel));
+return;
+  }
+  TargetCodeGenInfo::setCUDAKernelCallingConvention(FT);
+}
+
 static bool appendType(SmallStringEnc , QualType QType,
const CodeGen::CodeGenModule ,
TypeStringCache );
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[PATCH] D108621: [HIPSPV] Add CUDA->SPIR-V address space mapping

[Henry Linjamäki via Phabricator via cfe-commits]

linjamaki updated this revision to Diff 373497.
linjamaki edited the summary of this revision.
linjamaki added a comment.

Rebase.


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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/test/CodeGenHIP/hipspv-addr-spaces.cpp


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 
addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 
addrspace(4)*
+  return 
+}
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -56,9 +56,14 @@
 0, // opencl_generic
 0, // opencl_global_device
 0, // opencl_global_host
-0, // cuda_device
-0, // cuda_constant
-0, // cuda_shared
+// cuda_* address space mapping is intended for HIPSPV (HIP to SPIR-V
+// translation). This mapping is enabled when the language mode is HIP.
+1, // cuda_device
+// cuda_constant pointer can be casted to default/"flat" pointer, but in
+// SPIR-V casts between constant and generic pointers are not allowed. For
+// this reason cuda_constant is mapped to SPIR-V CrossWorkgroup.
+1, // cuda_constant
+3, // cuda_shared
 1, // sycl_global
 5, // sycl_global_device
 6, // sycl_global_host
@@ -219,6 +224,16 @@
   bool hasFeature(StringRef Feature) const override {
 return Feature == "spirv";
   }
+
+  void adjust(DiagnosticsEngine , LangOptions ) override {
+BaseSPIRTargetInfo::adjust(Diags, Opts);
+// Guarded so we don't override address space map setting set by
+// BaseSPIRTargetInfo::adjust.
+if (Opts.HIP && Opts.CUDAIsDevice)
+  // Enable address space mapping from HIP to SPIR-V.
+  // See comment on the SPIRDefIsGenMap table.
+  setAddressSpaceMap(/*DefaultIsGeneric=*/true);
+  }
 };
 
 class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public SPIRVTargetInfo {


Index: clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
===
--- /dev/null
+++ clang/test/CodeGenHIP/hipspv-addr-spaces.cpp
@@ -0,0 +1,46 @@
+// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \
+// RUN:   -o - %s | FileCheck %s
+
+#define __device__ __attribute__((device))
+#define __shared__ __attribute__((shared))
+#define __constant__ __attribute__((constant))
+
+// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* }
+
+// CHECK: @d ={{.*}} addrspace(1) externally_initialized global
+__device__ int d;
+
+// CHECK: @c ={{.*}} addrspace(1) externally_initialized global
+__constant__ int c;
+
+// CHECK: @s ={{.*}} addrspace(3) global
+__shared__ int s;
+
+// CHECK: @foo ={{.*}} addrspace(1) externally_initialized global %struct.foo_t
+__device__ struct foo_t {
+  int i;
+  int* pi;
+} foo;
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)*
+__device__ int* bar(int *x) {
+  return x;
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_dv()
+__device__ int* baz_d() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_cv()
+__device__ int* baz_c() {
+  // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 addrspace(4)*
+  return 
+}
+
+// CHECK: define{{.*}} spir_func i32 addrspace(4)* @_Z5baz_sv()
+__device__ int* baz_s() {
+  //