[clang] [clang][FMV] Allow declaration of function versions in namespaces. (PR #93044)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/93044 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang][FMV] Allow declaration of function versions in namespaces. (PR #93044)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/93044 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64] set AppleA14 architecture version to v8.4-a (PR #92600)
https://github.com/jroelofs approved this pull request. Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My mistake. https://github.com/llvm/llvm-project/pull/92600 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ // The base architecture for this processor.
+ Architecture64 Arch = arch;
+
+ // The set of extensions enabled by default for this processor.
+ list DefaultExts = default_extensions;
+}
+
// FeatureFuseAdrpAdd is enabled under Generic to allow linker merging
// optimizations.
def : ProcessorModel<"generic", CortexA510Model, ProcessorFeatures.Generic,
[FeatureFuseAES, FeatureFuseAdrpAdd,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize]>;
-def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a53", CortexA53Model, ProcessorFeatures.A53,
- [TuneA53]>;
-def : ProcessorModel<"cortex-a55", CortexA55Model, ProcessorFeatures.A55,
- [TuneA55]>;
-def : ProcessorModel<"cortex-a510", CortexA510Model, ProcessorFeatures.A510,
- [TuneA510]>;
-def : ProcessorModel<"cortex-a520", CortexA510Model, ProcessorFeatures.A520,
- [TuneA520]>;
-def : ProcessorModel<"cortex-a520ae", CortexA510Model,
ProcessorFeatures.A520AE,
- [TuneA520AE]>;
-def : ProcessorModel<"cortex-a57", CortexA57Model, ProcessorFeatures.A53,
- [TuneA57]>;
-def : ProcessorModel<"cortex-a65", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a65ae", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a72", CortexA57Model, ProcessorFeatures.A53,
- [TuneA72]>;
-def : ProcessorModel<"cortex-a73", CortexA57Model, ProcessorFeatures.A53,
- [TuneA73]>;
-def : ProcessorModel<"cortex-a75", CortexA57Model, ProcessorFeatures.A55,
- [TuneA75]>;
-def : ProcessorModel<"cortex-a76", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a76ae", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a77", CortexA57Model, ProcessorFeatures.A77,
- [TuneA77]>;
-def : ProcessorModel<"cortex-a78", CortexA57Model, ProcessorFeatures.A78,
- [TuneA78]>;
-def : ProcessorModel<"cortex-a78ae", CortexA57Model, ProcessorFeatures.A78AE,
- [TuneA78AE]>;
-def : ProcessorModel<"cortex-a78c", CortexA57Model, ProcessorFeatures.A78C,
- [TuneA78C]>;
-def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
- [TuneA710]>;
-def : ProcessorModel<"cortex-a715", NeoverseN2Model, ProcessorFeatures.A715,
- [TuneA715]>;
-def : ProcessorModel<"cortex-a720", NeoverseN2Model, ProcessorFeatures.A720,
- [TuneA720]>;
-def : ProcessorModel<"cortex-a720ae", NeoverseN2Model,
ProcessorFeatures.A720AE,
- [TuneA720AE]>;
-def : ProcessorModel<"cortex-r82", CortexA55Model, ProcessorFeatures.R82,
- [TuneR82]>;
-def : ProcessorModel<"cortex-r82ae", CortexA55Model, ProcessorFeatures.R82AE,
- [TuneR82AE]>;
-def : ProcessorModel<"cortex-x1", CortexA57Model, ProcessorFeatures.X1,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x1c", CortexA57Model, ProcessorFeatures.X1C,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x2", NeoverseN2Model, ProcessorFeatures.X2,
- [TuneX2]>;
-def : ProcessorModel<"cortex-x3", NeoverseN2Model, ProcessorFeatures.X3,
- [TuneX3]>;
-def : ProcessorModel<"cortex-x4", NeoverseN2Model, ProcessorFeatures.X4,
- [TuneX4]>;
-def : ProcessorModel<"neoverse-e1", CortexA53Model,
- ProcessorFeatures.NeoverseE1, [TuneNeoverseE1]>;
-def : ProcessorModel<"neoverse-n1", NeoverseN1Model,
- ProcessorFeatures.NeoverseN1, [TuneNeoverseN1]>;
-def : ProcessorModel<"neoverse-n2", NeoverseN2Model,
- ProcessorFeatures.NeoverseN2, [TuneNeoverseN2]>;
-def : ProcessorModel<"neoverse-n3", NeoverseN2Model,
- ProcessorFeatures.NeoverseN3, [TuneNeoverseN3]>;
-def : ProcessorModel<"neoverse-512tvb", NeoverseV1Model,
- ProcessorFeatures.Neoverse512TVB, [TuneNeoverse512TVB]>;
-def : ProcessorModel<"neoverse-v1", NeoverseV1Model,
- ProcessorFeatures.NeoverseV1, [TuneNeoverseV1]>;
-def : ProcessorModel<"neoverse-v2", NeoverseV2Model,
- ProcessorFeatures.NeoverseV2,
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ // The base architecture for this processor.
+ Architecture64 Arch = arch;
+
+ // The set of extensions enabled by default for this processor.
+ list DefaultExts = default_extensions;
+}
+
// FeatureFuseAdrpAdd is enabled under Generic to allow linker merging
// optimizations.
def : ProcessorModel<"generic", CortexA510Model, ProcessorFeatures.Generic,
[FeatureFuseAES, FeatureFuseAdrpAdd,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize]>;
-def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a53", CortexA53Model, ProcessorFeatures.A53,
- [TuneA53]>;
-def : ProcessorModel<"cortex-a55", CortexA55Model, ProcessorFeatures.A55,
- [TuneA55]>;
-def : ProcessorModel<"cortex-a510", CortexA510Model, ProcessorFeatures.A510,
- [TuneA510]>;
-def : ProcessorModel<"cortex-a520", CortexA510Model, ProcessorFeatures.A520,
- [TuneA520]>;
-def : ProcessorModel<"cortex-a520ae", CortexA510Model,
ProcessorFeatures.A520AE,
- [TuneA520AE]>;
-def : ProcessorModel<"cortex-a57", CortexA57Model, ProcessorFeatures.A53,
- [TuneA57]>;
-def : ProcessorModel<"cortex-a65", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a65ae", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a72", CortexA57Model, ProcessorFeatures.A53,
- [TuneA72]>;
-def : ProcessorModel<"cortex-a73", CortexA57Model, ProcessorFeatures.A53,
- [TuneA73]>;
-def : ProcessorModel<"cortex-a75", CortexA57Model, ProcessorFeatures.A55,
- [TuneA75]>;
-def : ProcessorModel<"cortex-a76", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a76ae", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a77", CortexA57Model, ProcessorFeatures.A77,
- [TuneA77]>;
-def : ProcessorModel<"cortex-a78", CortexA57Model, ProcessorFeatures.A78,
- [TuneA78]>;
-def : ProcessorModel<"cortex-a78ae", CortexA57Model, ProcessorFeatures.A78AE,
- [TuneA78AE]>;
-def : ProcessorModel<"cortex-a78c", CortexA57Model, ProcessorFeatures.A78C,
- [TuneA78C]>;
-def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
- [TuneA710]>;
-def : ProcessorModel<"cortex-a715", NeoverseN2Model, ProcessorFeatures.A715,
- [TuneA715]>;
-def : ProcessorModel<"cortex-a720", NeoverseN2Model, ProcessorFeatures.A720,
- [TuneA720]>;
-def : ProcessorModel<"cortex-a720ae", NeoverseN2Model,
ProcessorFeatures.A720AE,
- [TuneA720AE]>;
-def : ProcessorModel<"cortex-r82", CortexA55Model, ProcessorFeatures.R82,
- [TuneR82]>;
-def : ProcessorModel<"cortex-r82ae", CortexA55Model, ProcessorFeatures.R82AE,
- [TuneR82AE]>;
-def : ProcessorModel<"cortex-x1", CortexA57Model, ProcessorFeatures.X1,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x1c", CortexA57Model, ProcessorFeatures.X1C,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x2", NeoverseN2Model, ProcessorFeatures.X2,
- [TuneX2]>;
-def : ProcessorModel<"cortex-x3", NeoverseN2Model, ProcessorFeatures.X3,
- [TuneX3]>;
-def : ProcessorModel<"cortex-x4", NeoverseN2Model, ProcessorFeatures.X4,
- [TuneX4]>;
-def : ProcessorModel<"neoverse-e1", CortexA53Model,
- ProcessorFeatures.NeoverseE1, [TuneNeoverseE1]>;
-def : ProcessorModel<"neoverse-n1", NeoverseN1Model,
- ProcessorFeatures.NeoverseN1, [TuneNeoverseN1]>;
-def : ProcessorModel<"neoverse-n2", NeoverseN2Model,
- ProcessorFeatures.NeoverseN2, [TuneNeoverseN2]>;
-def : ProcessorModel<"neoverse-n3", NeoverseN2Model,
- ProcessorFeatures.NeoverseN3, [TuneNeoverseN3]>;
-def : ProcessorModel<"neoverse-512tvb", NeoverseV1Model,
- ProcessorFeatures.Neoverse512TVB, [TuneNeoverse512TVB]>;
-def : ProcessorModel<"neoverse-v1", NeoverseV1Model,
- ProcessorFeatures.NeoverseV1, [TuneNeoverseV1]>;
-def : ProcessorModel<"neoverse-v2", NeoverseV2Model,
- ProcessorFeatures.NeoverseV2,
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -812,178 +835,192 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef
+> : ProcessorModel {
+ // The base architecture for this processor.
+ Architecture64 Arch = arch;
+}
+
// FeatureFuseAdrpAdd is enabled under Generic to allow linker merging
// optimizations.
-def : ProcessorModel<"generic", CortexA510Model, ProcessorFeatures.Generic,
+def : AArch64Processor<"generic", HasV8_0aOps, CortexA510Model,
ProcessorFeatures.Generic,
[FeatureFuseAES, FeatureFuseAdrpAdd,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize]>;
-def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
+
+// Alias for the latest Apple processor model supported by LLVM.
+def : ProcessorModel<"apple-latest", CycloneModel, ProcessorFeatures.AppleA16,
+ [TuneAppleA16]>;
+
+def : AArch64Processor<"cortex-a34", HasV8_0aOps, CortexA53Model,
ProcessorFeatures.A53,
[TuneA35]>;
-def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
+def : AArch64Processor<"cortex-a35", HasV8_0aOps, CortexA53Model,
ProcessorFeatures.A53,
[TuneA35]>;
-def : ProcessorModel<"cortex-a53", CortexA53Model, ProcessorFeatures.A53,
+def : AArch64Processor<"cortex-a53", HasV8_0aOps, CortexA53Model,
ProcessorFeatures.A53,
[TuneA53]>;
-def : ProcessorModel<"cortex-a55", CortexA55Model, ProcessorFeatures.A55,
+def : AArch64Processor<"cortex-a55", HasV8_2aOps, CortexA55Model,
ProcessorFeatures.A55,
[TuneA55]>;
-def : ProcessorModel<"cortex-a510", CortexA510Model, ProcessorFeatures.A510,
+def : AArch64Processor<"cortex-a510", HasV9_0aOps, CortexA510Model,
ProcessorFeatures.A510,
[TuneA510]>;
-def : ProcessorModel<"cortex-a520", CortexA510Model, ProcessorFeatures.A520,
+def : AArch64Processor<"cortex-a520", HasV9_2aOps, CortexA510Model,
ProcessorFeatures.A520,
[TuneA520]>;
-def : ProcessorModel<"cortex-a520ae", CortexA510Model,
ProcessorFeatures.A520AE,
+def : AArch64Processor<"cortex-a520ae", HasV9_2aOps, CortexA510Model,
ProcessorFeatures.A520AE,
[TuneA520AE]>;
-def : ProcessorModel<"cortex-a57", CortexA57Model, ProcessorFeatures.A53,
+def : AArch64Processor<"cortex-a57", HasV8_0aOps, CortexA57Model,
ProcessorFeatures.A53,
[TuneA57]>;
-def : ProcessorModel<"cortex-a65", CortexA53Model, ProcessorFeatures.A65,
+def : AArch64Processor<"cortex-a65", HasV8_2aOps, CortexA53Model,
ProcessorFeatures.A65,
[TuneA65]>;
-def : ProcessorModel<"cortex-a65ae", CortexA53Model, ProcessorFeatures.A65,
+def : AArch64Processor<"cortex-a65ae", HasV8_2aOps, CortexA53Model,
ProcessorFeatures.A65,
[TuneA65]>;
-def : ProcessorModel<"cortex-a72", CortexA57Model, ProcessorFeatures.A53,
+def : AArch64Processor<"cortex-a72", HasV8_0aOps, CortexA57Model,
ProcessorFeatures.A53,
[TuneA72]>;
-def : ProcessorModel<"cortex-a73", CortexA57Model, ProcessorFeatures.A53,
+def : AArch64Processor<"cortex-a73", HasV8_0aOps, CortexA57Model,
ProcessorFeatures.A53,
[TuneA73]>;
-def : ProcessorModel<"cortex-a75", CortexA57Model, ProcessorFeatures.A55,
+def : AArch64Processor<"cortex-a75", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A55,
[TuneA75]>;
-def : ProcessorModel<"cortex-a76", CortexA57Model, ProcessorFeatures.A76,
+def : AArch64Processor<"cortex-a76", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A76,
[TuneA76]>;
-def : ProcessorModel<"cortex-a76ae", CortexA57Model, ProcessorFeatures.A76,
+def : AArch64Processor<"cortex-a76ae", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A76,
[TuneA76]>;
-def : ProcessorModel<"cortex-a77", CortexA57Model, ProcessorFeatures.A77,
+def : AArch64Processor<"cortex-a77", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A77,
[TuneA77]>;
-def : ProcessorModel<"cortex-a78", CortexA57Model, ProcessorFeatures.A78,
+def : AArch64Processor<"cortex-a78", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A78,
[TuneA78]>;
-def : ProcessorModel<"cortex-a78ae", CortexA57Model, ProcessorFeatures.A78AE,
+def : AArch64Processor<"cortex-a78ae", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A78AE,
[TuneA78AE]>;
-def : ProcessorModel<"cortex-a78c", CortexA57Model, ProcessorFeatures.A78C,
+def : AArch64Processor<"cortex-a78c", HasV8_2aOps, CortexA57Model,
ProcessorFeatures.A78C,
[TuneA78C]>;
-def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
+def : AArch64Processor<"cortex-a710", HasV9_0aOps, NeoverseN2Model,
ProcessorFeatures.A710,
[TuneA710]>;
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -618,187 +618,210 @@ def TuneAmpere1B : SubtargetFeature<"ampere1b",
"ARMProcFamily", "Ampere1B",
def ProcessorFeatures {
- list A53 = [HasV8_0aOps, FeatureCRC, FeatureCrypto,
+ list A53 = [HasV8_0aOps, FeatureCRC, FeatureSHA2,
FeatureAES,
FeatureFPARMv8, FeatureNEON, FeaturePerfMon];
- list A55 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A55 = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon];
list A510 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
FeatureMatMulInt8, FeatureBF16, FeatureAM,
FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
- FeatureFP16FML];
+ FeatureFP16FML,
+ FeatureSB, FeaturePAuth, FeatureSSBS,
FeatureSVE, FeatureSVE2];
list A520 = [HasV9_2aOps, FeaturePerfMon, FeatureAM,
FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
- FeatureFP16FML];
+ FeatureFP16FML,
+ FeatureSB, FeatureSSBS, FeaturePAuth,
FeatureFlagM, FeaturePredRes];
list A520AE = [HasV9_2aOps, FeaturePerfMon, FeatureAM,
FeatureMTE, FeatureETE, FeatureSVE2BitPerm,
- FeatureFP16FML];
- list A65 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ FeatureFP16FML,
+ FeatureSB, FeatureSSBS, FeaturePAuth,
FeatureFlagM, FeaturePredRes];
+ list A65 = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeatureSSBS, FeatureRAS,
FeaturePerfMon];
- list A76 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A76 = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeatureSSBS, FeaturePerfMon];
- list A77 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A77 = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon, FeatureSSBS];
- list A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A78 = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon, FeatureSPE,
FeatureSSBS];
- list A78AE = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A78AE = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureRCPC, FeaturePerfMon, FeatureSPE,
FeatureSSBS];
- list A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
+ list A78C = [HasV8_2aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeatureFullFP16, FeatureDotProd,
FeatureFlagM, FeaturePAuth,
FeaturePerfMon, FeatureRCPC, FeatureSPE,
FeatureSSBS];
list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon,
FeatureETE, FeatureMTE, FeatureFP16FML,
- FeatureSVE2BitPerm, FeatureBF16,
FeatureMatMulInt8];
+ FeatureSVE2BitPerm, FeatureBF16,
FeatureMatMulInt8,
+ FeaturePAuth, FeatureFlagM, FeatureSB,
FeatureSVE, FeatureSVE2];
list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE,
FeatureFP16FML, FeatureSVE, FeatureTRBE,
FeatureSVE2BitPerm, FeatureBF16, FeatureETE,
- FeaturePerfMon, FeatureMatMulInt8,
FeatureSPE];
+ FeaturePerfMon, FeatureMatMulInt8, FeatureSPE,
+ FeatureSB, FeatureSSBS, FeatureFullFP16,
FeaturePAuth, FeaturePredRes, FeatureFlagM];
list A720 = [HasV9_2aOps, FeatureMTE, FeatureFP16FML,
FeatureTRBE, FeatureSVE2BitPerm, FeatureETE,
- FeaturePerfMon, FeatureSPE, FeatureSPE_EEF];
+ FeaturePerfMon, FeatureSPE, FeatureSPE_EEF,
+ FeatureSB, FeatureSSBS, FeaturePAuth,
FeatureFlagM, FeaturePredRes];
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -812,178 +812,270 @@ def ProcessorFeatures {
list Generic = [FeatureFPARMv8, FeatureNEON, FeatureETE];
}
+class AArch64Processor<
+ string n,
+ Architecture64 arch,
+ SchedMachineModel m,
+ list f,
+ list tunef,
+ list default_extensions
+> : ProcessorModel {
+ // The base architecture for this processor.
+ Architecture64 Arch = arch;
+
+ // The set of extensions enabled by default for this processor.
+ list DefaultExts = default_extensions;
+}
+
// FeatureFuseAdrpAdd is enabled under Generic to allow linker merging
// optimizations.
def : ProcessorModel<"generic", CortexA510Model, ProcessorFeatures.Generic,
[FeatureFuseAES, FeatureFuseAdrpAdd,
FeaturePostRAScheduler,
FeatureEnableSelectOptimize]>;
-def : ProcessorModel<"cortex-a35", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a34", CortexA53Model, ProcessorFeatures.A53,
- [TuneA35]>;
-def : ProcessorModel<"cortex-a53", CortexA53Model, ProcessorFeatures.A53,
- [TuneA53]>;
-def : ProcessorModel<"cortex-a55", CortexA55Model, ProcessorFeatures.A55,
- [TuneA55]>;
-def : ProcessorModel<"cortex-a510", CortexA510Model, ProcessorFeatures.A510,
- [TuneA510]>;
-def : ProcessorModel<"cortex-a520", CortexA510Model, ProcessorFeatures.A520,
- [TuneA520]>;
-def : ProcessorModel<"cortex-a520ae", CortexA510Model,
ProcessorFeatures.A520AE,
- [TuneA520AE]>;
-def : ProcessorModel<"cortex-a57", CortexA57Model, ProcessorFeatures.A53,
- [TuneA57]>;
-def : ProcessorModel<"cortex-a65", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a65ae", CortexA53Model, ProcessorFeatures.A65,
- [TuneA65]>;
-def : ProcessorModel<"cortex-a72", CortexA57Model, ProcessorFeatures.A53,
- [TuneA72]>;
-def : ProcessorModel<"cortex-a73", CortexA57Model, ProcessorFeatures.A53,
- [TuneA73]>;
-def : ProcessorModel<"cortex-a75", CortexA57Model, ProcessorFeatures.A55,
- [TuneA75]>;
-def : ProcessorModel<"cortex-a76", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a76ae", CortexA57Model, ProcessorFeatures.A76,
- [TuneA76]>;
-def : ProcessorModel<"cortex-a77", CortexA57Model, ProcessorFeatures.A77,
- [TuneA77]>;
-def : ProcessorModel<"cortex-a78", CortexA57Model, ProcessorFeatures.A78,
- [TuneA78]>;
-def : ProcessorModel<"cortex-a78ae", CortexA57Model, ProcessorFeatures.A78AE,
- [TuneA78AE]>;
-def : ProcessorModel<"cortex-a78c", CortexA57Model, ProcessorFeatures.A78C,
- [TuneA78C]>;
-def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,
- [TuneA710]>;
-def : ProcessorModel<"cortex-a715", NeoverseN2Model, ProcessorFeatures.A715,
- [TuneA715]>;
-def : ProcessorModel<"cortex-a720", NeoverseN2Model, ProcessorFeatures.A720,
- [TuneA720]>;
-def : ProcessorModel<"cortex-a720ae", NeoverseN2Model,
ProcessorFeatures.A720AE,
- [TuneA720AE]>;
-def : ProcessorModel<"cortex-r82", CortexA55Model, ProcessorFeatures.R82,
- [TuneR82]>;
-def : ProcessorModel<"cortex-r82ae", CortexA55Model, ProcessorFeatures.R82AE,
- [TuneR82AE]>;
-def : ProcessorModel<"cortex-x1", CortexA57Model, ProcessorFeatures.X1,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x1c", CortexA57Model, ProcessorFeatures.X1C,
- [TuneX1]>;
-def : ProcessorModel<"cortex-x2", NeoverseN2Model, ProcessorFeatures.X2,
- [TuneX2]>;
-def : ProcessorModel<"cortex-x3", NeoverseN2Model, ProcessorFeatures.X3,
- [TuneX3]>;
-def : ProcessorModel<"cortex-x4", NeoverseN2Model, ProcessorFeatures.X4,
- [TuneX4]>;
-def : ProcessorModel<"neoverse-e1", CortexA53Model,
- ProcessorFeatures.NeoverseE1, [TuneNeoverseE1]>;
-def : ProcessorModel<"neoverse-n1", NeoverseN1Model,
- ProcessorFeatures.NeoverseN1, [TuneNeoverseN1]>;
-def : ProcessorModel<"neoverse-n2", NeoverseN2Model,
- ProcessorFeatures.NeoverseN2, [TuneNeoverseN2]>;
-def : ProcessorModel<"neoverse-n3", NeoverseN2Model,
- ProcessorFeatures.NeoverseN3, [TuneNeoverseN3]>;
-def : ProcessorModel<"neoverse-512tvb", NeoverseV1Model,
- ProcessorFeatures.Neoverse512TVB, [TuneNeoverse512TVB]>;
-def : ProcessorModel<"neoverse-v1", NeoverseV1Model,
- ProcessorFeatures.NeoverseV1, [TuneNeoverseV1]>;
-def : ProcessorModel<"neoverse-v2", NeoverseV2Model,
- ProcessorFeatures.NeoverseV2,
[clang] [llvm] [AArch64][TargetParser] move CPUInfo into tablegen [NFC] (PR #92145)
@@ -108,6 +111,101 @@ static void EmitARMTargetDef(RecordKeeper ,
raw_ostream ) {
<< "#undef EMIT_EXTENSIONS\n"
<< "#endif // EMIT_EXTENSIONS\n"
<< "\n";
+
+ // Emit architecture information
+ OS << "#ifdef EMIT_ARCHITECTURES\n";
+
+ // Return the C++ name of the of an ArchInfo object
+ auto ArchInfoName = [](int Major, int Minor, StringRef Profile) {
+return Minor == 0 ? "ARMV" + std::to_string(Major) + Profile.upper()
+ : "ARMV" + std::to_string(Major) + "_" +
+std::to_string(Minor) + Profile.upper();
+ };
jroelofs wrote:
oh, I see why now. anyway, thanks!
https://github.com/llvm/llvm-project/pull/92145
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[clang] [lldb] [llvm] [AArch64] move extension information into tablgen (PR #90987)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/90987 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [AArch64] add some more tests for FMV (PR #91490)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/91490 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [AArch64] add some more tests for FMV (PR #91490)
@@ -0,0 +1,25 @@ +// Test which driver flags enable/disable Function Multiversioning on aarch64. + +// FMV is enabled for non-android aarch64 targets: +// RUN: %clang --target=aarch64 --rtlib=compiler-rt -### -c %s 2>&1 | FileCheck -check-prefix=FMV-ENABLED %s +// RUN: %clang --target=aarch64-linux-gnu --rtlib=compiler-rt -### -c %s 2>&1 | FileCheck -check-prefix=FMV-ENABLED %s jroelofs wrote: Mind adding two more for: `arm64-apple-ios` / `arm64-apple-macosx`? https://github.com/llvm/llvm-project/pull/91490 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [AArch64] add some more tests for FMV (PR #91490)
@@ -0,0 +1,381 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-attributes --check-globals all --filter "define|attributes"
--include-generated-funcs --version 4
+
+// Test/document all of the dependencies between possible AArch64 FMV
extensions.
+// Also test the name mangling.
+
+// RUN: %clang --target=aarch64-linux-gnu --rtlib=compiler-rt -emit-llvm -S -o
- %s | FileCheck %s
+
+
+int __attribute__((target_version("aes"))) fmv(void) { return 0; }
jroelofs wrote:
nit: I haven't mentioned this before, but I find `
() { }` to be a really confusing order for these.
Why not: ` () { }` ?
https://github.com/llvm/llvm-project/pull/91490
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[clang] [AArch64] add some more tests for FMV (PR #91490)
@@ -0,0 +1,381 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-attributes --check-globals all --filter "define|attributes"
--include-generated-funcs --version 4
+
+// Test/document all of the dependencies between possible AArch64 FMV
extensions.
+// Also test the name mangling.
+
+// RUN: %clang --target=aarch64-linux-gnu --rtlib=compiler-rt -emit-llvm -S -o
- %s | FileCheck %s
+
+
+int __attribute__((target_version("aes"))) fmv(void) { return 0; }
+int __attribute__((target_version("bf16"))) fmv(void) { return 0; }
+int __attribute__((target_version("bti"))) fmv(void) { return 0; }
+int __attribute__((target_version("crc"))) fmv(void) { return 0; }
+int __attribute__((target_version("dgh"))) fmv(void) { return 0; }
+int __attribute__((target_version("dit"))) fmv(void) { return 0; }
+int __attribute__((target_version("dotprod"))) fmv(void) { return 0; }
+int __attribute__((target_version("dpb"))) fmv(void) { return 0; }
+int __attribute__((target_version("dpb2"))) fmv(void) { return 0; }
+int __attribute__((target_version("ebf16"))) fmv(void) { return 0; }
+int __attribute__((target_version("f32mm"))) fmv(void) { return 0; }
+int __attribute__((target_version("f64mm"))) fmv(void) { return 0; }
+int __attribute__((target_version("fcma"))) fmv(void) { return 0; }
+int __attribute__((target_version("flagm"))) fmv(void) { return 0; }
+int __attribute__((target_version("flagm2"))) fmv(void) { return 0; }
+int __attribute__((target_version("fp"))) fmv(void) { return 0; }
+int __attribute__((target_version("fp16"))) fmv(void) { return 0; }
+int __attribute__((target_version("fp16fml"))) fmv(void) { return 0; }
+int __attribute__((target_version("frintts"))) fmv(void) { return 0; }
+int __attribute__((target_version("i8mm"))) fmv(void) { return 0; }
+int __attribute__((target_version("jscvt"))) fmv(void) { return 0; }
+int __attribute__((target_version("ls64"))) fmv(void) { return 0; }
+int __attribute__((target_version("ls64_accdata"))) fmv(void) { return 0; }
+int __attribute__((target_version("ls64_v"))) fmv(void) { return 0; }
+int __attribute__((target_version("lse"))) fmv(void) { return 0; }
+int __attribute__((target_version("memtag"))) fmv(void) { return 0; }
+int __attribute__((target_version("memtag2"))) fmv(void) { return 0; }
+int __attribute__((target_version("memtag3"))) fmv(void) { return 0; }
+int __attribute__((target_version("mops"))) fmv(void) { return 0; }
+int __attribute__((target_version("pmull"))) fmv(void) { return 0; }
+int __attribute__((target_version("predres"))) fmv(void) { return 0; }
+int __attribute__((target_version("rcpc"))) fmv(void) { return 0; }
+int __attribute__((target_version("rcpc2"))) fmv(void) { return 0; }
+int __attribute__((target_version("rcpc3"))) fmv(void) { return 0; }
+int __attribute__((target_version("rdm"))) fmv(void) { return 0; }
+int __attribute__((target_version("rng"))) fmv(void) { return 0; }
+int __attribute__((target_version("rpres"))) fmv(void) { return 0; }
+int __attribute__((target_version("sb"))) fmv(void) { return 0; }
+int __attribute__((target_version("sha1"))) fmv(void) { return 0; }
+int __attribute__((target_version("sha2"))) fmv(void) { return 0; }
+int __attribute__((target_version("sha3"))) fmv(void) { return 0; }
+int __attribute__((target_version("simd"))) fmv(void) { return 0; }
+int __attribute__((target_version("sm4"))) fmv(void) { return 0; }
+int __attribute__((target_version("sme"))) fmv(void) { return 0; }
+int __attribute__((target_version("sme-f64f64"))) fmv(void) { return 0; }
+int __attribute__((target_version("sme-i16i64"))) fmv(void) { return 0; }
+int __attribute__((target_version("sme2"))) fmv(void) { return 0; }
+int __attribute__((target_version("ssbs"))) fmv(void) { return 0; }
+int __attribute__((target_version("ssbs2"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve-bf16"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve-ebf16"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve-i8mm"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2-aes"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2-bitperm"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2-pmull128"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2-sha3"))) fmv(void) { return 0; }
+int __attribute__((target_version("sve2-sm4"))) fmv(void) { return 0; }
+int __attribute__((target_version("wfxt"))) fmv(void) { return 0; }
+
+int __attribute__((target_version("default"))) fmv(void);
jroelofs wrote:
It would be worthwhile to add one more for a name that's unknown, which the
ACLE specifically calls out behavior for: the compiler is to ignore ones that
it doesn't yet know about.
[clang] Use cmake to find perl executable (PR #91275)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/91275 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Use cmake to find perl executable (PR #91275)
@@ -1,4 +1,4 @@ -REQUIRES: shell +REQUIRES: perl jroelofs wrote: (the rest of them seem fine though) https://github.com/llvm/llvm-project/pull/91275 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Use cmake to find perl executable (PR #91275)
@@ -1,4 +1,4 @@ -REQUIRES: shell +REQUIRES: perl jroelofs wrote: should be: ``` REQUIRES: perl, shell ``` right? https://github.com/llvm/llvm-project/pull/91275 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV][AArch64] Don't optimize backward compatible features in resolver. (PR #90928)
jroelofs wrote: I am mildly opposed to this on principle: we should be able to optimize for any feature present in the supplied `-mcpu=`, and accommodating features like this that have a "graceful" fallback sets a bad precedent. If someone wants to run code on a machine, they should set mcpu/march/whatever to the minimal spec and use FMV to opt-in to additional features. This patch bends that rule, and makes FMV an opt-out mechanism, but only for these specific features. https://github.com/llvm/llvm-project/pull/90928 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] Reland "[FMV] Remove useless features according the latest ACLE spec." (PR #89232)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/89232 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [FMV] Rectify incomplete ExtensionInfo entries in TargetParser. (PR #89106)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/89106 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [llvm] [FMV] Remove useless features according the latest ACLE spec. (PR #88965)
@@ -67,57 +67,42 @@ enum CPUFeatures {
FEAT_FP,
FEAT_SIMD,
FEAT_CRC,
- FEAT_SHA1,
FEAT_SHA2,
FEAT_SHA3,
FEAT_AES,
- FEAT_PMULL,
FEAT_FP16,
- FEAT_DIT,
FEAT_DPB,
FEAT_DPB2,
FEAT_JSCVT,
FEAT_FCMA,
FEAT_RCPC,
FEAT_RCPC2,
FEAT_FRINTTS,
- FEAT_DGH,
FEAT_I8MM,
FEAT_BF16,
- FEAT_EBF16,
FEAT_RPRES,
FEAT_SVE,
- FEAT_SVE_BF16,
- FEAT_SVE_EBF16,
- FEAT_SVE_I8MM,
FEAT_SVE_F32MM,
FEAT_SVE_F64MM,
FEAT_SVE2,
FEAT_SVE_AES,
- FEAT_SVE_PMULL128,
FEAT_SVE_BITPERM,
FEAT_SVE_SHA3,
FEAT_SVE_SM4,
FEAT_SME,
FEAT_MEMTAG,
- FEAT_MEMTAG2,
- FEAT_MEMTAG3,
FEAT_SB,
FEAT_PREDRES,
FEAT_SSBS,
- FEAT_SSBS2,
- FEAT_BTI,
FEAT_LS64,
- FEAT_LS64_V,
- FEAT_LS64_ACCDATA,
FEAT_WFXT,
FEAT_SME_F64,
FEAT_SME_I64,
FEAT_SME2,
FEAT_RCPC3,
FEAT_MOPS,
FEAT_MAX,
- FEAT_EXT = 62, // Reserved to indicate presence of additional features field
jroelofs wrote:
Did any implementation ship `__aarch64_cpu_features` in a way that would make
this an ABI break? We (Apple) talked about putting these in libSystem, and now
I am glad we did not. It's okay to change/reorder them if it is a private
implementation detail between the compiler and compiler-rt that is shipped with
it, but as soon as they're part of an ABI, this list must become append only.
https://github.com/llvm/llvm-project/pull/88965
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[clang] [compiler-rt] [llvm] [FMV] Remove useless features according the latest ACLE spec. (PR #88965)
jroelofs wrote: Mind listing which ones are affected in the commit summary? https://github.com/llvm/llvm-project/pull/88965 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang][FMV] Pass the '+fmv' target-feature when FMV is enabled. (PR #87942)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/87942 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [driver] Make --version show if assertions, etc. are enabled (PR #87585)
@@ -2734,6 +2734,40 @@ void cl::PrintHelpMessage(bool Hidden, bool Categorized)
{
CommonOptions->CategorizedHiddenPrinter.printHelp();
}
+ArrayRef cl::CompilerBuildConfig = {
+#if LLVM_IS_DEBUG_BUILD
+"+unoptimized",
+#endif
+#ifndef NDEBUG
+"+assertions",
+#endif
+#ifdef EXPENSIVE_CHECKS
+"+expensive-checks",
+#endif
+#if __has_feature(address_sanitizer)
+"+asan",
+#endif
+#if __has_feature(undefined_behavior_sanitizer)
+"+ubsan",
+#endif
+#if __has_feature(memory_sanitizer)
+"+msan",
+#endif
+#if __has_feature(dataflow_sanitizer)
+"+dfsan",
+#endif
+};
+
+// Utility function for printing the build config.
+void cl::printBuildConfig(raw_ostream ) {
+#if LLVM_VERSION_PRINTER_SHOW_BUILD_CONFIG
+ OS << "Build config: ";
+ llvm::interleaveComma(cl::CompilerBuildConfig, OS,
+[](const StringRef ) { OS << Option; });
jroelofs wrote:
```suggestion
llvm::interleaveComma(cl::CompilerBuildConfig, OS);
```
https://github.com/llvm/llvm-project/pull/87585
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[clang] [llvm] [driver] Make --version show if assertions, etc. are enabled (PR #87585)
@@ -0,0 +1,6 @@
+# REQUIRES: asserts
+# RUN: %clang --version 2>&1 | FileCheck %s
+
+# CHECK: clang version
+# When assertions are enabled, we should have a build configuration line that
reflects that
+# CHECK: Build configuration: {{.*}}+assertions
jroelofs wrote:
```suggestion
# CHECK: Build config: {{.*}}+assertions
```
https://github.com/llvm/llvm-project/pull/87585
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[clang] [lldb] [llvm] [cmake] Build executables with -no_exported_symbols when building Apple toolchain (PR #87684)
@@ -673,6 +673,9 @@ option(LLVM_USE_OPROFILE option(LLVM_EXTERNALIZE_DEBUGINFO "Generate dSYM files and strip executables and libraries (Darwin Only)" OFF) +option(LLVM_ENABLE_NO_EXPORTED_SYMBOLS jroelofs wrote: Flags like this shouldn't have `DISABLE` in their name either. It's ambiguous/confusing whether `LLVM_DISABLE_THING=On` means THING=ON or THING=Off. https://github.com/llvm/llvm-project/pull/87684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [driver] Make --version show if assertions, etc. are enabled (PR #87585)
jroelofs wrote: > The result of those refactors I now have a new build option to support hiding > the version, should I be touching the `utils/bazel` with this patch? cc @nico https://github.com/llvm/llvm-project/pull/87585 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [lldb] [llvm] [cmake] Build executables with -no_exported_symbols when building Apple toolchain (PR #87684)
@@ -673,6 +673,9 @@ option(LLVM_USE_OPROFILE option(LLVM_EXTERNALIZE_DEBUGINFO "Generate dSYM files and strip executables and libraries (Darwin Only)" OFF) +option(LLVM_ENABLE_NO_EXPORTED_SYMBOLS jroelofs wrote: The double negative is confusing. Maybe invert it, and make the name `LLVM_ENABLE_EXPORTED_SYMBOLS`? https://github.com/llvm/llvm-project/pull/87684 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Sema] Mark alias/ifunc targets used and consider mangled names (PR #87130)
@@ -1980,6 +1981,23 @@ static void handleWeakRefAttr(Sema , Decl *D, const
ParsedAttr ) {
D->addAttr(::new (S.Context) WeakRefAttr(S.Context, AL));
}
+// Mark alias/ifunc target as used. For C++, we look up the demangled name
+// ignoring parameters. This should handle the majority of use cases while
+// leaveing false positives for namespace scope names and false negatives in
+// the presence of overloads.
+static void markUsedForAliasOrIfunc(Sema , Decl *D, const ParsedAttr ,
+StringRef Str) {
+ char *Demangled = llvm::itaniumDemangle(Str, /*ParseParams=*/false);
jroelofs wrote:
> I think ifunc is ELF/Itanium only
Darwin too, now. For both the frontend attribute, and the IR construct.
https://github.com/llvm/llvm-project/pull/87130
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[clang] [clang][FMV] Direct-call FMV callees from FMV callers (PR #80093)
jroelofs wrote: I'm not sure llvm needs to know the priorities. I haven't had time to work on this, but my plan was to have something that attempts to step through the resolver instruction by instruction with known bits for the value loaded from `__aarch64_cpu_features.features` according to the caller's target features. If the return value is known, then we can fold away the resolver for that call site. If we encounter a loop, a call, or some other pattern we don't understand, then bail & leave that call site alone. https://github.com/llvm/llvm-project/pull/80093 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] clang: __builtin_VARIABLE_NAME (PR #86756)
@@ -2305,6 +2308,36 @@ APValue SourceLocExpr::EvaluateInContext(const
ASTContext ,
};
switch (getIdentKind()) {
+ case SourceLocIdentKind::VariableName: {
+// __builtin_VARIABLE_NAME() is a Clang-specific extension that expands to
+// the name of the variable being defined in a CXXDefaultArgExpr.
+
+// FIXME: The AST doesn't have upward edges, so we can't easily traverse up
+// from the CXXDefaultArgExpr to find it. Unfortunately, this means we
need
+// to do a linear scan of (up to) the entire FunctionDecl.
+struct FindVarDecl : public RecursiveASTVisitor {
+ const Expr *ToFind;
+ const VarDecl *Found = nullptr;
+ bool TraverseVarDecl(VarDecl *D) {
+if (const auto *CE = dyn_cast_or_null(D->getInit()))
{
jroelofs wrote:
Need to strip casts, conversions, parens, etc.
https://github.com/llvm/llvm-project/pull/86756
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[clang] clang: __builtin_VARIABLE_NAME (PR #86756)
jroelofs wrote: Here's an example of the awkward lengths Halide has to go through to do this without compiler support: https://github.com/halide/Halide/blob/a132246ced07adc59c7b3631009464e5a14e0abb/src/Introspection.h#L19-L23 https://github.com/llvm/llvm-project/pull/86756 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] clang: __builtin_VARIABLE_NAME (PR #86756)
@@ -2305,6 +2308,36 @@ APValue SourceLocExpr::EvaluateInContext(const
ASTContext ,
};
switch (getIdentKind()) {
+ case SourceLocIdentKind::VariableName: {
+// __builtin_VARIABLE_NAME() is a Clang-specific extension that expands to
+// the name of the variable being defined in a CXXDefaultArgExpr.
+
+// FIXME: The AST doesn't have upward edges, so we can't easily traverse up
+// from the CXXDefaultArgExpr to find it. Unfortunately, this means we
need
+// to do a linear scan of (up to) the entire FunctionDecl.
jroelofs wrote:
I could use some help here. Using the visitor to walk back up the AST feels
wrong / slow.
https://github.com/llvm/llvm-project/pull/86756
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[clang] clang: __builtin_VARIABLE_NAME (PR #86756)
https://github.com/jroelofs created
https://github.com/llvm/llvm-project/pull/86756
Some C++ Embedded DSLs make use of `std::source_location` as a form of crude
reflection. Until now, they didn't have a great way to reflect variable names
into their IRs. With `__buitlin_SOURCE_LOCATION()`, that is as simple as
adding a default argument expression to a constructor:
```
struct Variable {
const char *Name;
Variable(const char *Name = __builtin_SOURCE_LOCATION()) : Name(Name) {}
};
Variable foo;
// foo.Name == "foo"
```
>From dc4a313b793b4215c8a68bea0b4b8e70f8a7806b Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Tue, 26 Mar 2024 16:54:12 -0700
Subject: [PATCH] clang: __builtin_VARIABLE_NAME
Some C++ Embedded DSLs make use of std::source_location as a form of crude
reflection. Until now, they didn't have a great way to reflect variable names
into their IRs. With __buitlin_SOURCE_LOCATION(), that is as simple as adding
a default argument expression to a constructor.
struct Variable {
const char *Name;
Variable(const char *Name = __builtin_SOURCE_LOCATION()) : Name(Name) {}
};
Variable foo;
// foo.Name == "foo"
---
clang/include/clang/AST/Expr.h | 7 ++-
clang/include/clang/Basic/TokenKinds.def | 1 +
clang/lib/AST/Expr.cpp | 33 +++
clang/lib/Parse/ParseExpr.cpp| 6 ++
clang/lib/Sema/SemaExpr.cpp | 1 +
clang/test/CodeGenCXX/variable-name.cpp | 75
clang/test/SemaCXX/source_location.cpp | 39
7 files changed, 160 insertions(+), 2 deletions(-)
create mode 100644 clang/test/CodeGenCXX/variable-name.cpp
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index 6e153ebe024b42..1d0e741ddc983b 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -4725,12 +4725,13 @@ enum class SourceLocIdentKind {
FileName,
Line,
Column,
- SourceLocStruct
+ SourceLocStruct,
+ VariableName,
};
/// Represents a function call to one of __builtin_LINE(), __builtin_COLUMN(),
/// __builtin_FUNCTION(), __builtin_FUNCSIG(), __builtin_FILE(),
-/// __builtin_FILE_NAME() or __builtin_source_location().
+/// __builtin_FILE_NAME(), __builtin_source_location() or
__builtin_VARIABLE_NAME().
class SourceLocExpr final : public Expr {
SourceLocation BuiltinLoc, RParenLoc;
DeclContext *ParentContext;
@@ -4762,6 +4763,7 @@ class SourceLocExpr final : public Expr {
case SourceLocIdentKind::Function:
case SourceLocIdentKind::FuncSig:
case SourceLocIdentKind::SourceLocStruct:
+case SourceLocIdentKind::VariableName:
return false;
case SourceLocIdentKind::Line:
case SourceLocIdentKind::Column:
@@ -4796,6 +4798,7 @@ class SourceLocExpr final : public Expr {
case SourceLocIdentKind::Function:
case SourceLocIdentKind::FuncSig:
case SourceLocIdentKind::SourceLocStruct:
+case SourceLocIdentKind::VariableName:
return true;
default:
return false;
diff --git a/clang/include/clang/Basic/TokenKinds.def
b/clang/include/clang/Basic/TokenKinds.def
index 3a96f8a4d22bd1..23e617e1640886 100644
--- a/clang/include/clang/Basic/TokenKinds.def
+++ b/clang/include/clang/Basic/TokenKinds.def
@@ -448,6 +448,7 @@ KEYWORD(__builtin_FUNCSIG , KEYMS)
KEYWORD(__builtin_LINE , KEYALL)
KEYWORD(__builtin_COLUMN, KEYALL)
KEYWORD(__builtin_source_location , KEYCXX)
+KEYWORD(__builtin_VARIABLE_NAME , KEYCXX)
// __builtin_types_compatible_p is a GNU C extension that we handle like a C++
// type trait.
diff --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp
index 6221ebd5c9b4e9..96954df5a9817b 100644
--- a/clang/lib/AST/Expr.cpp
+++ b/clang/lib/AST/Expr.cpp
@@ -24,6 +24,7 @@
#include "clang/AST/IgnoreExpr.h"
#include "clang/AST/Mangle.h"
#include "clang/AST/RecordLayout.h"
+#include "clang/AST/RecursiveASTVisitor.h"
#include "clang/AST/StmtVisitor.h"
#include "clang/Basic/Builtins.h"
#include "clang/Basic/CharInfo.h"
@@ -2262,6 +2263,8 @@ StringRef SourceLocExpr::getBuiltinStr() const {
return "__builtin_FILE";
case SourceLocIdentKind::FileName:
return "__builtin_FILE_NAME";
+ case SourceLocIdentKind::VariableName:
+return "__builtin_VARIABLE_NAME";
case SourceLocIdentKind::Function:
return "__builtin_FUNCTION";
case SourceLocIdentKind::FuncSig:
@@ -2305,6 +2308,36 @@ APValue SourceLocExpr::EvaluateInContext(const
ASTContext ,
};
switch (getIdentKind()) {
+ case SourceLocIdentKind::VariableName: {
+// __builtin_VARIABLE_NAME() is a Clang-specific extension that expands to
+// the name of the variable being defined in a CXXDefaultArgExpr.
+
+// FIXME: The AST doesn't have upward edges, so we can't easily traverse up
+// from the CXXDefaultArgExpr to find it. Unfortunately, this means we
need
+// to do a linear scan of (up to) the entire FunctionDecl.
+struct FindVarDecl : public
[clang] [FMV] Allow mixing target_version with target_clones. (PR #86493)
https://github.com/jroelofs approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/86493 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Allow mixing target_version with target_clones. (PR #86493)
https://github.com/jroelofs edited https://github.com/llvm/llvm-project/pull/86493 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Allow mixing target_version with target_clones. (PR #86493)
@@ -0,0 +1,278 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -v9.5a -S
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fmv -S
-emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV
+
+// The following is guarded because in NOFMV we get an error for redefining
the default.
+#ifdef __HAVE_FUNCTION_MULTI_VERSIONING
+int explicit_default(void) { return 0; }
+__attribute__((target_version("jscvt"))) int explicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int explicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int explicit_default(void) { return 3;
}
+
+int foo(void) { return explicit_default(); }
+#endif
+
+__attribute__((target_version("jscvt"))) int implicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int implicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int implicit_default(void) { return 3;
}
+
+int bar(void) { return implicit_default(); }
+
+// These shouldn't generate anything.
+int unused_version_declarations(void);
+__attribute__((target_clones("dotprod", "lse"))) int
unused_version_declarations(void);
+__attribute__((target_version("jscvt"))) int unused_version_declarations(void);
+
+// These should generate the default (mangled) version and the resolver.
+int default_def_with_version_decls(void) { return 0; }
+__attribute__((target_clones("dotprod", "lse"))) int
default_def_with_version_decls(void);
+__attribute__((target_version("jscvt"))) int
default_def_with_version_decls(void);
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @explicit_default.ifunc = weak_odr alias i32 (), ptr
@explicit_default
+// CHECK: @implicit_default.ifunc = weak_odr alias i32 (), ptr
@implicit_default
+// CHECK: @default_def_with_version_decls.ifunc = weak_odr alias i32 (), ptr
@default_def_with_version_decls
+// CHECK: @explicit_default = weak_odr ifunc i32 (), ptr
@explicit_default.resolver
+// CHECK: @implicit_default = weak_odr ifunc i32 (), ptr
@implicit_default.resolver
+// CHECK: @default_def_with_version_decls = weak_odr ifunc i32 (), ptr
@default_def_with_version_decls.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.default
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 0
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mjscvt
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mdotprod
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mlse
+// CHECK-SAME: () #[[ATTR3:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.resolver() comdat {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 1048576
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1048576
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @explicit_default._Mjscvt
+// CHECK: resolver_else:
+// CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 64
+// CHECK-NEXT:[[TMP6:%.*]] = icmp eq i64 [[TMP5]], 64
+// CHECK-NEXT:[[TMP7:%.*]] = and i1 true, [[TMP6]]
+// CHECK-NEXT:br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label
[[RESOLVER_ELSE2:%.*]]
+// CHECK: resolver_return1:
+// CHECK-NEXT:ret ptr @explicit_default._Mrdm
+// CHECK: resolver_else2:
+// CHECK-NEXT:[[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP9:%.*]] = and i64 [[TMP8]], 16
+// CHECK-NEXT:[[TMP10:%.*]] = icmp eq i64 [[TMP9]], 16
+// CHECK-NEXT:[[TMP11:%.*]] = and i1 true, [[TMP10]]
+// CHECK-NEXT:br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label
[[RESOLVER_ELSE4:%.*]]
+// CHECK: resolver_return3:
+// CHECK-NEXT:ret ptr @explicit_default._Mdotprod
+// CHECK: resolver_else4:
+// CHECK-NEXT:[[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align
8
+// CHECK-NEXT:
[clang] [FMV] Allow mixing target_version with target_clones. (PR #86493)
@@ -0,0 +1,278 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -v9.5a -S
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fmv -S
-emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV
+
+// The following is guarded because in NOFMV we get an error for redefining
the default.
+#ifdef __HAVE_FUNCTION_MULTI_VERSIONING
+int explicit_default(void) { return 0; }
+__attribute__((target_version("jscvt"))) int explicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int explicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int explicit_default(void) { return 3;
}
+
+int foo(void) { return explicit_default(); }
+#endif
+
+__attribute__((target_version("jscvt"))) int implicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int implicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int implicit_default(void) { return 3;
}
+
+int bar(void) { return implicit_default(); }
+
+// These shouldn't generate anything.
+int unused_version_declarations(void);
+__attribute__((target_clones("dotprod", "lse"))) int
unused_version_declarations(void);
+__attribute__((target_version("jscvt"))) int unused_version_declarations(void);
+
+// These should generate the default (mangled) version and the resolver.
+int default_def_with_version_decls(void) { return 0; }
+__attribute__((target_clones("dotprod", "lse"))) int
default_def_with_version_decls(void);
+__attribute__((target_version("jscvt"))) int
default_def_with_version_decls(void);
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @explicit_default.ifunc = weak_odr alias i32 (), ptr
@explicit_default
+// CHECK: @implicit_default.ifunc = weak_odr alias i32 (), ptr
@implicit_default
+// CHECK: @default_def_with_version_decls.ifunc = weak_odr alias i32 (), ptr
@default_def_with_version_decls
+// CHECK: @explicit_default = weak_odr ifunc i32 (), ptr
@explicit_default.resolver
+// CHECK: @implicit_default = weak_odr ifunc i32 (), ptr
@implicit_default.resolver
+// CHECK: @default_def_with_version_decls = weak_odr ifunc i32 (), ptr
@default_def_with_version_decls.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.default
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 0
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mjscvt
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mdotprod
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mlse
+// CHECK-SAME: () #[[ATTR3:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.resolver() comdat {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 1048576
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1048576
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @explicit_default._Mjscvt
+// CHECK: resolver_else:
+// CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 64
+// CHECK-NEXT:[[TMP6:%.*]] = icmp eq i64 [[TMP5]], 64
+// CHECK-NEXT:[[TMP7:%.*]] = and i1 true, [[TMP6]]
+// CHECK-NEXT:br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label
[[RESOLVER_ELSE2:%.*]]
+// CHECK: resolver_return1:
+// CHECK-NEXT:ret ptr @explicit_default._Mrdm
+// CHECK: resolver_else2:
+// CHECK-NEXT:[[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP9:%.*]] = and i64 [[TMP8]], 16
+// CHECK-NEXT:[[TMP10:%.*]] = icmp eq i64 [[TMP9]], 16
+// CHECK-NEXT:[[TMP11:%.*]] = and i1 true, [[TMP10]]
+// CHECK-NEXT:br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label
[[RESOLVER_ELSE4:%.*]]
+// CHECK: resolver_return3:
+// CHECK-NEXT:ret ptr @explicit_default._Mdotprod
+// CHECK: resolver_else4:
+// CHECK-NEXT:[[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align
8
+// CHECK-NEXT:
[clang] [FMV] Allow mixing target_version with target_clones. (PR #86493)
@@ -0,0 +1,278 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -v9.5a -S
-emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature -fmv -S
-emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK-NOFMV
+
+// The following is guarded because in NOFMV we get an error for redefining
the default.
+#ifdef __HAVE_FUNCTION_MULTI_VERSIONING
+int explicit_default(void) { return 0; }
+__attribute__((target_version("jscvt"))) int explicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int explicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int explicit_default(void) { return 3;
}
+
+int foo(void) { return explicit_default(); }
+#endif
+
+__attribute__((target_version("jscvt"))) int implicit_default(void) { return
1; }
+__attribute__((target_clones("dotprod", "lse"))) int implicit_default(void) {
return 2; }
+__attribute__((target_version("rdma"))) int implicit_default(void) { return 3;
}
+
+int bar(void) { return implicit_default(); }
+
+// These shouldn't generate anything.
+int unused_version_declarations(void);
+__attribute__((target_clones("dotprod", "lse"))) int
unused_version_declarations(void);
+__attribute__((target_version("jscvt"))) int unused_version_declarations(void);
+
+// These should generate the default (mangled) version and the resolver.
+int default_def_with_version_decls(void) { return 0; }
+__attribute__((target_clones("dotprod", "lse"))) int
default_def_with_version_decls(void);
+__attribute__((target_version("jscvt"))) int
default_def_with_version_decls(void);
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @explicit_default.ifunc = weak_odr alias i32 (), ptr
@explicit_default
+// CHECK: @implicit_default.ifunc = weak_odr alias i32 (), ptr
@implicit_default
+// CHECK: @default_def_with_version_decls.ifunc = weak_odr alias i32 (), ptr
@default_def_with_version_decls
+// CHECK: @explicit_default = weak_odr ifunc i32 (), ptr
@explicit_default.resolver
+// CHECK: @implicit_default = weak_odr ifunc i32 (), ptr
@implicit_default.resolver
+// CHECK: @default_def_with_version_decls = weak_odr ifunc i32 (), ptr
@default_def_with_version_decls.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.default
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 0
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mjscvt
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mdotprod
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@explicit_default._Mlse
+// CHECK-SAME: () #[[ATTR3:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 2
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@explicit_default.resolver() comdat {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 1048576
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1048576
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @explicit_default._Mjscvt
+// CHECK: resolver_else:
+// CHECK-NEXT:[[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP5:%.*]] = and i64 [[TMP4]], 64
+// CHECK-NEXT:[[TMP6:%.*]] = icmp eq i64 [[TMP5]], 64
+// CHECK-NEXT:[[TMP7:%.*]] = and i1 true, [[TMP6]]
+// CHECK-NEXT:br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label
[[RESOLVER_ELSE2:%.*]]
+// CHECK: resolver_return1:
+// CHECK-NEXT:ret ptr @explicit_default._Mrdm
+// CHECK: resolver_else2:
+// CHECK-NEXT:[[TMP8:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP9:%.*]] = and i64 [[TMP8]], 16
+// CHECK-NEXT:[[TMP10:%.*]] = icmp eq i64 [[TMP9]], 16
+// CHECK-NEXT:[[TMP11:%.*]] = and i1 true, [[TMP10]]
+// CHECK-NEXT:br i1 [[TMP11]], label [[RESOLVER_RETURN3:%.*]], label
[[RESOLVER_ELSE4:%.*]]
+// CHECK: resolver_return3:
+// CHECK-NEXT:ret ptr @explicit_default._Mdotprod
+// CHECK: resolver_else4:
+// CHECK-NEXT:[[TMP12:%.*]] = load i64, ptr @__aarch64_cpu_features, align
8
+// CHECK-NEXT:
[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/85454 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -483,14 +483,16 @@ void just_fine(void) {}
__arm_locally_streaming
__attribute__((target_version("sme2")))
-void just_fine_locally_streaming(void) {}
+void incompatible_locally_streaming(void) {}
+// expected-error@-1 {{attribute 'target_version' multiversioning cannot be
combined with attribute '__arm_locally_streaming'}}
+// expected-cpp-error@-2 {{attribute 'target_version' multiversioning cannot
be combined with attribute '__arm_locally_streaming'}}
jroelofs wrote:
I think this is a regression, but it's fine to fix it in another patch. The
locally streaming function has the same ABI as the non-streaming one, so FMV
_should_ be possible between them (unlike w/ a streaming one). LIkewise, it
should be possible to FMV between streaming compatible functions and normal
ones.
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -109,9 +109,22 @@ int unused_with_implicit_default_def(void) { return 1; }
int unused_with_implicit_forward_default_def(void) { return 0; }
__attribute__((target_version("lse"))) int
unused_with_implicit_forward_default_def(void) { return 1; }
-// This should generate a normal function.
+// This should generate a target version despite the default not being
declared.
__attribute__((target_version("rdm"))) int unused_without_default(void) {
return 0; }
+// The following is guarded because in NOFMV we get errors for calling
undeclared functions.
+#ifdef __HAVE_FUNCTION_MULTI_VERSIONING
+// This should generate a default declaration, two target versions and the
resolver.
+__attribute__((target_version("jscvt"))) int
used_def_without_default_decl(void) { return 1; }
+__attribute__((target_version("rdma"))) int
used_def_without_default_decl(void) { return 2; }
+
+// This should generate a default declaration and the resolver.
+__attribute__((target_version("jscvt"))) int
used_decl_without_default_decl(void);
+__attribute__((target_version("rdma"))) int
used_decl_without_default_decl(void);
+
+int caller(void) { return used_def_without_default_decl() +
used_decl_without_default_decl(); }
jroelofs wrote:
Maybe the second one should have a warning?
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -109,9 +109,22 @@ int unused_with_implicit_default_def(void) { return 1; }
int unused_with_implicit_forward_default_def(void) { return 0; }
__attribute__((target_version("lse"))) int
unused_with_implicit_forward_default_def(void) { return 1; }
-// This should generate a normal function.
+// This should generate a target version despite the default not being
declared.
__attribute__((target_version("rdm"))) int unused_without_default(void) {
return 0; }
+// The following is guarded because in NOFMV we get errors for calling
undeclared functions.
+#ifdef __HAVE_FUNCTION_MULTI_VERSIONING
+// This should generate a default declaration, two target versions and the
resolver.
+__attribute__((target_version("jscvt"))) int
used_def_without_default_decl(void) { return 1; }
+__attribute__((target_version("rdma"))) int
used_def_without_default_decl(void) { return 2; }
+
+// This should generate a default declaration and the resolver.
+__attribute__((target_version("jscvt"))) int
used_decl_without_default_decl(void);
+__attribute__((target_version("rdma"))) int
used_decl_without_default_decl(void);
+
+int caller(void) { return used_def_without_default_decl() +
used_decl_without_default_decl(); }
jroelofs wrote:
two more cases:
```
int foo(void);
__attribute__((target_version("jscvt"))) int foo(void);
__attribute__((target_version("rdma"))) int foo(void);
```
```
int bar(void) { return 1; }
__attribute__((target_version("jscvt"))) int bar(void);
__attribute__((target_version("rdma"))) int bar(void);
```
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -104,6 +103,7 @@ int __attribute__((target_version("sha2"))) combine(void) {
return 1; }
int __attribute__((aarch64_vector_pcs, target_version("sha3"))) combine(void)
{ return 2; }
int __attribute__((target_version("fp+aes+pmull+rcpc"))) unspec_args() {
return -1; }
+// expected-error@-1 {{multiversioned function must have a prototype}}
jroelofs wrote:
suggestion for another PR: a fixit that adds the `(void)` would be pretty slick.
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -70,17 +69,23 @@ int __attribute__((target_version("lse"))) extc(void) {
return 1; }
auto __attribute__((target_version("default"))) ret1(void) { return 1; }
auto __attribute__((target_version("dpb"))) ret2(void) { return 1; }
+// expected-error@-1 {{attribute 'target_version' multiversioned functions do
not yet support deduced return types}}
auto __attribute__((target_version("dpb2"))) ret3(void) -> int { return 1; }
class Cls {
__attribute__((target_version("rng"))) Cls();
+ // expected-error@-1 {{attribute 'target_version' multiversioned functions
do not yet support constructors}}
__attribute__((target_version("sve-i8mm"))) ~Cls();
+ // expected-error@-1 {{attribute 'target_version' multiversioned functions
do not yet support destructors}}
Cls &__attribute__((target_version("f32mm"))) operator=(const Cls &) =
default;
+ // expected-error@-1 {{attribute 'target_version' multiversioned functions
do not yet support defaulted functions}}
Cls &__attribute__((target_version("ssbs"))) operator=(Cls &&) = delete;
+ // expected-error@-1 {{attribute 'target_version' multiversioned functions
do not yet support deleted functions}}
jroelofs wrote:
Are these new?
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -68,13 +68,15 @@ int __attribute__((target_version(""))) unsup1(void) {
return 1; }
void __attribute__((target_version("crc32"))) unsup2(void) {}
void __attribute__((target_version("default+fp16"))) koo(void) {}
+//expected-error@-1 {{function multiversioning doesn't support feature
'default'}}
void __attribute__((target_version("default+default+default"))) loo(void) {}
+//expected-error@-1 {{function multiversioning doesn't support feature
'default'}}
jroelofs wrote:
Maybe this should get its own diagnostic. I could see that phrasing being
really confusing.
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
@@ -483,14 +483,16 @@ void just_fine(void) {}
__arm_locally_streaming
__attribute__((target_version("sme2")))
-void just_fine_locally_streaming(void) {}
+void incompatible_locally_streaming(void) {}
+// expected-error@-1 {{attribute 'target_version' multiversioning cannot be
combined with attribute '__arm_locally_streaming'}}
+// expected-cpp-error@-2 {{attribute 'target_version' multiversioning cannot
be combined with attribute '__arm_locally_streaming'}}
jroelofs wrote:
I missed this before... why?
cc @sdesmalen-arm
https://github.com/llvm/llvm-project/pull/85454
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[clang] [FMV] Allow multi versioning without default declaration. (PR #85454)
jroelofs wrote: re: stacking PRs: SPR is pretty handy: https://getcord.github.io/spr/ https://github.com/llvm/llvm-project/pull/85454 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Reland [FMV] Emit the resolver along with the default version definit… (PR #85923)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/85923 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
https://github.com/jroelofs approved this pull request. All three LGTM. https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Driver,AArch64] Remove AArch32-specific -m[no-]unaligned-access (PR #85441)
jroelofs wrote: > If Apple platforms need this option, I can keep it recognized but only for > Apple. I don't see any projects that use `-m(no-)unaligned-access`, but it could be that I don't have permissions on ones that do. I'll give our qualification team a heads-up if/when you land it, and if we need to we can have an exception for `*-apple-*` triples or something. We'll let you know. https://github.com/llvm/llvm-project/pull/85441 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
jroelofs wrote:
I'm referring to:
```
// This should generate a normal function.
int __attribute__((target_version("rdm"))) unused_without_default(void);
```
and:
```
// CHECK: Function Attrs: noinline nounwind optnone
+ // CHECK-LABEL: define {{[^@]+}}@unused_without_default
+ // CHECK-SAME: () #[[ATTR17:[0-9]+]] {
// CHECK-NEXT: entry:
+ // CHECK-NEXT:ret i32 0
```
and am confused why `int __attribute__((target_version("rdm")))
unused_without_default(void)`'s mangling will be `_ unused_without_default` and
not `_unused_without_default._Mrdm`.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
jroelofs wrote:
The current patch looks mostly good, but I'm still hung up on this:
> I'd like to support FMV in existing codebases as lean as possible, so the
> default version attribute would be optional to write as not all
> version/toolchain will support it. smallest possible codebase change to
> introduce multi versioning:
>
> ```c
> int foo(void);
>
> + #ifdef __HAVE_FUNCTION_MULTI_VERSIONING
> + int __attribute__((target_version("feature"))) foo(void);
> + #endif
> ```
Are you imagining this would multi-version between the un-decorated `int
foo(void);` and the `int __attribute__((target_version("feature"))) foo(void);`
decorated one? In the current patch, it just gets the non-mangled name. And the
fact that we get a not-mangled function that uses `feature` without going
through a resolver is concerning to me.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
@@ -2085,6 +2099,37 @@ void
AArch64AsmPrinter::emitMachOIFuncStubHelperBody(Module ,
.addImm(2),
*STI);
+ if (TM.getTargetTriple().isArm64e()) {
+// autibsp
jroelofs wrote:
Is there a PR up for that that I should tack this bit onto the end of?
https://github.com/llvm/llvm-project/pull/84704
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4347,6 +4362,19 @@ void CodeGenModule::emitCPUDispatchDefinition(GlobalDecl
GD) {
}
}
+/// Adds a declaration to the list of multi version functions if not present.
+void CodeGenModule::AddDeferredMultiVersionResolverToEmit(GlobalDecl GD) {
+ const auto *FD = cast(GD.getDecl());
+ assert(FD && "Not a FunctionDecl?");
+
+ if (FD->isTargetVersionMultiVersion()) {
+StringRef NamePrefix = getMangledName(GD).split('.').first;
jroelofs wrote:
Hm. Is there somewhere convenient to stick an `llvm::StringSaver`?
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
https://github.com/jroelofs edited https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4120,6 +4127,9 @@ void CodeGenModule::emitMultiVersionFunctions() {
TA->getArchitecture(), Feats);
} else {
const auto *TVA = CurFD->getAttr();
+ if (TVA->isDefaultVersion() &&
+ CurFD->doesThisDeclarationHaveABody())
+EmitResolver = true;
llvm::SmallVector Feats;
TVA->getFeatures(Feats);
Options.emplace_back(cast(Func),
jroelofs wrote:
I always get `isTargetMultiVersion` confused w/ TargetVersionMultiVersion.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4120,6 +4127,9 @@ void CodeGenModule::emitMultiVersionFunctions() {
TA->getArchitecture(), Feats);
} else {
const auto *TVA = CurFD->getAttr();
+ if (TVA->isDefaultVersion() &&
+ CurFD->doesThisDeclarationHaveABody())
+EmitResolver = true;
llvm::SmallVector Feats;
TVA->getFeatures(Feats);
Options.emplace_back(cast(Func),
jroelofs wrote:
oh, ok. cool.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4347,6 +4362,19 @@ void CodeGenModule::emitCPUDispatchDefinition(GlobalDecl
GD) {
}
}
+/// Adds a declaration to the list of multi version functions if not present.
+void CodeGenModule::AddDeferredMultiVersionResolverToEmit(GlobalDecl GD) {
+ const auto *FD = cast(GD.getDecl());
+ assert(FD && "Not a FunctionDecl?");
+
+ if (FD->isTargetVersionMultiVersion()) {
+StringRef NamePrefix = getMangledName(GD).split('.').first;
jroelofs wrote:
`asm`+multiversioning isn't really the point of that argument... sorry, bad
example. My point is that the `.` inserted for multi versioning mangling might
not be the only one. If you insist on string splitting, it should at least be
`rsplit`.
We shouldn't have to rely on string splitting though: `getMangledNameImpl(...,
false)` returns the prefix that you need. It is used elsewhere in this
multiversioning code to retrieve what the mangled name would be on the function
if it did not have the attribute:
https://github.com/llvm/llvm-project/blob/7337db72ed334f8389601f160b762e50c4e61c25/clang/lib/CodeGen/CodeGenModule.cpp#L1857-L1861
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
https://github.com/jroelofs edited https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -84,9 +84,33 @@ int hoo(void) {
return fp1() + fp2();
}
+// This should generate one target version but no resolver.
+__attribute__((target_version("default"))) int
unused_with_forward_default_decl(void);
+__attribute__((target_version("mops"))) int
unused_with_forward_default_decl(void) { return 0; }
+// This should also generate one target version but no resolver.
+extern int unused_with_implicit_extern_forward_default_decl(void);
+__attribute__((target_version("dotprod")))
+int unused_with_implicit_extern_forward_default_decl(void) { return 0; }
+// This should also generate one target version but no resolver.
+__attribute__((target_version("aes"))) int unused_with_default_decl(void) {
return 0; }
+__attribute__((target_version("default"))) int unused_with_default_decl(void);
+// This should generate two target versions and the resolver.
+__attribute__((target_version("sve"))) int unused_with_default_def(void) {
return 0; }
+__attribute__((target_version("default"))) int unused_with_default_def(void) {
return 1; }
+
+// This should also generate two target versions and the resolver.
+__attribute__((target_version("fp16"))) int
unused_with_implicit_default_def(void) { return 0; }
+int unused_with_implicit_default_def(void) { return 1; }
+
+// This should also generate two target versions and the resolver.
+int unused_with_implicit_forward_default_def(void) { return 0; }
+__attribute__((target_version("lse"))) int
unused_with_implicit_forward_default_def(void) { return 1; }
+
+// This should generate a normal function.
+__attribute__((target_version("rdm"))) int unused_without_default(void) {
return 0; }
jroelofs wrote:
IIUC this breaks a use case I am _very_ interested in:
header.h:
```
int defined_in_separate_files(void);
```
feature_a.c:
```
#include
__attribute__((target_version("featurea")))
int defined_in_separate_files(void) { return 1; }
```
feature_b.c:
```
#include
__attribute__((target_version("featureb")))
int defined_in_separate_files(void) { return 2; }
```
default.c:
```
#include
__attribute__((target_version("rdm")))
int defined_in_separate_files(void);
__attribute__((target_version("lse")))
int defined_in_separate_files(void);
__attribute__((target_version("default")))
int defined_in_separate_files(void) { return 0; }
```
In my experience, the functions that my users want to multi-version tend to be
pretty large and live in separate files, organized per architectural feature
that they want to take advantage of.
At the very least it adds a sharp edge: they need to declare the default
version in each TU, or put it in a private header shared between them.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4347,6 +4362,19 @@ void CodeGenModule::emitCPUDispatchDefinition(GlobalDecl
GD) {
}
}
+/// Adds a declaration to the list of multi version functions if not present.
+void CodeGenModule::AddDeferredMultiVersionResolverToEmit(GlobalDecl GD) {
+ const auto *FD = cast(GD.getDecl());
+ assert(FD && "Not a FunctionDecl?");
+
+ if (FD->isTargetVersionMultiVersion()) {
+StringRef NamePrefix = getMangledName(GD).split('.').first;
jroelofs wrote:
ISTM you want `getMangledNameImpl` here instead, with `OmitMultiVersionMangling
= true`. Trying to split this on the first `.` seems suspicious, and might not
play well with `asm("foo.bar.baz._Mlse")`
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -4120,6 +4127,9 @@ void CodeGenModule::emitMultiVersionFunctions() {
TA->getArchitecture(), Feats);
} else {
const auto *TVA = CurFD->getAttr();
+ if (TVA->isDefaultVersion() &&
+ CurFD->doesThisDeclarationHaveABody())
+EmitResolver = true;
llvm::SmallVector Feats;
TVA->getFeatures(Feats);
Options.emplace_back(cast(Func),
jroelofs wrote:
github won't let me put a comment on the line I want to, but should there be a
`EmitResolver = true` down in `} else if (FD->isTargetClonesMultiVersion()) {` ?
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
jroelofs wrote: Can you elaborate on that conversation a bit more? I want to make sure we cover all the corner cases. https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [clang] Fix Clang language extension documentation markup for __builtin_arm_trap. (PR #85310)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/85310 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
@@ -0,0 +1,58 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple arm64e-apple-ios -target-feature +ls64
-target-feature +fullfp16 -S -emit-llvm -o - %s | FileCheck %s
+
+int __attribute__((target_version("sha1"))) fmv(void) { return 1; }
+int __attribute__((target_version("default"))) fmv(void) { return 0; }
+int foo() {
+ return fmv();
+}
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
+// CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv._Msha1
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@foo
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[CALL:%.*]] = call i32 @fmv()
+// CHECK-NEXT:ret i32 [[CALL]]
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 2048
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2048
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @fmv._Msha1
+// CHECK: resolver_else:
+// CHECK-NEXT:ret ptr @fmv.default
jroelofs wrote:
@asl the check in the hunk above should be generalized for ELF, and only turned
on with `-fptrauth-calls`. I wasn't sure how to get a QualType here though,
which would be needed to get the `CGPointerAuthInfo` that this would make the
check on. Not sure if it's reasonable to "invent" one that's close enough, e.g.
for `void (*fn_ptr)(void);` or something.
https://github.com/llvm/llvm-project/pull/84704
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[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
@@ -0,0 +1,58 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple arm64e-apple-ios -target-feature +ls64
-target-feature +fullfp16 -S -emit-llvm -o - %s | FileCheck %s
+
+int __attribute__((target_version("sha1"))) fmv(void) { return 1; }
+int __attribute__((target_version("default"))) fmv(void) { return 0; }
+int foo() {
+ return fmv();
+}
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
+// CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv._Msha1
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@foo
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[CALL:%.*]] = call i32 @fmv()
+// CHECK-NEXT:ret i32 [[CALL]]
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 2048
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2048
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @fmv._Msha1
+// CHECK: resolver_else:
+// CHECK-NEXT:ret ptr @fmv.default
jroelofs wrote:
The thing that's missing is this:
https://github.com/apple/llvm-project/blob/970b6231f607e211c23e15a582572e6f18f4e6b2/clang/include/clang/CodeGen/CodeGenABITypes.h#L122-L126
along with this hunk:
```
--- a/clang/lib/CodeGen/CodeGenFunction.cpp
+++ b/clang/lib/CodeGen/CodeGenFunction.cpp
@@ -2893,7 +2893,11 @@ static void
CreateMultiVersionResolverReturn(CodeGenModule ,
llvm::Function *FuncToReturn,
bool SupportsIFunc) {
if (SupportsIFunc) {
-Builder.CreateRet(FuncToReturn);
+llvm::Constant *Fn = FuncToReturn;
+if (CGM.getContext().getTargetInfo().getTriple().isArm64e())
+ Fn = CGM.getConstantSignedPointer(
+ Fn, 0, nullptr, llvm::Constant::getNullValue(CGM.SizeTy));
+Builder.CreateRet(Fn);
return;
}
```
This arranges for the resolver to return signed function pointers. There is no
difference for arm64(non-e).
https://github.com/llvm/llvm-project/pull/84704
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[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
jroelofs wrote: > > Can the triple checks be generalized to checking about pauth-enabled > > subtarget feature? This way everything would work for ELF platforms > > eventually. These are admittedly a bit of a hack, since we don't have a Function to look at the attributes on when we're in that part of the AsmPrinter. But that said, the ones in the AsmPrinter are all Mach-O-specific (they "manually" implement what the dynamic linker would do on an ELF platform), so generalizing them won't help ELF platforms. > > @asl Since I'm not sure how particularly ifuncs should be handled, here are > two answers for two different cases. > > If we need just to check that pauth target feature is enabled, we can use > `TM.getTargetFeatureString()` and see if it contains `+pauth`. > > If the ifunc-related behavior is dependent on `-fptrauth-calls` (implicitly > enabled on apple arm64e) and should not be enabled when, say, only > `-fptrauth-returns` is used (in both cases the target feature string contains > `+pauth`), on ELF we can add a check against (platform,version) tuple > defining the ABI after #85236 is merged. The change to add the default attributes should cover whether the resolver gets `-fptrauth-returns`. For `-fptrauth-calls` on the other hand you will need some cooperation with the dynamic linker on ELF targets, since on those platforms you'll need to coordinate with the implementation of `.type global_ifunc,@gnu_indirect_function` to decide whether the resolver should sign the returned pointer and with what key. https://github.com/llvm/llvm-project/pull/84704 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] AArch64: add __builtin_arm_trap (PR #85054)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/85054 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
https://github.com/jroelofs updated
https://github.com/llvm/llvm-project/pull/84704
>From b352a41e1788819afbb15a5b6d79cbf2968dc5dc Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Sun, 10 Mar 2024 16:46:50 -0700
Subject: [PATCH 1/2] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on
arm64e
---
clang/lib/CodeGen/CodeGenModule.cpp | 18 --
.../test/CodeGen/attr-target-version-arm64e.c | 58 +++
llvm/include/llvm/CodeGen/AsmPrinter.h| 13 +++--
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp| 3 +-
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 45 ++
llvm/test/CodeGen/AArch64/ifunc-asm.ll| 21 +--
6 files changed, 142 insertions(+), 16 deletions(-)
create mode 100644 clang/test/CodeGen/attr-target-version-arm64e.c
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index 967319bdfc4571..dadc76d04c5f6b 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -4365,13 +4365,16 @@ llvm::Constant
*CodeGenModule::GetOrCreateMultiVersionResolver(GlobalDecl GD) {
// For cpu_specific, don't create an ifunc yet because we don't know if the
// cpu_dispatch will be emitted in this translation unit.
if (getTarget().supportsIFunc() && !FD->isCPUSpecificMultiVersion()) {
-llvm::Type *ResolverType = llvm::FunctionType::get(
+llvm::FunctionType *ResolverType = llvm::FunctionType::get(
llvm::PointerType::get(DeclTy,
getTypes().getTargetAddressSpace(FD->getType())),
false);
-llvm::Constant *Resolver = GetOrCreateLLVMFunction(
-MangledName + ".resolver", ResolverType, GlobalDecl{},
-/*ForVTable=*/false);
+llvm::Function *Resolver = cast(
+CreateRuntimeFunction(ResolverType, MangledName + ".resolver")
+.getCallee());
+llvm::AttrBuilder Attrs(getLLVMContext());
+addDefaultFunctionDefinitionAttributes(Attrs);
+Resolver->addFnAttrs(Attrs);
llvm::GlobalIFunc *GIF =
llvm::GlobalIFunc::create(DeclTy, 0, getMultiversionLinkage(*this, GD),
"", Resolver, ());
@@ -4381,8 +4384,11 @@ llvm::Constant
*CodeGenModule::GetOrCreateMultiVersionResolver(GlobalDecl GD) {
return GIF;
}
- llvm::Constant *Resolver = GetOrCreateLLVMFunction(
- ResolverName, DeclTy, GlobalDecl{}, /*ForVTable=*/false);
+ llvm::Function *Resolver = cast(
+ CreateRuntimeFunction(DeclTy, ResolverName).getCallee());
+ llvm::AttrBuilder Attrs(getLLVMContext());
+ addDefaultFunctionDefinitionAttributes(Attrs);
+ Resolver->addFnAttrs(Attrs);
assert(isa(Resolver) &&
"Resolver should be created for the first time");
SetCommonAttributes(FD, cast(Resolver));
diff --git a/clang/test/CodeGen/attr-target-version-arm64e.c
b/clang/test/CodeGen/attr-target-version-arm64e.c
new file mode 100644
index 00..2deff9a688daaa
--- /dev/null
+++ b/clang/test/CodeGen/attr-target-version-arm64e.c
@@ -0,0 +1,58 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple arm64e-apple-ios -target-feature +ls64
-target-feature +fullfp16 -S -emit-llvm -o - %s | FileCheck %s
+
+int __attribute__((target_version("sha1"))) fmv(void) { return 1; }
+int __attribute__((target_version("default"))) fmv(void) { return 0; }
+int foo() {
+ return fmv();
+}
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
+// CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv._Msha1
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@foo
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[CALL:%.*]] = call i32 @fmv()
+// CHECK-NEXT:ret i32 [[CALL]]
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 2048
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2048
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @fmv._Msha1
+// CHECK: resolver_else:
+// CHECK-NEXT:ret ptr @fmv.default
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv.default
+// CHECK-SAME: () #[[ATTR1]] {
+//
[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
jroelofs wrote: some tests need UTC-ing because of the new attrs on the resolver: ``` Clang :: CodeGen/attr-cpuspecific.c Clang :: CodeGen/attr-target-clones.c Clang :: CodeGen/attr-target-mv-va-args.c Clang :: CodeGen/attr-target-mv.c Clang :: CodeGen/attr-target-version.c Clang :: CodeGenCXX/attr-cpuspecific.cpp Clang :: CodeGenCXX/attr-target-clones.cpp Clang :: CodeGenCXX/attr-target-mv-diff-ns.cpp Clang :: CodeGenCXX/attr-target-mv-member-funcs.cpp Clang :: CodeGenCXX/attr-target-mv-out-of-line-defs.cpp Clang :: CodeGenCXX/attr-target-mv-overloads.cpp ``` https://github.com/llvm/llvm-project/pull/84704 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
@@ -0,0 +1,58 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple arm64e-apple-ios -target-feature +ls64
-target-feature +fullfp16 -S -emit-llvm -o - %s | FileCheck %s
+
+int __attribute__((target_version("sha1"))) fmv(void) { return 1; }
+int __attribute__((target_version("default"))) fmv(void) { return 0; }
+int foo() {
+ return fmv();
+}
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
+// CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv._Msha1
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@foo
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[CALL:%.*]] = call i32 @fmv()
+// CHECK-NEXT:ret i32 [[CALL]]
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 2048
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2048
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @fmv._Msha1
+// CHECK: resolver_else:
+// CHECK-NEXT:ret ptr @fmv.default
jroelofs wrote:
The machinery to sign these hasn't been upstreamed yet, but they'll be e.g.
`@fmv.default.pauth` when that happens.
https://github.com/llvm/llvm-project/pull/84704
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[clang] [llvm] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e (PR #84704)
https://github.com/jroelofs created
https://github.com/llvm/llvm-project/pull/84704
... and apply default function attributes so that the resolver will also be
PAC'd (once more `arm64e` patches land upstream).
>From b352a41e1788819afbb15a5b6d79cbf2968dc5dc Mon Sep 17 00:00:00 2001
From: Jon Roelofs
Date: Sun, 10 Mar 2024 16:46:50 -0700
Subject: [PATCH] [CodeGen][AArch64][FMV] PAC the stub_helper's frame on arm64e
---
clang/lib/CodeGen/CodeGenModule.cpp | 18 --
.../test/CodeGen/attr-target-version-arm64e.c | 58 +++
llvm/include/llvm/CodeGen/AsmPrinter.h| 13 +++--
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp| 3 +-
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 45 ++
llvm/test/CodeGen/AArch64/ifunc-asm.ll| 21 +--
6 files changed, 142 insertions(+), 16 deletions(-)
create mode 100644 clang/test/CodeGen/attr-target-version-arm64e.c
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index 967319bdfc4571..dadc76d04c5f6b 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -4365,13 +4365,16 @@ llvm::Constant
*CodeGenModule::GetOrCreateMultiVersionResolver(GlobalDecl GD) {
// For cpu_specific, don't create an ifunc yet because we don't know if the
// cpu_dispatch will be emitted in this translation unit.
if (getTarget().supportsIFunc() && !FD->isCPUSpecificMultiVersion()) {
-llvm::Type *ResolverType = llvm::FunctionType::get(
+llvm::FunctionType *ResolverType = llvm::FunctionType::get(
llvm::PointerType::get(DeclTy,
getTypes().getTargetAddressSpace(FD->getType())),
false);
-llvm::Constant *Resolver = GetOrCreateLLVMFunction(
-MangledName + ".resolver", ResolverType, GlobalDecl{},
-/*ForVTable=*/false);
+llvm::Function *Resolver = cast(
+CreateRuntimeFunction(ResolverType, MangledName + ".resolver")
+.getCallee());
+llvm::AttrBuilder Attrs(getLLVMContext());
+addDefaultFunctionDefinitionAttributes(Attrs);
+Resolver->addFnAttrs(Attrs);
llvm::GlobalIFunc *GIF =
llvm::GlobalIFunc::create(DeclTy, 0, getMultiversionLinkage(*this, GD),
"", Resolver, ());
@@ -4381,8 +4384,11 @@ llvm::Constant
*CodeGenModule::GetOrCreateMultiVersionResolver(GlobalDecl GD) {
return GIF;
}
- llvm::Constant *Resolver = GetOrCreateLLVMFunction(
- ResolverName, DeclTy, GlobalDecl{}, /*ForVTable=*/false);
+ llvm::Function *Resolver = cast(
+ CreateRuntimeFunction(DeclTy, ResolverName).getCallee());
+ llvm::AttrBuilder Attrs(getLLVMContext());
+ addDefaultFunctionDefinitionAttributes(Attrs);
+ Resolver->addFnAttrs(Attrs);
assert(isa(Resolver) &&
"Resolver should be created for the first time");
SetCommonAttributes(FD, cast(Resolver));
diff --git a/clang/test/CodeGen/attr-target-version-arm64e.c
b/clang/test/CodeGen/attr-target-version-arm64e.c
new file mode 100644
index 00..2deff9a688daaa
--- /dev/null
+++ b/clang/test/CodeGen/attr-target-version-arm64e.c
@@ -0,0 +1,58 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature --check-attributes --check-globals
--include-generated-funcs
+// RUN: %clang_cc1 -triple arm64e-apple-ios -target-feature +ls64
-target-feature +fullfp16 -S -emit-llvm -o - %s | FileCheck %s
+
+int __attribute__((target_version("sha1"))) fmv(void) { return 1; }
+int __attribute__((target_version("default"))) fmv(void) { return 0; }
+int foo() {
+ return fmv();
+}
+
+//.
+// CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
+// CHECK: @fmv.ifunc = weak_odr alias i32 (), ptr @fmv
+// CHECK: @fmv = weak_odr ifunc i32 (), ptr @fmv.resolver
+//.
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@fmv._Msha1
+// CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:ret i32 1
+//
+//
+// CHECK: Function Attrs: noinline nounwind optnone
+// CHECK-LABEL: define {{[^@]+}}@foo
+// CHECK-SAME: () #[[ATTR1:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT:[[CALL:%.*]] = call i32 @fmv()
+// CHECK-NEXT:ret i32 [[CALL]]
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@fmv.resolver
+// CHECK-SAME: () #[[ATTR2:[0-9]+]] {
+// CHECK-NEXT: resolver_entry:
+// CHECK-NEXT:call void @__init_cpu_features_resolver()
+// CHECK-NEXT:[[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
+// CHECK-NEXT:[[TMP1:%.*]] = and i64 [[TMP0]], 2048
+// CHECK-NEXT:[[TMP2:%.*]] = icmp eq i64 [[TMP1]], 2048
+// CHECK-NEXT:[[TMP3:%.*]] = and i1 true, [[TMP2]]
+// CHECK-NEXT:br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label
[[RESOLVER_ELSE:%.*]]
+// CHECK: resolver_return:
+// CHECK-NEXT:ret ptr @fmv._Msha1
+// CHECK: resolver_else:
+// CHECK-NEXT:ret ptr @fmv.default
+//
+//
+// CHECK: Function
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
@@ -85,7 +85,21 @@ int hoo(void) {
}
+// This should generate one target version but no resolver.
+__attribute__((target_version("default"))) int
unused_with_forward_default_decl(void);
+__attribute__((target_version("mops"))) int
unused_with_forward_default_decl(void) { return 0; }
+// FIXME: If the default declaration follows the non-default definition,
jroelofs wrote:
Ouch. Yeah, I think we should consider that a bug.
https://github.com/llvm/llvm-project/pull/84405
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[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
https://github.com/jroelofs edited https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Emit the resolver along with the default version definition. (PR #84405)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/84405 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [NFC][Docs] Documenting __builtin_cpu_supports. (PR #84098)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/84098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Remove duplicate features from mangled name. (PR #84165)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/84165 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [NFC][Docs] Documenting __builtin_cpu_supports. (PR #84098)
@@ -2799,6 +2799,34 @@ counter's true frequency will need to be provided by the
user.
Query for this feature with ``__has_builtin(__builtin_readsteadycounter)``.
+``__builtin_cpu_supports``
+--
+
+**Syntax**:
+
+.. code-block:: c++
+
+ int __builtin_cpu_supports(const char *features);
+
+**Example of Use:**:
+
+.. code-block:: c++
+
+ if (__builtin_cpu_supports("sve"))
+sve_code();
+
+**Description**:
+
+The ``__builtin_cpu_supports`` function detects at runtime if target CPU
+supports features specified in string argument. It returns positive integer
+if all features are supported and 0 otherwise. Names of features and format is
+target specific. For example on AArch64 features are combined using ``+`` like
+this ``__builtin_cpu_supports("flagm+sha3+lse+rcpc2+fcma+memtag+bti+sme2")``.
+If feature name is not supported or format is wrong, compiler will issue a
+warning and replace builtin by constant 0.
+
+Query for this feature with ``__has_builtin(__builtin_cpu_supports)``.
jroelofs wrote:
```suggestion
The ``__builtin_cpu_supports`` function detects at runtime if the target CPU
supports features specified in string argument. It returns a positive integer
if all features are supported and 0 otherwise. Names of features and format are
target specific. For example on AArch64 features are combined using ``+`` like
this ``__builtin_cpu_supports("flagm+sha3+lse+rcpc2+fcma+memtag+bti+sme2")``.
If a feature name is not supported or the format is wrong, the compiler will
issue a
warning and replace builtin by the constant 0.
Query for this feature with ``__has_builtin(__builtin_cpu_supports)``.
```
https://github.com/llvm/llvm-project/pull/84098
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[clang] [NFC][Docs] Documenting __builtin_cpu_supports. (PR #84098)
https://github.com/jroelofs approved this pull request. Some small nits, but LGTM. https://github.com/llvm/llvm-project/pull/84098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [NFC][Docs] Documenting __builtin_cpu_supports. (PR #84098)
https://github.com/jroelofs edited https://github.com/llvm/llvm-project/pull/84098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Allow target version definitions in any order. (PR #83887)
https://github.com/jroelofs approved this pull request. Thank you, this is great! https://github.com/llvm/llvm-project/pull/83887 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/80540 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [FMV] Use lexicographic order of feature names when mangling. (PR #83464)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/83464 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] [Clang][SME] Detect always_inline used with mismatched streaming attributes (PR #77936)
@@ -814,6 +820,43 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction ,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+static bool isStreaming(const FunctionDecl *F) {
+ if (F->hasAttr())
+return true;
+ if (const auto *T = F->getType()->getAs())
+return T->getAArch64SMEAttributes() &
FunctionType::SME_PStateSMEnabledMask;
+ return false;
+}
+
+static bool isStreamingCompatible(const FunctionDecl *F) {
+ if (const auto *T = F->getType()->getAs())
+return T->getAArch64SMEAttributes() &
+ FunctionType::SME_PStateSMCompatibleMask;
+ return false;
+}
jroelofs wrote:
@sdesmalen-arm WDYT about making these two free functions into members of
FunctionDecl? Seems like copies of these helpers are proliferating.
https://github.com/llvm/llvm-project/pull/77936
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[clang] [Driver,BareMetal] Replace -lclang_rt.builtins{,-$arch}.a with an absolute path (PR #82424)
https://github.com/jroelofs approved this pull request. LGTM, thanks! https://github.com/llvm/llvm-project/pull/82424 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/82378 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)
@@ -14025,6 +14028,19 @@ Value *CodeGenFunction::EmitX86CpuInit() {
return Builder.CreateCall(Func);
}
+Value *CodeGenFunction::EmitAArch64CpuSupports(const CallExpr *E) {
+ const Expr *ArgExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef ArgStr = cast(ArgExpr)->getString();
jroelofs wrote:
oh, yes. it does.
https://github.com/llvm/llvm-project/pull/82378
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[clang] [Driver] Improve error when a compiler-rt library is not found (PR #81037)
@@ -44,9 +43,8 @@
// CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
// CHECK-V6M-DEFAULTCXX-SAME:
"-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
-// CHECK-V6M-DEFAULTCXX-SAME:
"-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
// CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
-// CHECK-V6M-DEFAULTCXX-SAME: "-lc" "-lm" "-lclang_rt.builtins-armv6m"
"--target2=rel" "-o" "a.out"
jroelofs wrote:
I'm not as worried about the `-L` as I am the rename
`"-lclang_rt.builtins-armv6m"` -> `"-lclang_rt.builtins"` and that being
consistent with the layout that the build system sets up.
https://github.com/llvm/llvm-project/pull/81037
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[clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)
@@ -14025,6 +14028,19 @@ Value *CodeGenFunction::EmitX86CpuInit() {
return Builder.CreateCall(Func);
}
+Value *CodeGenFunction::EmitAArch64CpuSupports(const CallExpr *E) {
+ const Expr *ArgExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef ArgStr = cast(ArgExpr)->getString();
jroelofs wrote:
Does prior machinery in sema for the builtin forbid e.g:
```
const char *feats = "rng+flagm";
__builtin_cpu_supports(feats);
```
If not, this cast may fail.
https://github.com/llvm/llvm-project/pull/82378
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[clang] [Driver] Improve error when a compiler-rt library is not found (PR #81037)
@@ -44,9 +43,8 @@
// CHECK-V6M-DEFAULTCXX: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
// CHECK-V6M-DEFAULTCXX: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic" "-EL"
// CHECK-V6M-DEFAULTCXX-SAME:
"-L{{[^"]*}}{{[/\\]+}}Inputs{{[/\\]+}}baremetal_arm{{[/\\]+}}lib"
-// CHECK-V6M-DEFAULTCXX-SAME:
"-L[[RESOURCE_DIR]]{{[/\\]+}}lib{{[/\\]+}}baremetal"
// CHECK-V6M-DEFAULTCXX-SAME: "-lc++" "-lc++abi" "-lunwind"
-// CHECK-V6M-DEFAULTCXX-SAME: "-lc" "-lm" "-lclang_rt.builtins-armv6m"
"--target2=rel" "-o" "a.out"
jroelofs wrote:
ISTM the more "correct" way to fix this test is to create an empty file
`libclang_rt.builtins-armv6m.a` in the fake resource dir. The folder structure
should match what you get from `clang/cmake/caches/BaremetalARM.cmake`
(assuming that cache isn't completely bit-rotten)
https://github.com/llvm/llvm-project/pull/81037
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[clang] [clang] Define SwiftInfo for RISCVTargetCodeGenInfo (PR #82152)
jroelofs wrote:
> Can this be tested? I don't know what the affects are.
Might be as simple as adding another `RUN:` line to
`clang/test/CodeGenCXX/arm-swiftcall.{c,cpp}` with a riscv triple.
https://github.com/llvm/llvm-project/pull/82152
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[clang] bad error message on incorrect string literal #18079 (PR #81670)
https://github.com/jroelofs approved this pull request. LGTM. Let me know if you need me to press the "merge" button for you. https://github.com/llvm/llvm-project/pull/81670 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -0,0 +1,5 @@
+// RUN: %clang_cc1 -E -fsyntax-only -verify %s
+
+// expected-error@+2{{invalid character ')' character in raw string delimiter;
use PREFIX( )PREFIX to delimit raw string}}
jroelofs wrote:
Before this change, the message used to say `character ')' character`. After
this change, it only says "character" once, which I think is why the test is
broken:
https://buildkite.com/llvm-project/clang-ci/builds/12188#018daa42-213c-4e50-8de0-7b27ec43dde0
https://github.com/llvm/llvm-project/pull/81670
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[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -0,0 +1,5 @@
+// RUN: %clang_cc1 -E -fsyntax-only -verify %s
+
+// expected-error@+2{{invalid character ')' character in raw string delimiter;
use PREFIX( )PREFIX to delimit raw string}}
jroelofs wrote:
This has the old spelling of that diagnostic.
Also, might be a little nicer to combine the two tests in one file, since
they're testing _almost_ the same thing.
https://github.com/llvm/llvm-project/pull/81670
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[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -2270,9 +2270,11 @@ bool Lexer::LexRawStringLiteral(Token , const
char *CurPtr,
const char *PrefixEnd = [PrefixLen];
if (PrefixLen == 16) {
Diag(PrefixEnd, diag::err_raw_delim_too_long);
- } else {
+ } else if (*PrefixEnd != '\n') {
jroelofs wrote:
couple of examples: https://clang.godbolt.org/z/161bn5d6s
https://github.com/llvm/llvm-project/pull/81670
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[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -2270,9 +2270,11 @@ bool Lexer::LexRawStringLiteral(Token , const
char *CurPtr,
const char *PrefixEnd = [PrefixLen];
if (PrefixLen == 16) {
Diag(PrefixEnd, diag::err_raw_delim_too_long);
- } else {
+ } else if (*PrefixEnd != '\n') {
jroelofs wrote:
hmmm. what happens if the line ends with `\r\n`?
https://github.com/llvm/llvm-project/pull/81670
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[clang] [clang][CodeGen] Add missing error check (PR #81777)
https://github.com/jroelofs approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/81777 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -100,7 +100,10 @@ def err_raw_delim_too_long : Error< "raw string delimiter longer than 16 characters" "; use PREFIX( )PREFIX to delimit raw string">; def err_invalid_char_raw_delim : Error< - "invalid character '%0' character in raw string delimiter" + "invalid newline character in raw string delimiter" jroelofs wrote: ```suggestion "invalid character '%0' in raw string delimiter" ``` https://github.com/llvm/llvm-project/pull/81670 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] bad error message on incorrect string literal #18079 (PR #81670)
@@ -2270,9 +2270,11 @@ bool Lexer::LexRawStringLiteral(Token , const
char *CurPtr,
const char *PrefixEnd = [PrefixLen];
if (PrefixLen == 16) {
Diag(PrefixEnd, diag::err_raw_delim_too_long);
- } else {
+ } else if (*PrefixEnd != '\n') {
jroelofs wrote:
Might make more sense to flip the condition, and swap the else-if/else cases.
https://github.com/llvm/llvm-project/pull/81670
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