r312275 - [clang-cl] Explicitly set object format to COFF in CL mode
Author: oleg Date: Thu Aug 31 13:31:30 2017 New Revision: 312275 URL: http://llvm.org/viewvc/llvm-project?rev=312275=rev Log: [clang-cl] Explicitly set object format to COFF in CL mode Summary: Currently object format is taken from the default target triple. For toolchains with a non-COFF default target this may result in an object format inappropriate for pc-windows and lead to compilation issues. For example, the default triple `aarch64-linux-elf` may produce something like `aarch64-pc-windows-msvc19.0.24215-elf` in CL mode. Clang creates `MicrosoftARM64TargetInfo` for such triple with data layout `e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128`. On the other hand, the AArch64 backend in `computeDataLayout` detects a non-COFF target and selects `e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128` as data layout for little endian. Different layouts used by clang and the backend cause an error: ``` error: backend data layout 'e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128' does not match expected target description 'e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128' ``` This can be observed on the clang's Driver/cl-pch.c test with AArch64 as a default target. This patch enforces COFF in CL mode. Reviewers: hans Reviewed By: hans Subscribers: cfe-commits, aemerson, asl, kristof.beyls Differential Revision: https://reviews.llvm.org/D37336 Modified: cfe/trunk/lib/Driver/Driver.cpp Modified: cfe/trunk/lib/Driver/Driver.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Driver.cpp?rev=312275=312274=312275=diff == --- cfe/trunk/lib/Driver/Driver.cpp (original) +++ cfe/trunk/lib/Driver/Driver.cpp Thu Aug 31 13:31:30 2017 @@ -663,6 +663,7 @@ Compilation *Driver::BuildCompilation(Ar T.setOS(llvm::Triple::Win32); T.setVendor(llvm::Triple::PC); T.setEnvironment(llvm::Triple::MSVC); +T.setObjectFormat(llvm::Triple::COFF); DefaultTargetTriple = T.str(); } if (const Arg *A = Args.getLastArg(options::OPT_target)) ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r287378 - [ARM] Fix sema check of ARM special register names
Author: oleg Date: Fri Nov 18 15:00:08 2016 New Revision: 287378 URL: http://llvm.org/viewvc/llvm-project?rev=287378=rev Log: [ARM] Fix sema check of ARM special register names Summary: This is a simple sema check patch for arguments of `__builtin_arm_rsr` and the related builtins, which currently do not allow special registers with indexes >7. Some of the possible register name formats these builtins accept are: ``` {c}p::c:c: ``` ``` o0:op1:CRn:CRm:op2 ``` where `op1` / `op2` are integers in the range [0, 7] and `CRn` / `CRm` are integers in the range [0, 15]. The current sema check does not allow `CRn` > 7 and accepts `op2` up to 15. Reviewers: LukeCheeseman, rengolin Subscribers: asl, aemerson, rengolin, cfe-commits Differential Revision: https://reviews.llvm.org/D26464 Modified: cfe/trunk/lib/Sema/SemaChecking.cpp cfe/trunk/test/Sema/aarch64-special-register.c cfe/trunk/test/Sema/arm-special-register.c Modified: cfe/trunk/lib/Sema/SemaChecking.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Sema/SemaChecking.cpp?rev=287378=287377=287378=diff == --- cfe/trunk/lib/Sema/SemaChecking.cpp (original) +++ cfe/trunk/lib/Sema/SemaChecking.cpp Fri Nov 18 15:00:08 2016 @@ -4194,7 +4194,7 @@ bool Sema::SemaBuiltinARMSpecialReg(unsi SmallVectorRanges; if (FiveFields) - Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 7, 15, 15}); + Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 15, 15, 7}); else Ranges.append({15, 7, 15}); Modified: cfe/trunk/test/Sema/aarch64-special-register.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/aarch64-special-register.c?rev=287378=287377=287378=diff == --- cfe/trunk/test/Sema/aarch64-special-register.c (original) +++ cfe/trunk/test/Sema/aarch64-special-register.c Fri Nov 18 15:00:08 2016 @@ -41,7 +41,7 @@ void wsr64_2(unsigned long v) { } unsigned rsr_2() { - return __builtin_arm_rsr("0:1:2:3:4"); + return __builtin_arm_rsr("0:1:15:15:4"); } void *rsrp_2() { @@ -49,7 +49,7 @@ void *rsrp_2() { } unsigned long rsr64_2() { - return __builtin_arm_rsr64("0:1:2:3:4"); + return __builtin_arm_rsr64("0:1:15:15:4"); } void wsr_3(unsigned v) { @@ -68,6 +68,18 @@ unsigned rsr_3() { return __builtin_arm_rsr("0:1:2"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_4() { + return __builtin_arm_rsr("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_5() { + return __builtin_arm_rsr("0:8:1:2:3"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_6() { + return __builtin_arm_rsr("0:1:16:16:2"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_3() { return __builtin_arm_rsrp("0:1:2"); //expected-error {{invalid special register for builtin}} } @@ -75,3 +87,15 @@ void *rsrp_3() { unsigned long rsr64_3() { return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}} } + +unsigned long rsr64_4() { + return __builtin_arm_rsr64("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_5() { + return __builtin_arm_rsr64("0:8:2:3:4"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_6() { + return __builtin_arm_rsr64("0:1:16:16:2"); //expected-error {{invalid special register for builtin}} +} Modified: cfe/trunk/test/Sema/arm-special-register.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/arm-special-register.c?rev=287378=287377=287378=diff == --- cfe/trunk/test/Sema/arm-special-register.c (original) +++ cfe/trunk/test/Sema/arm-special-register.c Fri Nov 18 15:00:08 2016 @@ -41,7 +41,7 @@ void wsr64_2(unsigned long v) { } unsigned rsr_2() { - return __builtin_arm_rsr("cp0:1:c2:c3:4"); + return __builtin_arm_rsr("cp0:1:c15:c15:4"); } void *rsrp_2() { @@ -73,13 +73,25 @@ void *rsrp_3() { } unsigned long rsr64_3() { - return __builtin_arm_rsr64("cp0:1:c2"); + return __builtin_arm_rsr64("cp0:1:c15"); } unsigned rsr_4() { return __builtin_arm_rsr("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_5() { + return __builtin_arm_rsr("cp0:1:c2:c3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_6() { + return __builtin_arm_rsr("cp0:8:c1:c2:3"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_7() { + return __builtin_arm_rsr("cp0:1:c16:c16:2"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_4() { return __builtin_arm_rsrp("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } @@ -87,3 +99,11 @@ void *rsrp_4() { unsigned long
[PATCH] D26464: [ARM] Fix sema check of ARM special register names
iid_iunknown added a comment. In https://reviews.llvm.org/D26464#594228, @rengolin wrote: > Looks like an oversight. Aren't there any tests for this? Maybe there should > be one. Thanks Renato! I updated the tests to check the upper bounds for CRn/CRm/Op. Repository: rL LLVM https://reviews.llvm.org/D26464 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D26464: [ARM] Fix sema check of ARM special register names
iid_iunknown updated this revision to Diff 78021. iid_iunknown added a comment. Tests extended to check for more corner cases. Repository: rL LLVM https://reviews.llvm.org/D26464 Files: lib/Sema/SemaChecking.cpp test/Sema/aarch64-special-register.c test/Sema/arm-special-register.c Index: test/Sema/arm-special-register.c === --- test/Sema/arm-special-register.c +++ test/Sema/arm-special-register.c @@ -41,7 +41,7 @@ } unsigned rsr_2() { - return __builtin_arm_rsr("cp0:1:c2:c3:4"); + return __builtin_arm_rsr("cp0:1:c15:c15:4"); } void *rsrp_2() { @@ -73,17 +73,37 @@ } unsigned long rsr64_3() { - return __builtin_arm_rsr64("cp0:1:c2"); + return __builtin_arm_rsr64("cp0:1:c15"); } unsigned rsr_4() { return __builtin_arm_rsr("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_5() { + return __builtin_arm_rsr("cp0:1:c2:c3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_6() { + return __builtin_arm_rsr("cp0:8:c1:c2:3"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_7() { + return __builtin_arm_rsr("cp0:1:c16:c16:2"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_4() { return __builtin_arm_rsrp("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } unsigned long rsr64_4() { return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}} } + +unsigned long rsr64_5() { + return __builtin_arm_rsr64("cp0:8:c1"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_6() { + return __builtin_arm_rsr64("cp0:1:c16"); //expected-error {{invalid special register for builtin}} +} Index: test/Sema/aarch64-special-register.c === --- test/Sema/aarch64-special-register.c +++ test/Sema/aarch64-special-register.c @@ -41,15 +41,15 @@ } unsigned rsr_2() { - return __builtin_arm_rsr("0:1:2:3:4"); + return __builtin_arm_rsr("0:1:15:15:4"); } void *rsrp_2() { return __builtin_arm_rsrp("0:1:2:3:4"); } unsigned long rsr64_2() { - return __builtin_arm_rsr64("0:1:2:3:4"); + return __builtin_arm_rsr64("0:1:15:15:4"); } void wsr_3(unsigned v) { @@ -68,10 +68,34 @@ return __builtin_arm_rsr("0:1:2"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_4() { + return __builtin_arm_rsr("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_5() { + return __builtin_arm_rsr("0:8:1:2:3"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_6() { + return __builtin_arm_rsr("0:1:16:16:2"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_3() { return __builtin_arm_rsrp("0:1:2"); //expected-error {{invalid special register for builtin}} } unsigned long rsr64_3() { return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}} } + +unsigned long rsr64_4() { + return __builtin_arm_rsr64("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_5() { + return __builtin_arm_rsr64("0:8:2:3:4"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_6() { + return __builtin_arm_rsr64("0:1:16:16:2"); //expected-error {{invalid special register for builtin}} +} Index: lib/Sema/SemaChecking.cpp === --- lib/Sema/SemaChecking.cpp +++ lib/Sema/SemaChecking.cpp @@ -4191,7 +4191,7 @@ SmallVectorRanges; if (FiveFields) - Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 7, 15, 15}); + Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 15, 15, 7}); else Ranges.append({15, 7, 15}); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D26464: [ARM] Fix sema check of ARM special register names
iid_iunknown updated this revision to Diff 78019. iid_iunknown added a comment. Tests added. Repository: rL LLVM https://reviews.llvm.org/D26464 Files: lib/Sema/SemaChecking.cpp test/Sema/aarch64-special-register.c test/Sema/arm-special-register.c Index: test/Sema/arm-special-register.c === --- test/Sema/arm-special-register.c +++ test/Sema/arm-special-register.c @@ -41,7 +41,7 @@ } unsigned rsr_2() { - return __builtin_arm_rsr("cp0:1:c2:c3:4"); + return __builtin_arm_rsr("cp0:1:c15:c15:4"); } void *rsrp_2() { @@ -73,17 +73,29 @@ } unsigned long rsr64_3() { - return __builtin_arm_rsr64("cp0:1:c2"); + return __builtin_arm_rsr64("cp0:1:c15"); } unsigned rsr_4() { return __builtin_arm_rsr("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_5() { + return __builtin_arm_rsr("cp0:1:c2:c3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_6() { + return __builtin_arm_rsr("cp0:8:c1:c2:3"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_4() { return __builtin_arm_rsrp("0:1:2:3:4"); //expected-error {{invalid special register for builtin}} } unsigned long rsr64_4() { return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}} } + +unsigned long rsr64_5() { + return __builtin_arm_rsr64("cp0:8:c1"); //expected-error {{invalid special register for builtin}} +} Index: test/Sema/aarch64-special-register.c === --- test/Sema/aarch64-special-register.c +++ test/Sema/aarch64-special-register.c @@ -41,15 +41,15 @@ } unsigned rsr_2() { - return __builtin_arm_rsr("0:1:2:3:4"); + return __builtin_arm_rsr("0:1:15:15:4"); } void *rsrp_2() { return __builtin_arm_rsrp("0:1:2:3:4"); } unsigned long rsr64_2() { - return __builtin_arm_rsr64("0:1:2:3:4"); + return __builtin_arm_rsr64("0:1:15:15:4"); } void wsr_3(unsigned v) { @@ -68,10 +68,26 @@ return __builtin_arm_rsr("0:1:2"); //expected-error {{invalid special register for builtin}} } +unsigned rsr_4() { + return __builtin_arm_rsr("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned rsr_5() { + return __builtin_arm_rsr("0:8:1:2:3"); //expected-error {{invalid special register for builtin}} +} + void *rsrp_3() { return __builtin_arm_rsrp("0:1:2"); //expected-error {{invalid special register for builtin}} } unsigned long rsr64_3() { return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}} } + +unsigned long rsr64_4() { + return __builtin_arm_rsr64("0:1:2:3:8"); //expected-error {{invalid special register for builtin}} +} + +unsigned long rsr64_5() { + return __builtin_arm_rsr64("0:8:2:3:4"); //expected-error {{invalid special register for builtin}} +} Index: lib/Sema/SemaChecking.cpp === --- lib/Sema/SemaChecking.cpp +++ lib/Sema/SemaChecking.cpp @@ -4191,7 +4191,7 @@ SmallVectorRanges; if (FiveFields) - Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 7, 15, 15}); + Ranges.append({IsAArch64Builtin ? 1 : 15, 7, 15, 15, 7}); else Ranges.append({15, 7, 15}); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxx] r282446 - [libc++] Fix typos causing compilation errors when _LIBCPP_DEBUG_LEVEL >= 2
Author: oleg Date: Mon Sep 26 16:39:38 2016 New Revision: 282446 URL: http://llvm.org/viewvc/llvm-project?rev=282446=rev Log: [libc++] Fix typos causing compilation errors when _LIBCPP_DEBUG_LEVEL >= 2 Summary: This patch fixes a couple of typos that cause compilation errors when application includes and enables the libc++'s debugging capabilities. Reviewers: EricWF Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D24883 Modified: libcxx/trunk/include/unordered_map Modified: libcxx/trunk/include/unordered_map URL: http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/unordered_map?rev=282446=282445=282446=diff == --- libcxx/trunk/include/unordered_map (original) +++ libcxx/trunk/include/unordered_map Mon Sep 26 16:39:38 2016 @@ -1012,7 +1012,7 @@ public: iterator try_emplace(const_iterator __h, const key_type& __k, _Args&&... __args) { #if _LIBCPP_DEBUG_LEVEL >= 2 -_LIBCPP_ASSERT(__get_const_db()->__find_c_from_i(&__p) == this, +_LIBCPP_ASSERT(__get_const_db()->__find_c_from_i(&__h) == this, "unordered_map::try_emplace(const_iterator, key, args...) called with an iterator not" " referring to this unordered_map"); #endif @@ -1024,7 +1024,7 @@ public: iterator try_emplace(const_iterator __h, key_type&& __k, _Args&&... __args) { #if _LIBCPP_DEBUG_LEVEL >= 2 -_LIBCPP_ASSERT(__get_const_db()->__find_c_from_i(&__p) == this, +_LIBCPP_ASSERT(__get_const_db()->__find_c_from_i(&__h) == this, "unordered_map::try_emplace(const_iterator, key, args...) called with an iterator not" " referring to this unordered_map"); #endif ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r269419 - [CodeGen] Clang does not choose aapcs-vfp calling convention for ARM bare metal target with hard float (EABIHF)
Author: oleg Date: Fri May 13 09:45:57 2016 New Revision: 269419 URL: http://llvm.org/viewvc/llvm-project?rev=269419=rev Log: [CodeGen] Clang does not choose aapcs-vfp calling convention for ARM bare metal target with hard float (EABIHF) Summary: Clang does not detect `aapcs-vfp` for the EABIHF environment. The reason is that only GNUEABIHF is considered while choosing calling convention, EABIHF is ignored. This causes clang to use `aapcs` for EABIHF and add the `arm_aapcscc` specifier to functions in generated IR. The modified `arm-cc.c` test checks that no calling convention specifier is added to functions for EABIHF, which means the default one is used (`CallingConv::ARM_AAPCS_VFP`). Reviewers: rengolin, compnerd, t.p.northover Subscribers: aemerson, rengolin, asl, cfe-commits Differential Revision: http://reviews.llvm.org/D20219 Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp cfe/trunk/test/CodeGen/arm-cc.c Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/TargetInfo.cpp?rev=269419=269418=269419=diff == --- cfe/trunk/lib/CodeGen/TargetInfo.cpp (original) +++ cfe/trunk/lib/CodeGen/TargetInfo.cpp Fri May 13 09:45:57 2016 @@ -7878,7 +7878,8 @@ const TargetCodeGenInfo :: Kind = ARMABIInfo::AAPCS16_VFP; else if (CodeGenOpts.FloatABI == "hard" || (CodeGenOpts.FloatABI != "soft" && - Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) + (Triple.getEnvironment() == llvm::Triple::GNUEABIHF || + Triple.getEnvironment() == llvm::Triple::EABIHF))) Kind = ARMABIInfo::AAPCS_VFP; return SetCGInfo(new ARMTargetCodeGenInfo(Types, Kind)); Modified: cfe/trunk/test/CodeGen/arm-cc.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm-cc.c?rev=269419=269418=269419=diff == --- cfe/trunk/test/CodeGen/arm-cc.c (original) +++ cfe/trunk/test/CodeGen/arm-cc.c Fri May 13 09:45:57 2016 @@ -3,6 +3,7 @@ // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=DARWIN-AAPCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-APCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-AAPCS %s +// RUN: %clang_cc1 -triple armv7-none-eabihf -target-abi aapcs-vfp -emit-llvm -w -o - %s | FileCheck -check-prefix=BAREMETAL-AAPCS_VFP %s // DARWIN-APCS-LABEL: define void @f() @@ -13,6 +14,9 @@ // LINUX-APCS: call arm_apcscc void @g // LINUX-AAPCS-LABEL: define void @f() // LINUX-AAPCS: call void @g +// BAREMETAL-AAPCS_VFP-LABEL: define void @f() +// BAREMETAL-AAPCS_VFP: call void @g +// BAREMETAL-AAPCS_VFP: declare void @g() void g(void); void f(void) { g(); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D20219: [CodeGen] Clang does not choose aapcs-vfp calling convention for ARM bare metal target with hard float (EABIHF)
iid_iunknown created this revision. iid_iunknown added reviewers: rengolin, t.p.northover, compnerd. iid_iunknown added subscribers: cfe-commits, asl. iid_iunknown set the repository for this revision to rL LLVM. Herald added subscribers: rengolin, aemerson. Clang does not detect `aapcs-vfp` for the EABIHF environment. The reason is that only GNUEABIHF is considered while choosing calling convention, EABIHF is ignored. This causes clang to use `aapcs` for EABIHF and add the `arm_aapcscc` specifier to functions in generated IR. The modified `arm-cc.c` test checks that no calling convention specifier is added to functions for EABIHF, which means the default one is used (`CallingConv::ARM_AAPCS_VFP`). Repository: rL LLVM http://reviews.llvm.org/D20219 Files: lib/CodeGen/TargetInfo.cpp test/CodeGen/arm-cc.c Index: test/CodeGen/arm-cc.c === --- test/CodeGen/arm-cc.c +++ test/CodeGen/arm-cc.c @@ -3,6 +3,7 @@ // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=DARWIN-AAPCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-APCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-AAPCS %s +// RUN: %clang_cc1 -triple armv7-none-eabihf -target-abi aapcs-vfp -emit-llvm -w -o - %s | FileCheck -check-prefix=BAREMETAL-AAPCS_VFP %s // DARWIN-APCS-LABEL: define void @f() @@ -13,6 +14,9 @@ // LINUX-APCS: call arm_apcscc void @g // LINUX-AAPCS-LABEL: define void @f() // LINUX-AAPCS: call void @g +// BAREMETAL-AAPCS_VFP-LABEL: define void @f() +// BAREMETAL-AAPCS_VFP: call void @g +// BAREMETAL-AAPCS_VFP: declare void @g() void g(void); void f(void) { g(); Index: lib/CodeGen/TargetInfo.cpp === --- lib/CodeGen/TargetInfo.cpp +++ lib/CodeGen/TargetInfo.cpp @@ -7804,7 +7804,8 @@ Kind = ARMABIInfo::AAPCS16_VFP; else if (CodeGenOpts.FloatABI == "hard" || (CodeGenOpts.FloatABI != "soft" && - Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) + (Triple.getEnvironment() == llvm::Triple::GNUEABIHF || + Triple.getEnvironment() == llvm::Triple::EABIHF))) Kind = ARMABIInfo::AAPCS_VFP; return SetCGInfo(new ARMTargetCodeGenInfo(Types, Kind)); Index: test/CodeGen/arm-cc.c === --- test/CodeGen/arm-cc.c +++ test/CodeGen/arm-cc.c @@ -3,6 +3,7 @@ // RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=DARWIN-AAPCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-APCS %s // RUN: %clang_cc1 -triple arm-none-linux-gnueabi -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=LINUX-AAPCS %s +// RUN: %clang_cc1 -triple armv7-none-eabihf -target-abi aapcs-vfp -emit-llvm -w -o - %s | FileCheck -check-prefix=BAREMETAL-AAPCS_VFP %s // DARWIN-APCS-LABEL: define void @f() @@ -13,6 +14,9 @@ // LINUX-APCS: call arm_apcscc void @g // LINUX-AAPCS-LABEL: define void @f() // LINUX-AAPCS: call void @g +// BAREMETAL-AAPCS_VFP-LABEL: define void @f() +// BAREMETAL-AAPCS_VFP: call void @g +// BAREMETAL-AAPCS_VFP: declare void @g() void g(void); void f(void) { g(); Index: lib/CodeGen/TargetInfo.cpp === --- lib/CodeGen/TargetInfo.cpp +++ lib/CodeGen/TargetInfo.cpp @@ -7804,7 +7804,8 @@ Kind = ARMABIInfo::AAPCS16_VFP; else if (CodeGenOpts.FloatABI == "hard" || (CodeGenOpts.FloatABI != "soft" && - Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) + (Triple.getEnvironment() == llvm::Triple::GNUEABIHF || + Triple.getEnvironment() == llvm::Triple::EABIHF))) Kind = ARMABIInfo::AAPCS_VFP; return SetCGInfo(new ARMTargetCodeGenInfo(Types, Kind)); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r264930 - [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash
Author: oleg Date: Wed Mar 30 16:30:30 2016 New Revision: 264930 URL: http://llvm.org/viewvc/llvm-project?rev=264930=rev Log: [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash Summary: When the code is compiled for arm32 and the builtin `__va_list` declaration is created by `CreateAAPCSABIBuiltinVaListDecl`, the declaration is not saved in the `ASTContext` which may lead to a compilation error or crash. Minimal reproducer I was able to find: **header.h** ``` #include typedef va_list va_list_1; ``` **test.cpp** ``` typedef __builtin_va_list va_list_2; void foo(const char* format, ...) { va_list args; va_start( args, format ); } ``` Steps to reproduce: ``` clang -x c++-header --target=armv7l-linux-eabihf header.h clang -c -include header.h --target=armv7l-linux-eabihf test.cpp ``` Compilation error: ``` error: non-const lvalue reference to type '__builtin_va_list' cannot bind to a value of unrelated type 'va_list' (aka '__builtin_va_list') ``` Compiling the same code as a C source leads to a crash: ``` clang --target=armv7l-linux-eabihf header.h clang -c -x c -include header.h --target=armv7l-linux-eabihf test.cpp ``` Reviewers: logan, rsmith Subscribers: cfe-commits, asl, aemerson, rengolin Differential Revision: http://reviews.llvm.org/D18557 Added: cfe/trunk/test/PCH/Inputs/__va_list_tag-typedef.h cfe/trunk/test/PCH/__va_list_tag-typedef.c Modified: cfe/trunk/lib/AST/ASTContext.cpp Modified: cfe/trunk/lib/AST/ASTContext.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/AST/ASTContext.cpp?rev=264930=264929=264930=diff == --- cfe/trunk/lib/AST/ASTContext.cpp (original) +++ cfe/trunk/lib/AST/ASTContext.cpp Wed Mar 30 16:30:30 2016 @@ -6389,6 +6389,7 @@ CreateAAPCSABIBuiltinVaListDecl(const AS // }; VaListDecl->completeDefinition(); + Context->VaListTagDecl = VaListDecl; // typedef struct __va_list __builtin_va_list; QualType T = Context->getRecordType(VaListDecl); Added: cfe/trunk/test/PCH/Inputs/__va_list_tag-typedef.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/PCH/Inputs/__va_list_tag-typedef.h?rev=264930=auto == --- cfe/trunk/test/PCH/Inputs/__va_list_tag-typedef.h (added) +++ cfe/trunk/test/PCH/Inputs/__va_list_tag-typedef.h Wed Mar 30 16:30:30 2016 @@ -0,0 +1,4 @@ +// Header for PCH test __va_list_tag-typedef.c + +#include +typedef va_list va_list_1; Added: cfe/trunk/test/PCH/__va_list_tag-typedef.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/PCH/__va_list_tag-typedef.c?rev=264930=auto == --- cfe/trunk/test/PCH/__va_list_tag-typedef.c (added) +++ cfe/trunk/test/PCH/__va_list_tag-typedef.c Wed Mar 30 16:30:30 2016 @@ -0,0 +1,14 @@ +// This test checks the patch for the compilation error / crash described in D18557. + +// Test as a C source +// RUN: %clang_cc1 -emit-pch -x c-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -fsyntax-only -include-pch %t %s + +// Test as a C++ source +// RUN: %clang_cc1 -emit-pch -x c++-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -x c++ -fsyntax-only -include-pch %t %s + +// expected-no-diagnostics + +typedef __builtin_va_list va_list_2; +void test(const char* format, ...) { va_list args; va_start( args, format ); } ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D18557: [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash
iid_iunknown updated this revision to Diff 52114. iid_iunknown added a comment. The test enabled for all targets. Repository: rL LLVM http://reviews.llvm.org/D18557 Files: lib/AST/ASTContext.cpp test/PCH/Inputs/__va_list_tag-typedef.h test/PCH/__va_list_tag-typedef.c Index: test/PCH/__va_list_tag-typedef.c === --- test/PCH/__va_list_tag-typedef.c +++ test/PCH/__va_list_tag-typedef.c @@ -0,0 +1,14 @@ +// This test checks the patch for the compilation error / crash described in D18557. + +// Test as a C source +// RUN: %clang_cc1 -emit-pch -x c-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -fsyntax-only -include-pch %t %s + +// Test as a C++ source +// RUN: %clang_cc1 -emit-pch -x c++-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -x c++ -fsyntax-only -include-pch %t %s + +// expected-no-diagnostics + +typedef __builtin_va_list va_list_2; +void test(const char* format, ...) { va_list args; va_start( args, format ); } Index: test/PCH/Inputs/__va_list_tag-typedef.h === --- test/PCH/Inputs/__va_list_tag-typedef.h +++ test/PCH/Inputs/__va_list_tag-typedef.h @@ -0,0 +1,4 @@ +// Header for PCH test __va_list_tag-typedef.c + +#include +typedef va_list va_list_1; Index: lib/AST/ASTContext.cpp === --- lib/AST/ASTContext.cpp +++ lib/AST/ASTContext.cpp @@ -6389,6 +6389,7 @@ // }; VaListDecl->completeDefinition(); + Context->VaListTagDecl = VaListDecl; // typedef struct __va_list __builtin_va_list; QualType T = Context->getRecordType(VaListDecl); Index: test/PCH/__va_list_tag-typedef.c === --- test/PCH/__va_list_tag-typedef.c +++ test/PCH/__va_list_tag-typedef.c @@ -0,0 +1,14 @@ +// This test checks the patch for the compilation error / crash described in D18557. + +// Test as a C source +// RUN: %clang_cc1 -emit-pch -x c-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -fsyntax-only -include-pch %t %s + +// Test as a C++ source +// RUN: %clang_cc1 -emit-pch -x c++-header -o %t %S/Inputs/__va_list_tag-typedef.h +// RUN: %clang_cc1 -x c++ -fsyntax-only -include-pch %t %s + +// expected-no-diagnostics + +typedef __builtin_va_list va_list_2; +void test(const char* format, ...) { va_list args; va_start( args, format ); } Index: test/PCH/Inputs/__va_list_tag-typedef.h === --- test/PCH/Inputs/__va_list_tag-typedef.h +++ test/PCH/Inputs/__va_list_tag-typedef.h @@ -0,0 +1,4 @@ +// Header for PCH test __va_list_tag-typedef.c + +#include +typedef va_list va_list_1; Index: lib/AST/ASTContext.cpp === --- lib/AST/ASTContext.cpp +++ lib/AST/ASTContext.cpp @@ -6389,6 +6389,7 @@ // }; VaListDecl->completeDefinition(); + Context->VaListTagDecl = VaListDecl; // typedef struct __va_list __builtin_va_list; QualType T = Context->getRecordType(VaListDecl); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D18557: [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash
iid_iunknown marked an inline comment as done. Comment at: test/PCH/arm-__va_list_tag.c:1-7 @@ +1,8 @@ +// REQUIRES: arm-registered-target + +// This test checks the patch for the compilation error / crash described in the D18557. + +// Test as a C source +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -emit-pch -x c-header -o %t %S/Inputs/arm-__va_list_tag.h +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -fsyntax-only -include-pch %t %s + rsmith wrote: > Can we remove the triple from this test, and instead test it on the default > target for each bot? That should give us broader coverage, and let us find > out if the same bug exists for other targets too. Yes, that's a nice idea. I've updated the test. Thanks! Repository: rL LLVM http://reviews.llvm.org/D18557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D18557: [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash
iid_iunknown updated this revision to Diff 52092. iid_iunknown added a comment. Test case added. Repository: rL LLVM http://reviews.llvm.org/D18557 Files: lib/AST/ASTContext.cpp test/PCH/Inputs/arm-__va_list_tag.h test/PCH/arm-__va_list_tag.c Index: test/PCH/arm-__va_list_tag.c === --- test/PCH/arm-__va_list_tag.c +++ test/PCH/arm-__va_list_tag.c @@ -0,0 +1,16 @@ +// REQUIRES: arm-registered-target + +// This test checks the patch for the compilation error / crash described in the D18557. + +// Test as a C source +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -emit-pch -x c-header -o %t %S/Inputs/arm-__va_list_tag.h +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -fsyntax-only -include-pch %t %s + +// Test as a C++ source +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -emit-pch -x c++-header -o %t %S/Inputs/arm-__va_list_tag.h +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -x c++ -fsyntax-only -include-pch %t %s + +// expected-no-diagnostics + +typedef __builtin_va_list va_list_2; +void test(const char* format, ...) { va_list args; va_start( args, format ); } Index: test/PCH/Inputs/arm-__va_list_tag.h === --- test/PCH/Inputs/arm-__va_list_tag.h +++ test/PCH/Inputs/arm-__va_list_tag.h @@ -0,0 +1,4 @@ +// Header for PCH test arm-__va_list_tag.c + +#include +typedef va_list va_list_1; Index: lib/AST/ASTContext.cpp === --- lib/AST/ASTContext.cpp +++ lib/AST/ASTContext.cpp @@ -6389,6 +6389,7 @@ // }; VaListDecl->completeDefinition(); + Context->VaListTagDecl = VaListDecl; // typedef struct __va_list __builtin_va_list; QualType T = Context->getRecordType(VaListDecl); Index: test/PCH/arm-__va_list_tag.c === --- test/PCH/arm-__va_list_tag.c +++ test/PCH/arm-__va_list_tag.c @@ -0,0 +1,16 @@ +// REQUIRES: arm-registered-target + +// This test checks the patch for the compilation error / crash described in the D18557. + +// Test as a C source +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -emit-pch -x c-header -o %t %S/Inputs/arm-__va_list_tag.h +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -fsyntax-only -include-pch %t %s + +// Test as a C++ source +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -emit-pch -x c++-header -o %t %S/Inputs/arm-__va_list_tag.h +// RUN: %clang_cc1 -triple=armv7-linux-gnueabihf -x c++ -fsyntax-only -include-pch %t %s + +// expected-no-diagnostics + +typedef __builtin_va_list va_list_2; +void test(const char* format, ...) { va_list args; va_start( args, format ); } Index: test/PCH/Inputs/arm-__va_list_tag.h === --- test/PCH/Inputs/arm-__va_list_tag.h +++ test/PCH/Inputs/arm-__va_list_tag.h @@ -0,0 +1,4 @@ +// Header for PCH test arm-__va_list_tag.c + +#include +typedef va_list va_list_1; Index: lib/AST/ASTContext.cpp === --- lib/AST/ASTContext.cpp +++ lib/AST/ASTContext.cpp @@ -6389,6 +6389,7 @@ // }; VaListDecl->completeDefinition(); + Context->VaListTagDecl = VaListDecl; // typedef struct __va_list __builtin_va_list; QualType T = Context->getRecordType(VaListDecl); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D18557: [Clang][ARM] __va_list declaration is not saved in ASTContext causing compilation error or crash
iid_iunknown added a comment. Thank you for your remark, Richard. I added the test. Could you check if the patch is good now, please? Repository: rL LLVM http://reviews.llvm.org/D18557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D16901: [Clang driver, ARM] Do not add +long-calls in PIC mode
iid_iunknown created this revision. iid_iunknown added reviewers: asl, rengolin, t.p.northover. iid_iunknown added a subscriber: cfe-commits. iid_iunknown set the repository for this revision to rL LLVM. Herald added subscribers: rengolin, aemerson. The driver resets the PIC / PIE flags to false if compiling for kernel/kext considering the OS and its version. From ParsePICArgs(): ``` if (KernelOrKext && ((!Triple.isiOS() || Triple.isOSVersionLT(6)) && !Triple.isWatchOS())) PIC = PIE = false; ``` The condition for adding the +long-calls ARM feature in getARMTargetFeatures() is exactly the same. Since +long-calls is not applicable for PIC, both conditions should be kept synchronized, otherwise one can get not working binaries. This patch suggests to control the +long-calls option based on whether the code is PIC or not, which is a more natural way of doing this. Repository: rL LLVM http://reviews.llvm.org/D16901 Files: lib/Driver/Tools.cpp Index: lib/Driver/Tools.cpp === --- lib/Driver/Tools.cpp +++ lib/Driver/Tools.cpp @@ -755,7 +755,7 @@ const llvm::Triple , const ArgList , std::vector , - bool ForAS) { + bool IsPIC, bool ForAS) { const Driver = TC.getDriver(); bool KernelOrKext = @@ -891,8 +891,7 @@ options::OPT_mno_long_calls)) { if (A->getOption().matches(options::OPT_mlong_calls)) Features.push_back("+long-calls"); - } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) && - !Triple.isWatchOS()) { + } else if (KernelOrKext && !IsPIC) { Features.push_back("+long-calls"); } @@ -2291,7 +2290,7 @@ static void getTargetFeatures(const ToolChain , const llvm::Triple , const ArgList , ArgStringList , - bool ForAS) { + bool IsPIC, bool ForAS) { const Driver = TC.getDriver(); std::vector Features; switch (Triple.getArch()) { @@ -2308,7 +2307,7 @@ case llvm::Triple::armeb: case llvm::Triple::thumb: case llvm::Triple::thumbeb: -getARMTargetFeatures(TC, Triple, Args, Features, ForAS); +getARMTargetFeatures(TC, Triple, Args, Features, IsPIC, ForAS); break; case llvm::Triple::ppc: @@ -4047,7 +4046,7 @@ } // Add the target features - getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, false); + getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, PICLevel > 0, false); // Add target specific flags. switch (getToolChain().getArch()) { @@ -6025,7 +6024,7 @@ } // Add the target features - getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, true); + getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, /*IsPIC*/ false, true); // Ignore explicit -force_cpusubtype_ALL option. (void)Args.hasArg(options::OPT_force__cpusubtype__ALL); Index: lib/Driver/Tools.cpp === --- lib/Driver/Tools.cpp +++ lib/Driver/Tools.cpp @@ -755,7 +755,7 @@ const llvm::Triple , const ArgList , std::vector , - bool ForAS) { + bool IsPIC, bool ForAS) { const Driver = TC.getDriver(); bool KernelOrKext = @@ -891,8 +891,7 @@ options::OPT_mno_long_calls)) { if (A->getOption().matches(options::OPT_mlong_calls)) Features.push_back("+long-calls"); - } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) && - !Triple.isWatchOS()) { + } else if (KernelOrKext && !IsPIC) { Features.push_back("+long-calls"); } @@ -2291,7 +2290,7 @@ static void getTargetFeatures(const ToolChain , const llvm::Triple , const ArgList , ArgStringList , - bool ForAS) { + bool IsPIC, bool ForAS) { const Driver = TC.getDriver(); std::vector Features; switch (Triple.getArch()) { @@ -2308,7 +2307,7 @@ case llvm::Triple::armeb: case llvm::Triple::thumb: case llvm::Triple::thumbeb: -getARMTargetFeatures(TC, Triple, Args, Features, ForAS); +getARMTargetFeatures(TC, Triple, Args, Features, IsPIC, ForAS); break; case llvm::Triple::ppc: @@ -4047,7 +4046,7 @@ } // Add the target features - getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, false); + getTargetFeatures(getToolChain(), Triple, Args, CmdArgs, PICLevel > 0, false); // Add target specific flags. switch (getToolChain().getArch()) { @@ -6025,7 +6024,7 @@ } // Add the target features - getTargetFeatures(getToolChain(), Triple, Args,
r256865 - [Clang/Support/Windows/Unix] Command lines created by clang may exceed the command length limit set by the OS
Author: oleg Date: Tue Jan 5 13:54:39 2016 New Revision: 256865 URL: http://llvm.org/viewvc/llvm-project?rev=256865=rev Log: [Clang/Support/Windows/Unix] Command lines created by clang may exceed the command length limit set by the OS Summary: LLVM part of the patch is D15831. When clang runs an external tool such as a linker it may create a command line that exceeds the length limit. Clang uses the llvm::sys::argumentsFitWithinSystemLimits function to check if command line length fits the OS limitation. There are two problems in this function that may cause exceeding of the limit: 1. It ignores the length of the program path in its calculations. On the other hand, clang adds the program path to the command line when it runs the program. 2. It assumes no space character is inserted after the last argument, which is not true for Windows. The flattenArgs function adds the trailing space for *each* argument. The result of this is that the terminating NULL character is not counted and may be placed beyond the length limit if the command line is exactly 32768 characters long. The WinAPI's CreateProcess does not find the NULL character and fails. Reviewers: rafael, asl Subscribers: asl, llvm-commits Differential Revision: http://reviews.llvm.org/D15832 Modified: cfe/trunk/lib/Driver/Driver.cpp Modified: cfe/trunk/lib/Driver/Driver.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Driver/Driver.cpp?rev=256865=256864=256865=diff == --- cfe/trunk/lib/Driver/Driver.cpp (original) +++ cfe/trunk/lib/Driver/Driver.cpp Tue Jan 5 13:54:39 2016 @@ -699,11 +699,11 @@ void Driver::generateCompilationDiagnost } void Driver::setUpResponseFiles(Compilation , Command ) { - // Since argumentsFitWithinSystemLimits() may underestimate system's capacity + // Since commandLineFitsWithinSystemLimits() may underestimate system's capacity // if the tool does not support response files, there is a chance/ that things // will just work without a response file, so we silently just skip it. if (Cmd.getCreator().getResponseFilesSupport() == Tool::RF_None || - llvm::sys::argumentsFitWithinSystemLimits(Cmd.getArguments())) + llvm::sys::commandLineFitsWithinSystemLimits(Cmd.getExecutable(), Cmd.getArguments())) return; std::string TmpName = GetTemporaryPath("response", "txt"); ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits