[PATCH] D101885: [WebAssembly] Add SIMD const_splat intrinsics

2021-05-05 Thread Thomas Lively via Phabricator via cfe-commits 
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG81fce29d6e1f: [WebAssembly] Add SIMD const_splat intrinsics 
(authored by tlively).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101885/new/

https://reviews.llvm.org/D101885

Files:
  clang/lib/Headers/wasm_simd128.h
  clang/test/Headers/wasm.c

Index: clang/test/Headers/wasm.c
===
--- clang/test/Headers/wasm.c
+++ clang/test/Headers/wasm.c
@@ -386,6 +386,54 @@
   return wasm_f64x2_const(0, 1);
 }
 
+// CHECK-LABEL: @test_i8x16_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i8x16_const_splat() {
+  return wasm_i8x16_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i16x8_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i16x8_const_splat() {
+  return wasm_i16x8_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i32x4_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i32x4_const_splat() {
+  return wasm_i32x4_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i64x2_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i64x2_const_splat() {
+  return wasm_i64x2_const_splat(42);
+}
+
+// CHECK-LABEL: @test_f32x4_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_f32x4_const_splat() {
+  return wasm_f32x4_const_splat(42);
+}
+
+// CHECK-LABEL: @test_f64x2_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_f64x2_const_splat() {
+  return wasm_f64x2_const_splat(42);
+}
+
 // CHECK-LABEL: @test_i8x16_splat(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
Index: clang/lib/Headers/wasm_simd128.h
===
--- clang/lib/Headers/wasm_simd128.h
+++ clang/lib/Headers/wasm_simd128.h
@@ -229,6 +229,11 @@
   return (v128_t)(__i32x4){__c0, __c1, __c2, __c3};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
+int64_t __c1) {
+  return (v128_t)(__i64x2){__c0, __c1};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_make(float __c0,
 float __c1,
 float __c2,
@@ -236,11 +241,6 @@
   return (v128_t)(__f32x4){__c0, __c1, __c2, __c3};
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
-int64_t __c1) {
-  return (v128_t)(__i64x2){__c0, __c1};
-}
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_make(double __c0,
 double __c1) {
   return (v128_t)(__f64x2){__c0, __c1};
@@ -291,20 +291,20 @@
 (v128_t)(__i32x4){__c0, __c1, __c2, __c3}; \
   })
 
-#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   \
+#define wasm_i64x2_const(__c0, __c1)   \
   __extension__({  \
 __REQUIRE_CONSTANT(__c0);  \
 __REQUIRE_CONSTANT(__c1);  \
-__REQUIRE_CONSTANT(__c2);  \
-__REQUIRE_CONSTANT(__c3);  \
-(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; \
+(v128_t)(__i64x2){__c0, __c1}; \
   })
 
-#define wasm_i64x2_const(__c0, __c1)   \
+#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   \
   __extension__({  \
 __REQUIRE_CONSTANT(__c0);  \
 __REQUIRE_CONSTANT(__c1);  \
-(v128_t)(__i64x2){__c0, __c1}; \
+__REQUIRE_CONSTANT(__c2);  \
+__REQUIRE_CONSTANT(__c3);  \
+(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; \
   })
 
 #define wasm_f64x2_const(__c0, __c1)   \
@@ -314,6 +314,21 @@
 (v128_t)(__f64x2){__c0, __c1}; \
   })
 
+#define wasm_i8x16_const_splat(__c)\
+  wasm_i8x16_const(__c, __c, __c, __c, __c, __c, __c, __c, __c,

[PATCH] D101885: [WebAssembly] Add SIMD const_splat intrinsics

2021-05-05 Thread Thomas Lively via Phabricator via cfe-commits 
tlively created this revision.
tlively added a reviewer: aheejin.
Herald added subscribers: wingo, ecnelises, sunfish, jgravelle-google, sbc100, 
dschuff.
tlively requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

These intrinsics do not correspond to their own underlying instruction, but are
a convenience for the common case of materializing a constant vector that has
the same value in each lane.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D101885

Files:
  clang/lib/Headers/wasm_simd128.h
  clang/test/Headers/wasm.c

Index: clang/test/Headers/wasm.c
===
--- clang/test/Headers/wasm.c
+++ clang/test/Headers/wasm.c
@@ -386,6 +386,54 @@
   return wasm_f64x2_const(0, 1);
 }
 
+// CHECK-LABEL: @test_i8x16_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i8x16_const_splat() {
+  return wasm_i8x16_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i16x8_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i16x8_const_splat() {
+  return wasm_i16x8_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i32x4_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i32x4_const_splat() {
+  return wasm_i32x4_const_splat(42);
+}
+
+// CHECK-LABEL: @test_i64x2_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_i64x2_const_splat() {
+  return wasm_i64x2_const_splat(42);
+}
+
+// CHECK-LABEL: @test_f32x4_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_f32x4_const_splat() {
+  return wasm_f32x4_const_splat(42);
+}
+
+// CHECK-LABEL: @test_f64x2_const_splat(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:ret <4 x i32> 
+//
+v128_t test_f64x2_const_splat() {
+  return wasm_f64x2_const_splat(42);
+}
+
 // CHECK-LABEL: @test_i8x16_splat(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:[[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[A:%.*]], i32 0
Index: clang/lib/Headers/wasm_simd128.h
===
--- clang/lib/Headers/wasm_simd128.h
+++ clang/lib/Headers/wasm_simd128.h
@@ -229,6 +229,11 @@
   return (v128_t)(__i32x4){__c0, __c1, __c2, __c3};
 }
 
+static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
+int64_t __c1) {
+  return (v128_t)(__i64x2){__c0, __c1};
+}
+
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f32x4_make(float __c0,
 float __c1,
 float __c2,
@@ -236,11 +241,6 @@
   return (v128_t)(__f32x4){__c0, __c1, __c2, __c3};
 }
 
-static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_i64x2_make(int64_t __c0,
-int64_t __c1) {
-  return (v128_t)(__i64x2){__c0, __c1};
-}
-
 static __inline__ v128_t __DEFAULT_FN_ATTRS wasm_f64x2_make(double __c0,
 double __c1) {
   return (v128_t)(__f64x2){__c0, __c1};
@@ -291,20 +291,20 @@
 (v128_t)(__i32x4){__c0, __c1, __c2, __c3}; \
   })
 
-#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   \
+#define wasm_i64x2_const(__c0, __c1)   \
   __extension__({  \
 __REQUIRE_CONSTANT(__c0);  \
 __REQUIRE_CONSTANT(__c1);  \
-__REQUIRE_CONSTANT(__c2);  \
-__REQUIRE_CONSTANT(__c3);  \
-(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; \
+(v128_t)(__i64x2){__c0, __c1}; \
   })
 
-#define wasm_i64x2_const(__c0, __c1)   \
+#define wasm_f32x4_const(__c0, __c1, __c2, __c3)   \
   __extension__({  \
 __REQUIRE_CONSTANT(__c0);  \
 __REQUIRE_CONSTANT(__c1);  \
-(v128_t)(__i64x2){__c0, __c1}; \
+__REQUIRE_CONSTANT(__c2);  \
+__REQUIRE_CONSTANT(__c3);  \
+(v128_t)(__f32x4){__c0, __c1, __c2, __c3}; \
   })
 
 #define wasm_f64x2_const(__c0, __c1)   \
@@ -314,6 +314,21 @@
 (v128_t)(__f64x2){__c0, __c1};