[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-23 Thread Andrei Elovikov via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf5c288948844: [NFC][clang] Use X86 Features declaration from 
X86TargetParser (authored by a.elovikov).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

Files:
  clang/include/clang/Basic/X86Target.def
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  llvm/include/llvm/Support/X86TargetParser.def

Index: llvm/include/llvm/Support/X86TargetParser.def
===
--- llvm/include/llvm/Support/X86TargetParser.def
+++ llvm/include/llvm/Support/X86TargetParser.def
@@ -91,54 +91,59 @@
 X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
 #undef X86_CPU_SUBTYPE
 
-
-// This macro is used for cpu types present in compiler-rt/libgcc.
+// This macro is used for cpu types present in compiler-rt/libgcc. The third
+// parameter PRIORITY is as required by the attribute 'target' checking. Note
+// that not all are supported/prioritized by GCC, so synchronization with GCC's
+// implementation may require changing some existing values.
+//
+// We cannot just re-sort the list though because its order is dictated by the
+// order of bits in CodeGenFunction::GetX86CpuSupportsMask.
 #ifndef X86_FEATURE_COMPAT
-#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR)
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR)
 #endif
 
 #ifndef X86_FEATURE
 #define X86_FEATURE(ENUM, STR)
 #endif
 
-X86_FEATURE_COMPAT(CMOV,"cmov")
-X86_FEATURE_COMPAT(MMX, "mmx")
-X86_FEATURE_COMPAT(POPCNT,  "popcnt")
-X86_FEATURE_COMPAT(SSE, "sse")
-X86_FEATURE_COMPAT(SSE2,"sse2")
-X86_FEATURE_COMPAT(SSE3,"sse3")
-X86_FEATURE_COMPAT(SSSE3,   "ssse3")
-X86_FEATURE_COMPAT(SSE4_1,  "sse4.1")
-X86_FEATURE_COMPAT(SSE4_2,  "sse4.2")
-X86_FEATURE_COMPAT(AVX, "avx")
-X86_FEATURE_COMPAT(AVX2,"avx2")
-X86_FEATURE_COMPAT(SSE4_A,  "sse4a")
-X86_FEATURE_COMPAT(FMA4,"fma4")
-X86_FEATURE_COMPAT(XOP, "xop")
-X86_FEATURE_COMPAT(FMA, "fma")
-X86_FEATURE_COMPAT(AVX512F, "avx512f")
-X86_FEATURE_COMPAT(BMI, "bmi")
-X86_FEATURE_COMPAT(BMI2,"bmi2")
-X86_FEATURE_COMPAT(AES, "aes")
-X86_FEATURE_COMPAT(PCLMUL,  "pclmul")
-X86_FEATURE_COMPAT(AVX512VL,"avx512vl")
-X86_FEATURE_COMPAT(AVX512BW,"avx512bw")
-X86_FEATURE_COMPAT(AVX512DQ,"avx512dq")
-X86_FEATURE_COMPAT(AVX512CD,"avx512cd")
-X86_FEATURE_COMPAT(AVX512ER,"avx512er")
-X86_FEATURE_COMPAT(AVX512PF,"avx512pf")
-X86_FEATURE_COMPAT(AVX512VBMI,  "avx512vbmi")
-X86_FEATURE_COMPAT(AVX512IFMA,  "avx512ifma")
-X86_FEATURE_COMPAT(AVX5124VNNIW,"avx5124vnniw")
-X86_FEATURE_COMPAT(AVX5124FMAPS,"avx5124fmaps")
-X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq")
-X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2")
-X86_FEATURE_COMPAT(GFNI,"gfni")
-X86_FEATURE_COMPAT(VPCLMULQDQ,  "vpclmulqdq")
-X86_FEATURE_COMPAT(AVX512VNNI,  "avx512vnni")
-X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg")
-X86_FEATURE_COMPAT(AVX512BF16,  "avx512bf16")
-X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect")
+X86_FEATURE_COMPAT(CMOV,"cmov",  0)
+X86_FEATURE_COMPAT(MMX, "mmx",   1)
+X86_FEATURE_COMPAT(POPCNT,  "popcnt",9)
+X86_FEATURE_COMPAT(SSE, "sse",   2)
+X86_FEATURE_COMPAT(SSE2,"sse2",  3)
+X86_FEATURE_COMPAT(SSE3,"sse3",  4)
+X86_FEATURE_COMPAT(SSSE3,   "ssse3", 5)
+X86_FEATURE_COMPAT(SSE4_1,  "sse4.1",7)
+X86_FEATURE_COMPAT(SSE4_2,  "sse4.2",8)
+X86_FEATURE_COMPAT(AVX, "avx",   12)
+X86_FEATURE_COMPAT(AVX2,"avx2",  18)
+X86_FEATURE_COMPAT(SSE4_A,  "sse4a", 6)
+X86_FEATURE_COMPAT(FMA4,"fma4",  14)
+X86_FEATURE_COMPAT(XOP, "xop",   15)
+X86_FEATURE_COMPAT(FMA, "fma",   16)
+X86_FEATURE_COMPAT(AVX512F, "avx512f",   19)
+X86_FEATURE_COMPAT(BMI, "bmi",   13)
+X86_FEATURE_COMPAT(BMI2,"bmi2",  17)
+X86_FEATURE_COMPAT(AES, "aes",   10)
+X86_FEATURE_COMPAT(PCLMUL,  "pclmul",11)
+X86_FEATURE_COMPAT(AVX512VL,"avx512vl",  20)
+X86_FEATURE_COMPAT(AVX512BW,"avx512bw",  21)
+X86_FEATURE_COMPAT(AVX512DQ,"avx512dq",  22)

[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-23 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov updated this revision to Diff 368164.
a.elovikov added a comment.

Address Erich's comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

Files:
  clang/include/clang/Basic/X86Target.def
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  llvm/include/llvm/Support/X86TargetParser.def

Index: llvm/include/llvm/Support/X86TargetParser.def
===
--- llvm/include/llvm/Support/X86TargetParser.def
+++ llvm/include/llvm/Support/X86TargetParser.def
@@ -91,54 +91,59 @@
 X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
 #undef X86_CPU_SUBTYPE
 
-
-// This macro is used for cpu types present in compiler-rt/libgcc.
+// This macro is used for cpu types present in compiler-rt/libgcc. The third
+// parameter PRIORITY is as required by the attribute 'target' checking. Note
+// that not all are supported/prioritized by GCC, so synchronization with GCC's
+// implementation may require changing some existing values.
+//
+// We cannot just re-sort the list though because its order is dictated by the
+// order of bits in CodeGenFunction::GetX86CpuSupportsMask.
 #ifndef X86_FEATURE_COMPAT
-#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR)
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR)
 #endif
 
 #ifndef X86_FEATURE
 #define X86_FEATURE(ENUM, STR)
 #endif
 
-X86_FEATURE_COMPAT(CMOV,"cmov")
-X86_FEATURE_COMPAT(MMX, "mmx")
-X86_FEATURE_COMPAT(POPCNT,  "popcnt")
-X86_FEATURE_COMPAT(SSE, "sse")
-X86_FEATURE_COMPAT(SSE2,"sse2")
-X86_FEATURE_COMPAT(SSE3,"sse3")
-X86_FEATURE_COMPAT(SSSE3,   "ssse3")
-X86_FEATURE_COMPAT(SSE4_1,  "sse4.1")
-X86_FEATURE_COMPAT(SSE4_2,  "sse4.2")
-X86_FEATURE_COMPAT(AVX, "avx")
-X86_FEATURE_COMPAT(AVX2,"avx2")
-X86_FEATURE_COMPAT(SSE4_A,  "sse4a")
-X86_FEATURE_COMPAT(FMA4,"fma4")
-X86_FEATURE_COMPAT(XOP, "xop")
-X86_FEATURE_COMPAT(FMA, "fma")
-X86_FEATURE_COMPAT(AVX512F, "avx512f")
-X86_FEATURE_COMPAT(BMI, "bmi")
-X86_FEATURE_COMPAT(BMI2,"bmi2")
-X86_FEATURE_COMPAT(AES, "aes")
-X86_FEATURE_COMPAT(PCLMUL,  "pclmul")
-X86_FEATURE_COMPAT(AVX512VL,"avx512vl")
-X86_FEATURE_COMPAT(AVX512BW,"avx512bw")
-X86_FEATURE_COMPAT(AVX512DQ,"avx512dq")
-X86_FEATURE_COMPAT(AVX512CD,"avx512cd")
-X86_FEATURE_COMPAT(AVX512ER,"avx512er")
-X86_FEATURE_COMPAT(AVX512PF,"avx512pf")
-X86_FEATURE_COMPAT(AVX512VBMI,  "avx512vbmi")
-X86_FEATURE_COMPAT(AVX512IFMA,  "avx512ifma")
-X86_FEATURE_COMPAT(AVX5124VNNIW,"avx5124vnniw")
-X86_FEATURE_COMPAT(AVX5124FMAPS,"avx5124fmaps")
-X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq")
-X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2")
-X86_FEATURE_COMPAT(GFNI,"gfni")
-X86_FEATURE_COMPAT(VPCLMULQDQ,  "vpclmulqdq")
-X86_FEATURE_COMPAT(AVX512VNNI,  "avx512vnni")
-X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg")
-X86_FEATURE_COMPAT(AVX512BF16,  "avx512bf16")
-X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect")
+X86_FEATURE_COMPAT(CMOV,"cmov",  0)
+X86_FEATURE_COMPAT(MMX, "mmx",   1)
+X86_FEATURE_COMPAT(POPCNT,  "popcnt",9)
+X86_FEATURE_COMPAT(SSE, "sse",   2)
+X86_FEATURE_COMPAT(SSE2,"sse2",  3)
+X86_FEATURE_COMPAT(SSE3,"sse3",  4)
+X86_FEATURE_COMPAT(SSSE3,   "ssse3", 5)
+X86_FEATURE_COMPAT(SSE4_1,  "sse4.1",7)
+X86_FEATURE_COMPAT(SSE4_2,  "sse4.2",8)
+X86_FEATURE_COMPAT(AVX, "avx",   12)
+X86_FEATURE_COMPAT(AVX2,"avx2",  18)
+X86_FEATURE_COMPAT(SSE4_A,  "sse4a", 6)
+X86_FEATURE_COMPAT(FMA4,"fma4",  14)
+X86_FEATURE_COMPAT(XOP, "xop",   15)
+X86_FEATURE_COMPAT(FMA, "fma",   16)
+X86_FEATURE_COMPAT(AVX512F, "avx512f",   19)
+X86_FEATURE_COMPAT(BMI, "bmi",   13)
+X86_FEATURE_COMPAT(BMI2,"bmi2",  17)
+X86_FEATURE_COMPAT(AES, "aes",   10)
+X86_FEATURE_COMPAT(PCLMUL,  "pclmul",11)
+X86_FEATURE_COMPAT(AVX512VL,"avx512vl",  20)
+X86_FEATURE_COMPAT(AVX512BW,"avx512bw",  21)
+X86_FEATURE_COMPAT(AVX512DQ,"avx512dq",  22)
+X86_FEATURE_COMPAT(AVX512CD,"avx512cd",  23)
+X86_FEATURE_COMPAT(AVX512ER,"avx512er",  24)
+X86_FEATURE_COMPAT(AVX512PF,

[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-23 Thread Craig Topper via Phabricator via cfe-commits
craig.topper accepted this revision.
craig.topper added a comment.

LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-23 Thread Erich Keane via Phabricator via cfe-commits
erichkeane accepted this revision.
erichkeane added a comment.
This revision is now accepted and ready to land.

2 nits, give Craig a day or two to =1 as well please, particularly since he's 
the code-owner here.




Comment at: clang/lib/Basic/Targets/X86.cpp:1063
+#ifndef NDEBUG
+  // Check that priorities are set properly in the .def file, i.e.
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) PRIORITY,

Just a nit, I would like a better description here of the constraint we're 
trying to enforce.  I can imagine someone in the future failing this, and not 
getting the context without a few sentences of how no duplicates are allowed, 
and it must be all numbers from 0 to the-max-number.



Comment at: clang/lib/Basic/Targets/X86.cpp:1074
+ std::prev(std::end(Priorities))) &&
+ "Priorites don't form consecutive range!");
+#endif




Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-23 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov marked an inline comment as done.
a.elovikov added a comment.

Hi guys, do you want me to fix anything else? I think I've addressed what I 
could.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov marked 3 inline comments as done.
a.elovikov added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1071
+assert(llvm::is_contained(Priorities, Priority) &&
+   "Priorites don't form consequtive range!");
+  }

erichkeane wrote:
> erichkeane wrote:
> > craig.topper wrote:
> > > erichkeane wrote:
> > > > If all you care about is whether they are a consecutive range, why not 
> > > > just use `std::is_sorted`?
> > > The Priorities array isn't sorted. It's just whatever order the 
> > > X86_FEATURE_COMPAT lists them.
> > > 
> > > The values need to be unique and in a contiguous range.
> > Then I'd suggest something like: `llvm::sort`, then `assert *(end - 1) - 
> > *begin == std::distance(begin, end) && llvm::adjacent_find` or something.
> > 
> > I definitely didn't get that point out of this odd for-loop and 
> > is_contained.  There is perhaps at trick with std::min and std::max too.  
> > Though, it looks like this is perhaps trying to prove that the range is 0 
> > to the the array size, right?  In that case, perhaps there is something 
> > easier.
> > 
> > Also a nit, it is `consecutive` in that case.
> Actually...
> 
> std::array HelperList;
> std::iota(HelperList.begin(), HelperList.end());
> std::is_permutation(HelperList.begin(), HelperList.end(),  
> std::begin(Priorities), std::end(Priorities));
I thought about std::sort + std::iota + std::equal but wasn't sure how readable 
that would be with the extra helper object (range version isn't available in 
C++14) and hoped my version would be more compact.

Since it wasn't obvious what it does I shamelessly copied your suggestion (and 
learnt about std::is_permutation and array_lengthof when doing it).

Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov updated this revision to Diff 367640.
a.elovikov added a comment.

Apply reviewers' suggestions. Thanks!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

Files:
  clang/include/clang/Basic/X86Target.def
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  llvm/include/llvm/Support/X86TargetParser.def

Index: llvm/include/llvm/Support/X86TargetParser.def
===
--- llvm/include/llvm/Support/X86TargetParser.def
+++ llvm/include/llvm/Support/X86TargetParser.def
@@ -91,54 +91,59 @@
 X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
 #undef X86_CPU_SUBTYPE
 
-
-// This macro is used for cpu types present in compiler-rt/libgcc.
+// This macro is used for cpu types present in compiler-rt/libgcc. The third
+// parameter PRIORITY is as required by the attribute 'target' checking. Note
+// that not all are supported/prioritized by GCC, so synchronization with GCC's
+// implementation may require changing some existing values.
+//
+// We cannot just re-sort the list though because its order is dictated by the
+// order of bits in CodeGenFunction::GetX86CpuSupportsMask.
 #ifndef X86_FEATURE_COMPAT
-#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR)
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR)
 #endif
 
 #ifndef X86_FEATURE
 #define X86_FEATURE(ENUM, STR)
 #endif
 
-X86_FEATURE_COMPAT(CMOV,"cmov")
-X86_FEATURE_COMPAT(MMX, "mmx")
-X86_FEATURE_COMPAT(POPCNT,  "popcnt")
-X86_FEATURE_COMPAT(SSE, "sse")
-X86_FEATURE_COMPAT(SSE2,"sse2")
-X86_FEATURE_COMPAT(SSE3,"sse3")
-X86_FEATURE_COMPAT(SSSE3,   "ssse3")
-X86_FEATURE_COMPAT(SSE4_1,  "sse4.1")
-X86_FEATURE_COMPAT(SSE4_2,  "sse4.2")
-X86_FEATURE_COMPAT(AVX, "avx")
-X86_FEATURE_COMPAT(AVX2,"avx2")
-X86_FEATURE_COMPAT(SSE4_A,  "sse4a")
-X86_FEATURE_COMPAT(FMA4,"fma4")
-X86_FEATURE_COMPAT(XOP, "xop")
-X86_FEATURE_COMPAT(FMA, "fma")
-X86_FEATURE_COMPAT(AVX512F, "avx512f")
-X86_FEATURE_COMPAT(BMI, "bmi")
-X86_FEATURE_COMPAT(BMI2,"bmi2")
-X86_FEATURE_COMPAT(AES, "aes")
-X86_FEATURE_COMPAT(PCLMUL,  "pclmul")
-X86_FEATURE_COMPAT(AVX512VL,"avx512vl")
-X86_FEATURE_COMPAT(AVX512BW,"avx512bw")
-X86_FEATURE_COMPAT(AVX512DQ,"avx512dq")
-X86_FEATURE_COMPAT(AVX512CD,"avx512cd")
-X86_FEATURE_COMPAT(AVX512ER,"avx512er")
-X86_FEATURE_COMPAT(AVX512PF,"avx512pf")
-X86_FEATURE_COMPAT(AVX512VBMI,  "avx512vbmi")
-X86_FEATURE_COMPAT(AVX512IFMA,  "avx512ifma")
-X86_FEATURE_COMPAT(AVX5124VNNIW,"avx5124vnniw")
-X86_FEATURE_COMPAT(AVX5124FMAPS,"avx5124fmaps")
-X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq")
-X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2")
-X86_FEATURE_COMPAT(GFNI,"gfni")
-X86_FEATURE_COMPAT(VPCLMULQDQ,  "vpclmulqdq")
-X86_FEATURE_COMPAT(AVX512VNNI,  "avx512vnni")
-X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg")
-X86_FEATURE_COMPAT(AVX512BF16,  "avx512bf16")
-X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect")
+X86_FEATURE_COMPAT(CMOV,"cmov",  0)
+X86_FEATURE_COMPAT(MMX, "mmx",   1)
+X86_FEATURE_COMPAT(POPCNT,  "popcnt",9)
+X86_FEATURE_COMPAT(SSE, "sse",   2)
+X86_FEATURE_COMPAT(SSE2,"sse2",  3)
+X86_FEATURE_COMPAT(SSE3,"sse3",  4)
+X86_FEATURE_COMPAT(SSSE3,   "ssse3", 5)
+X86_FEATURE_COMPAT(SSE4_1,  "sse4.1",7)
+X86_FEATURE_COMPAT(SSE4_2,  "sse4.2",8)
+X86_FEATURE_COMPAT(AVX, "avx",   12)
+X86_FEATURE_COMPAT(AVX2,"avx2",  18)
+X86_FEATURE_COMPAT(SSE4_A,  "sse4a", 6)
+X86_FEATURE_COMPAT(FMA4,"fma4",  14)
+X86_FEATURE_COMPAT(XOP, "xop",   15)
+X86_FEATURE_COMPAT(FMA, "fma",   16)
+X86_FEATURE_COMPAT(AVX512F, "avx512f",   19)
+X86_FEATURE_COMPAT(BMI, "bmi",   13)
+X86_FEATURE_COMPAT(BMI2,"bmi2",  17)
+X86_FEATURE_COMPAT(AES, "aes",   10)
+X86_FEATURE_COMPAT(PCLMUL,  "pclmul",11)
+X86_FEATURE_COMPAT(AVX512VL,"avx512vl",  20)
+X86_FEATURE_COMPAT(AVX512BW,"avx512bw",  21)
+X86_FEATURE_COMPAT(AVX512DQ,"avx512dq",  22)
+X86_FEATURE_COMPAT(AVX512CD,"avx512cd",  23)
+X86_FEATURE_COMPAT(AVX512ER,"avx512er",  24)

[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Erich Keane via Phabricator via cfe-commits
erichkeane added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1071
+assert(llvm::is_contained(Priorities, Priority) &&
+   "Priorites don't form consequtive range!");
+  }

erichkeane wrote:
> craig.topper wrote:
> > erichkeane wrote:
> > > If all you care about is whether they are a consecutive range, why not 
> > > just use `std::is_sorted`?
> > The Priorities array isn't sorted. It's just whatever order the 
> > X86_FEATURE_COMPAT lists them.
> > 
> > The values need to be unique and in a contiguous range.
> Then I'd suggest something like: `llvm::sort`, then `assert *(end - 1) - 
> *begin == std::distance(begin, end) && llvm::adjacent_find` or something.
> 
> I definitely didn't get that point out of this odd for-loop and is_contained. 
>  There is perhaps at trick with std::min and std::max too.  Though, it looks 
> like this is perhaps trying to prove that the range is 0 to the the array 
> size, right?  In that case, perhaps there is something easier.
> 
> Also a nit, it is `consecutive` in that case.
Actually...

std::array HelperList;
std::iota(HelperList.begin(), HelperList.end());
std::is_permutation(HelperList.begin(), HelperList.end(),  
std::begin(Priorities), std::end(Priorities));


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Erich Keane via Phabricator via cfe-commits
erichkeane added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1071
+assert(llvm::is_contained(Priorities, Priority) &&
+   "Priorites don't form consequtive range!");
+  }

craig.topper wrote:
> erichkeane wrote:
> > If all you care about is whether they are a consecutive range, why not just 
> > use `std::is_sorted`?
> The Priorities array isn't sorted. It's just whatever order the 
> X86_FEATURE_COMPAT lists them.
> 
> The values need to be unique and in a contiguous range.
Then I'd suggest something like: `llvm::sort`, then `assert *(end - 1) - *begin 
== std::distance(begin, end) && llvm::adjacent_find` or something.

I definitely didn't get that point out of this odd for-loop and is_contained.  
There is perhaps at trick with std::min and std::max too.  Though, it looks 
like this is perhaps trying to prove that the range is 0 to the the array size, 
right?  In that case, perhaps there is something easier.

Also a nit, it is `consecutive` in that case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1071
+assert(llvm::is_contained(Priorities, Priority) &&
+   "Priorites don't form consequtive range!");
+  }

erichkeane wrote:
> If all you care about is whether they are a consecutive range, why not just 
> use `std::is_sorted`?
The Priorities array isn't sorted. It's just whatever order the 
X86_FEATURE_COMPAT lists them.

The values need to be unique and in a contiguous range.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Erich Keane via Phabricator via cfe-commits
erichkeane added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1071
+assert(llvm::is_contained(Priorities, Priority) &&
+   "Priorites don't form consequtive range!");
+  }

If all you care about is whether they are a consecutive range, why not just use 
`std::is_sorted`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-19 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added inline comments.



Comment at: clang/lib/Basic/Targets/X86.cpp:1061
 static unsigned getFeaturePriority(llvm::X86::ProcessorFeatures Feat) {
-  enum class FeatPriority {
-#define FEATURE(FEAT) FEAT,
-#include "clang/Basic/X86Target.def"
+  // Check that priorites are set properly in the .def file.
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) PRIORITY,

priorites -> priorities



Comment at: clang/lib/Basic/Targets/X86.cpp:1067
   };
+  (void)Priorities;
+  for (unsigned Priority = 0;

Maybe just wrap this all in #ifndef NDEBUG?



Comment at: clang/lib/Basic/Targets/X86.cpp:1069
+  for (unsigned Priority = 0;
+   Priority < sizeof(Priorities) / sizeof(unsigned) - 1; ++Priority) {
+assert(llvm::is_contained(Priorities, Priority) &&

array_lengthof(Priorities) - 1


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-16 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov updated this revision to Diff 366760.
a.elovikov added a comment.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Another version. My main goal here is to gradually move more stuff from clang/
to llvm/ so I'm open to other suggestions in doing so.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

Files:
  clang/include/clang/Basic/X86Target.def
  clang/lib/Basic/Targets/X86.cpp
  clang/lib/CodeGen/CGBuiltin.cpp
  llvm/include/llvm/Support/X86TargetParser.def

Index: llvm/include/llvm/Support/X86TargetParser.def
===
--- llvm/include/llvm/Support/X86TargetParser.def
+++ llvm/include/llvm/Support/X86TargetParser.def
@@ -91,54 +91,59 @@
 X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake")
 #undef X86_CPU_SUBTYPE
 
-
-// This macro is used for cpu types present in compiler-rt/libgcc.
+// This macro is used for cpu types present in compiler-rt/libgcc. The third
+// parameter PRIORITY is as required by the attribute 'target' checking. Note
+// that not all are supported/prioritized by GCC, so synchronization with GCC's
+// implementation may require changing some existing values.
+//
+// We cannot just re-sort the list though because its order is dictated by the
+// order of bits in CodeGenFunction::GetX86CpuSupportsMask.
 #ifndef X86_FEATURE_COMPAT
-#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR)
+#define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR)
 #endif
 
 #ifndef X86_FEATURE
 #define X86_FEATURE(ENUM, STR)
 #endif
 
-X86_FEATURE_COMPAT(CMOV,"cmov")
-X86_FEATURE_COMPAT(MMX, "mmx")
-X86_FEATURE_COMPAT(POPCNT,  "popcnt")
-X86_FEATURE_COMPAT(SSE, "sse")
-X86_FEATURE_COMPAT(SSE2,"sse2")
-X86_FEATURE_COMPAT(SSE3,"sse3")
-X86_FEATURE_COMPAT(SSSE3,   "ssse3")
-X86_FEATURE_COMPAT(SSE4_1,  "sse4.1")
-X86_FEATURE_COMPAT(SSE4_2,  "sse4.2")
-X86_FEATURE_COMPAT(AVX, "avx")
-X86_FEATURE_COMPAT(AVX2,"avx2")
-X86_FEATURE_COMPAT(SSE4_A,  "sse4a")
-X86_FEATURE_COMPAT(FMA4,"fma4")
-X86_FEATURE_COMPAT(XOP, "xop")
-X86_FEATURE_COMPAT(FMA, "fma")
-X86_FEATURE_COMPAT(AVX512F, "avx512f")
-X86_FEATURE_COMPAT(BMI, "bmi")
-X86_FEATURE_COMPAT(BMI2,"bmi2")
-X86_FEATURE_COMPAT(AES, "aes")
-X86_FEATURE_COMPAT(PCLMUL,  "pclmul")
-X86_FEATURE_COMPAT(AVX512VL,"avx512vl")
-X86_FEATURE_COMPAT(AVX512BW,"avx512bw")
-X86_FEATURE_COMPAT(AVX512DQ,"avx512dq")
-X86_FEATURE_COMPAT(AVX512CD,"avx512cd")
-X86_FEATURE_COMPAT(AVX512ER,"avx512er")
-X86_FEATURE_COMPAT(AVX512PF,"avx512pf")
-X86_FEATURE_COMPAT(AVX512VBMI,  "avx512vbmi")
-X86_FEATURE_COMPAT(AVX512IFMA,  "avx512ifma")
-X86_FEATURE_COMPAT(AVX5124VNNIW,"avx5124vnniw")
-X86_FEATURE_COMPAT(AVX5124FMAPS,"avx5124fmaps")
-X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq")
-X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2")
-X86_FEATURE_COMPAT(GFNI,"gfni")
-X86_FEATURE_COMPAT(VPCLMULQDQ,  "vpclmulqdq")
-X86_FEATURE_COMPAT(AVX512VNNI,  "avx512vnni")
-X86_FEATURE_COMPAT(AVX512BITALG,"avx512bitalg")
-X86_FEATURE_COMPAT(AVX512BF16,  "avx512bf16")
-X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect")
+X86_FEATURE_COMPAT(CMOV,"cmov",  0)
+X86_FEATURE_COMPAT(MMX, "mmx",   1)
+X86_FEATURE_COMPAT(POPCNT,  "popcnt",9)
+X86_FEATURE_COMPAT(SSE, "sse",   2)
+X86_FEATURE_COMPAT(SSE2,"sse2",  3)
+X86_FEATURE_COMPAT(SSE3,"sse3",  4)
+X86_FEATURE_COMPAT(SSSE3,   "ssse3", 5)
+X86_FEATURE_COMPAT(SSE4_1,  "sse4.1",7)
+X86_FEATURE_COMPAT(SSE4_2,  "sse4.2",8)
+X86_FEATURE_COMPAT(AVX, "avx",   12)
+X86_FEATURE_COMPAT(AVX2,"avx2",  18)
+X86_FEATURE_COMPAT(SSE4_A,  "sse4a", 6)
+X86_FEATURE_COMPAT(FMA4,"fma4",  14)
+X86_FEATURE_COMPAT(XOP, "xop",   15)
+X86_FEATURE_COMPAT(FMA, "fma",   16)
+X86_FEATURE_COMPAT(AVX512F, "avx512f",   19)
+X86_FEATURE_COMPAT(BMI, "bmi",   13)
+X86_FEATURE_COMPAT(BMI2,"bmi2",  17)
+X86_FEATURE_COMPAT(AES, "aes",   10)
+X86_FEATURE_COMPAT(PCLMUL,  "pclmul",11)
+X86_FEATURE_COMPAT(AVX512VL,"avx512vl",  20)
+X86_FEATURE_COMPAT(AVX512BW,"avx512bw",  21)
+X86_FEATURE_COMPAT(AVX512DQ,"avx512dq",

[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-16 Thread Craig Topper via Phabricator via cfe-commits
craig.topper added a comment.

The order in X86Parser.def is determined by how bits are allocated in to 
feature vector in libgcc. They're not in any priority order that I know of.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-16 Thread Erich Keane via Phabricator via cfe-commits
erichkeane added a comment.

Are these in the same order in X86TargetParser.Def?  Can we make some comment 
in that file to make sure that we keep them in the order (see comment in 
original x86Target.def)?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108151/new/

https://reviews.llvm.org/D108151

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits


[PATCH] D108151: [NFC][clang] Use X86 Features declaration from X86TargetParser

2021-08-16 Thread Andrei Elovikov via Phabricator via cfe-commits
a.elovikov created this revision.
a.elovikov added reviewers: erichkeane, craig.topper.
Herald added a subscriber: pengfei.
a.elovikov requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

...instead of redeclaring them in clang's own X86Target.def. They were already
required to be in sync (IIUC), so no reason to maintain two identical lists.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108151

Files:
  clang/include/clang/Basic/X86Target.def
  clang/lib/Basic/Targets/X86.cpp


Index: clang/lib/Basic/Targets/X86.cpp
===
--- clang/lib/Basic/Targets/X86.cpp
+++ clang/lib/Basic/Targets/X86.cpp
@@ -1057,17 +1057,13 @@
 
 static unsigned getFeaturePriority(llvm::X86::ProcessorFeatures Feat) {
   enum class FeatPriority {
-#define FEATURE(FEAT) FEAT,
-#include "clang/Basic/X86Target.def"
+#define X86_FEATURE_COMPAT(ENUM, STR) ENUM,
+#include "llvm/Support/X86TargetParser.def"
+MAX
   };
-  switch (Feat) {
-#define FEATURE(FEAT)  
\
-  case llvm::X86::FEAT:
\
-return static_cast(FeatPriority::FEAT);
-#include "clang/Basic/X86Target.def"
-  default:
-llvm_unreachable("No Feature Priority for non-CPUSupports Features");
-  }
+  assert(Feat < static_cast(FeatPriority::MAX) &&
+ "No Feature Priority for non-CPUSupports Features");
+  return static_cast(Feat);
 }
 
 unsigned X86TargetInfo::multiVersionSortPriority(StringRef Name) const {
Index: clang/include/clang/Basic/X86Target.def
===
--- clang/include/clang/Basic/X86Target.def
+++ clang/include/clang/Basic/X86Target.def
@@ -11,10 +11,6 @@
 //
 
//===--===//
 
-#ifndef FEATURE
-#define FEATURE(ENUM)
-#endif
-
 #ifndef CPU_SPECIFIC
 #define CPU_SPECIFIC(NAME, MANGLING, FEATURES)
 #endif
@@ -23,50 +19,6 @@
 #define CPU_SPECIFIC_ALIAS(NEW_NAME, NAME)
 #endif
 
-// List of CPU Supports features in order.  These need to remain in the order
-// required by attribute 'target' checking.  Note that not all are supported/
-// prioritized by GCC, so synchronization with GCC's implementation may require
-// changing some existing values.
-FEATURE(FEATURE_CMOV)
-FEATURE(FEATURE_MMX)
-FEATURE(FEATURE_SSE)
-FEATURE(FEATURE_SSE2)
-FEATURE(FEATURE_SSE3)
-FEATURE(FEATURE_SSSE3)
-FEATURE(FEATURE_SSE4_A)
-FEATURE(FEATURE_SSE4_1)
-FEATURE(FEATURE_SSE4_2)
-FEATURE(FEATURE_POPCNT)
-FEATURE(FEATURE_AES)
-FEATURE(FEATURE_PCLMUL)
-FEATURE(FEATURE_AVX)
-FEATURE(FEATURE_BMI)
-FEATURE(FEATURE_FMA4)
-FEATURE(FEATURE_XOP)
-FEATURE(FEATURE_FMA)
-FEATURE(FEATURE_BMI2)
-FEATURE(FEATURE_AVX2)
-FEATURE(FEATURE_AVX512F)
-FEATURE(FEATURE_AVX512VL)
-FEATURE(FEATURE_AVX512BW)
-FEATURE(FEATURE_AVX512DQ)
-FEATURE(FEATURE_AVX512CD)
-FEATURE(FEATURE_AVX512ER)
-FEATURE(FEATURE_AVX512PF)
-FEATURE(FEATURE_AVX512VBMI)
-FEATURE(FEATURE_AVX512IFMA)
-FEATURE(FEATURE_AVX5124VNNIW)
-FEATURE(FEATURE_AVX5124FMAPS)
-FEATURE(FEATURE_AVX512VPOPCNTDQ)
-FEATURE(FEATURE_AVX512VBMI2)
-FEATURE(FEATURE_GFNI)
-FEATURE(FEATURE_VPCLMULQDQ)
-FEATURE(FEATURE_AVX512VNNI)
-FEATURE(FEATURE_AVX512BITALG)
-FEATURE(FEATURE_AVX512BF16)
-FEATURE(FEATURE_AVX512VP2INTERSECT)
-
-
 // FIXME: When commented out features are supported in LLVM, enable them here.
 CPU_SPECIFIC("generic", 'A', "")
 CPU_SPECIFIC("pentium", 'B', "")
@@ -107,4 +59,3 @@
 #undef CPU_SPECIFIC
 #undef PROC_64_BIT
 #undef PROC_32_BIT
-#undef FEATURE


Index: clang/lib/Basic/Targets/X86.cpp
===
--- clang/lib/Basic/Targets/X86.cpp
+++ clang/lib/Basic/Targets/X86.cpp
@@ -1057,17 +1057,13 @@
 
 static unsigned getFeaturePriority(llvm::X86::ProcessorFeatures Feat) {
   enum class FeatPriority {
-#define FEATURE(FEAT) FEAT,
-#include "clang/Basic/X86Target.def"
+#define X86_FEATURE_COMPAT(ENUM, STR) ENUM,
+#include "llvm/Support/X86TargetParser.def"
+MAX
   };
-  switch (Feat) {
-#define FEATURE(FEAT)  \
-  case llvm::X86::FEAT:\
-return static_cast(FeatPriority::FEAT);
-#include "clang/Basic/X86Target.def"
-  default:
-llvm_unreachable("No Feature Priority for non-CPUSupports Features");
-  }
+  assert(Feat < static_cast(FeatPriority::MAX) &&
+ "No Feature Priority for non-CPUSupports Features");
+  return static_cast(Feat);
 }
 
 unsigned X86TargetInfo::multiVersionSortPriority(StringRef Name) const {
Index: clang/include/clang/Basic/X86Target.def
===
--- clang/include/clang/Basic/X86Target.def
+++ clang/include/clang/Basic/X86Target.def
@@ -11,10 +11,6 @@
 //