[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG840afbde48e9: [PowerPC] SemaChecking for darn family of
builtins (authored by Conanap).
Changed prior to commit:
https://reviews.llvm.org/D110282?vs=374565=374726#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110282/new/
https://reviews.llvm.org/D110282
Files:
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
clang/test/CodeGen/builtins-ppc-xlcompat-error.c
clang/test/CodeGen/builtins-ppc.c
Index: clang/test/CodeGen/builtins-ppc.c
===
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,16 +36,3 @@
// CHECK: call double @llvm.ppc.setflm(double %1)
res = __builtin_setflm(res);
}
-
-void test_builtin_ppc_darn() {
- volatile long res;
- volatile int x;
- // CHECK: call i64 @llvm.ppc.darn()
- res = __builtin_darn();
-
- // CHECK: call i64 @llvm.ppc.darnraw()
- res = __builtin_darn_raw();
-
- // CHECK: call i32 @llvm.ppc.darn32()
- x = __builtin_darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-error.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-error.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-error.c
@@ -96,6 +96,14 @@
unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) {
return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
}
+
+int test_darn() {
+ return __darn(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
+
+int test_darn_raw() {
+ return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
#endif
unsigned long test_mfspr(void) {
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
@@ -1,10 +1,13 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
-// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
@@ -15,21 +18,23 @@
// The darn class of builtins are Power 9 and up and only darn_32 works in
// 32 bit mode.
-// CHECK-LABEL: @testdarn(
-// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
-// CHECK-NEXT:ret i64 [[TMP0]]
+#ifdef __PPC64__
+// CHECK-64-LABEL: @testdarn(
+// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
+// CHECK-64-NEXT:ret i64 [[TMP0]]
//
long long testdarn(void) {
return __darn();
}
-// CHECK-LABEL: @testdarn_raw(
-// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
-// CHECK-NEXT:ret i64 [[TMP0]]
+// CHECK-64-LABEL: @testdarn_raw(
+// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
+// CHECK-64-NEXT:ret i64 [[TMP0]]
//
long long testdarn_raw(void) {
return __darn_raw();
}
+#endif
// CHECK-LABEL: @testdarn_32(
// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3295,6 +3295,8 @@
case PPC::BI__builtin_ppc_insert_exp:
case PPC::BI__builtin_ppc_extract_sig:
case PPC::BI__builtin_ppc_addex:
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
return true;
}
return false;
@@ -3478,6 +3480,11 @@
case PPC::BI__builtin_altivec_vcntmbw:
case PPC::BI__builtin_altivec_vcntmbd:
return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
+ case PPC::BI__builtin_darn_32:
+return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+diag::err_ppc_builtin_only_on_arch, "9");
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
___
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
amyk accepted this revision as: amyk. amyk added a comment. Thanks for updating the tests and description, Albion. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110282/new/ https://reviews.llvm.org/D110282 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
Conanap updated this revision to Diff 374565.
Conanap added a comment.
Moved test case back to original file and use `#ifdef __PPC64__` instead
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110282/new/
https://reviews.llvm.org/D110282
Files:
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
clang/test/CodeGen/builtins-ppc-xlcompat-error.c
clang/test/CodeGen/builtins-ppc.c
Index: clang/test/CodeGen/builtins-ppc.c
===
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,16 +36,3 @@
// CHECK: call double @llvm.ppc.setflm(double %1)
res = __builtin_setflm(res);
}
-
-void test_builtin_ppc_darn() {
- volatile long res;
- volatile int x;
- // CHECK: call i64 @llvm.ppc.darn()
- res = __builtin_darn();
-
- // CHECK: call i64 @llvm.ppc.darnraw()
- res = __builtin_darn_raw();
-
- // CHECK: call i32 @llvm.ppc.darn32()
- x = __builtin_darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-error.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-error.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-error.c
@@ -96,6 +96,14 @@
unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) {
return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
}
+
+int test_darn() {
+ return __darn(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
+
+int test_darn_raw() {
+ return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
#endif
unsigned long test_mfspr(void) {
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
@@ -1,10 +1,13 @@
// REQUIRES: powerpc-registered-target
// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
-// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | \
+// RUN:FileCheck %s --check-prefix=CHECK-64
// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
@@ -15,21 +18,23 @@
// The darn class of builtins are Power 9 and up and only darn_32 works in
// 32 bit mode.
-// CHECK-LABEL: @testdarn(
-// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
-// CHECK-NEXT:ret i64 [[TMP0]]
+#ifdef __PPC64__
+// CHECK-64-LABEL: @testdarn(
+// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
+// CHECK-64-NEXT:ret i64 [[TMP0]]
//
long long testdarn(void) {
return __darn();
}
-// CHECK-LABEL: @testdarn_raw(
-// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
-// CHECK-NEXT:ret i64 [[TMP0]]
+// CHECK-64-LABEL: @testdarn_raw(
+// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
+// CHECK-64-NEXT:ret i64 [[TMP0]]
//
long long testdarn_raw(void) {
return __darn_raw();
}
+#endif
// CHECK-LABEL: @testdarn_32(
// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3295,6 +3295,8 @@
case PPC::BI__builtin_ppc_insert_exp:
case PPC::BI__builtin_ppc_extract_sig:
case PPC::BI__builtin_ppc_addex:
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
return true;
}
return false;
@@ -3473,6 +3475,11 @@
return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
diag::err_ppc_builtin_only_on_arch, "8") ||
SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
+ case PPC::BI__builtin_darn_32:
+return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+diag::err_ppc_builtin_only_on_arch, "9");
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
___
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
amyk added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c:13
+int testdarn_32(void) {
+ return __darn_32();
+}
Conanap wrote:
> amyk wrote:
> > lei wrote:
> > > Isn't this valid for both 32 and 64bit?
> > > Maybe change one of the run lines above to a 64bit test.
> > I agree. I thought __darn_32 is both 32-bit and 64-bit.
> It is indeed valid for both 32 bit and 64 bit; there is already a runline for
> 64 bit in the `clang/test/CodeGen/builtins-ppc-xlcompat-darn.c` test case
> (which includes `__darn_32`, which is why I didn't include it here.
You removed `__darn_32` from that file, so maybe we should add it back. And
also, adjust the description of the patch to say that `__darn_32` is available
for 32 and 64-bit.
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
amyk added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c:13
+int testdarn_32(void) {
+ return __darn_32();
+}
lei wrote:
> Isn't this valid for both 32 and 64bit?
> Maybe change one of the run lines above to a 64bit test.
I agree. I thought __darn_32 is both 32-bit and 64-bit.
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
Conanap added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c:13
+int testdarn_32(void) {
+ return __darn_32();
+}
lei wrote:
> Isn't this valid for both 32 and 64bit?
> Maybe change one of the run lines above to a 64bit test.
It is indeed valid for both 32 bit and 64 bit; there is already a runline for
64 bit in the `clang/test/CodeGen/builtins-ppc-xlcompat-darn.c` test case
(which includes `__darn_32`, which is why I didn't include it here.
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
lei accepted this revision as: lei.
lei added a comment.
This revision is now accepted and ready to land.
LGTM.
Pleases address the test issue on commit.
Comment at: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c:13
+int testdarn_32(void) {
+ return __darn_32();
+}
Isn't this valid for both 32 and 64bit?
Maybe change one of the run lines above to a 64bit test.
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
Conanap updated this revision to Diff 374329.
Conanap added a comment.
Added error testing
CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D110282
Files:
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
clang/test/CodeGen/builtins-ppc-xlcompat-error.c
clang/test/CodeGen/builtins-ppc.c
Index: clang/test/CodeGen/builtins-ppc.c
===
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,16 +36,3 @@
// CHECK: call double @llvm.ppc.setflm(double %1)
res = __builtin_setflm(res);
}
-
-void test_builtin_ppc_darn() {
- volatile long res;
- volatile int x;
- // CHECK: call i64 @llvm.ppc.darn()
- res = __builtin_darn();
-
- // CHECK: call i64 @llvm.ppc.darnraw()
- res = __builtin_darn_raw();
-
- // CHECK: call i32 @llvm.ppc.darn32()
- x = __builtin_darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-error.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-error.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-error.c
@@ -96,6 +96,14 @@
unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) {
return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
}
+
+int test_darn() {
+ return __darn(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
+
+int test_darn_raw() {
+ return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}}
+}
#endif
unsigned long test_mfspr(void) {
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
@@ -5,12 +5,6 @@
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
-// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-aix \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// The darn class of builtins are Power 9 and up and only darn_32 works in
// 32 bit mode.
@@ -30,11 +24,3 @@
long long testdarn_raw(void) {
return __darn_raw();
}
-
-// CHECK-LABEL: @testdarn_32(
-// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
-// CHECK-NEXT:ret i32 [[TMP0]]
-//
-int testdarn_32(void) {
- return __darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
@@ -0,0 +1,14 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+
+// CHECK-LABEL: @testdarn_32(
+// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
+// CHECK-NEXT:ret i32 [[TMP0]]
+//
+int testdarn_32(void) {
+ return __darn_32();
+}
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3295,6 +3295,8 @@
case PPC::BI__builtin_ppc_insert_exp:
case PPC::BI__builtin_ppc_extract_sig:
case PPC::BI__builtin_ppc_addex:
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
return true;
}
return false;
@@ -3473,6 +3475,11 @@
return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
diag::err_ppc_builtin_only_on_arch, "8") ||
SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
+ case PPC::BI__builtin_darn_32:
+return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+diag::err_ppc_builtin_only_on_arch, "9");
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
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[PATCH] D110282: [PowerPC] SemaChecking for darn family of builtins
Conanap created this revision.
Conanap added reviewers: PowerPC, nemanjai, saghir, stefanp.
Conanap added projects: PowerPC, clang, LLVM.
Herald added a subscriber: kbarton.
Conanap requested review of this revision.
The `__darn` family of builtins are only available on Pwr9,
and only `__darn_32` is available on 32 bit, while the rest
are only available on 64 bit. The patch adds sema checking
for these builtins and separate the `__darn_32`'s 32 bit
test cases.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D110282
Files:
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
clang/test/CodeGen/builtins-ppc.c
Index: clang/test/CodeGen/builtins-ppc.c
===
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,16 +36,3 @@
// CHECK: call double @llvm.ppc.setflm(double %1)
res = __builtin_setflm(res);
}
-
-void test_builtin_ppc_darn() {
- volatile long res;
- volatile int x;
- // CHECK: call i64 @llvm.ppc.darn()
- res = __builtin_darn();
-
- // CHECK: call i64 @llvm.ppc.darnraw()
- res = __builtin_darn_raw();
-
- // CHECK: call i32 @llvm.ppc.darn32()
- x = __builtin_darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
@@ -5,12 +5,6 @@
// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
-// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
-// RUN: %clang_cc1 -triple powerpc-unknown-aix \
-// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
// The darn class of builtins are Power 9 and up and only darn_32 works in
// 32 bit mode.
@@ -30,11 +24,3 @@
long long testdarn_raw(void) {
return __darn_raw();
}
-
-// CHECK-LABEL: @testdarn_32(
-// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
-// CHECK-NEXT:ret i32 [[TMP0]]
-//
-int testdarn_32(void) {
- return __darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
===
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-darn-32.c
@@ -0,0 +1,14 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
+// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:-emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
+
+// CHECK-LABEL: @testdarn_32(
+// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
+// CHECK-NEXT:ret i32 [[TMP0]]
+//
+int testdarn_32(void) {
+ return __darn_32();
+}
Index: clang/lib/Sema/SemaChecking.cpp
===
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3295,6 +3295,8 @@
case PPC::BI__builtin_ppc_insert_exp:
case PPC::BI__builtin_ppc_extract_sig:
case PPC::BI__builtin_ppc_addex:
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
return true;
}
return false;
@@ -3473,6 +3475,11 @@
return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
diag::err_ppc_builtin_only_on_arch, "8") ||
SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
+ case PPC::BI__builtin_darn:
+ case PPC::BI__builtin_darn_raw:
+ case PPC::BI__builtin_darn_32:
+return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+diag::err_ppc_builtin_only_on_arch, "9");
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
Index: clang/test/CodeGen/builtins-ppc.c
===
--- clang/test/CodeGen/builtins-ppc.c
+++ clang/test/CodeGen/builtins-ppc.c
@@ -36,16 +36,3 @@
// CHECK: call double @llvm.ppc.setflm(double %1)
res = __builtin_setflm(res);
}
-
-void test_builtin_ppc_darn() {
- volatile long res;
- volatile int x;
- // CHECK: call i64 @llvm.ppc.darn()
- res = __builtin_darn();
-
- // CHECK: call i64 @llvm.ppc.darnraw()
- res = __builtin_darn_raw();
-
- // CHECK: call i32 @llvm.ppc.darn32()
- x = __builtin_darn_32();
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
===
--- clang/test/CodeGen/builtins-ppc-xlcompat-darn.c
+++
