[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

This revision was not accepted when it landed; it landed in state "Needs 
Review".
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
kito-cheng marked an inline comment as done.
Closed by commit rG7a5cb15ea6fa: [RISCV] Lazily add RVV C intrinsics. (authored 
by kito-cheng).

Changed prior to commit:
  https://reviews.llvm.org/D111617?vs=444188=447601#toc

Repository:
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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/Sema/riscv-bad-intrinsic-pragma.c
  clang/test/Sema/riscv-intrinsic-pragma.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType.
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtensions;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = ~0U;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng marked 9 inline comments as done.
kito-cheng added a comment.

@aaron.ballman thanks for your review!




Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:400
+  // Number of fields, greater than 1 if it's segment load/store.
+  uint8_t NF;
+};

aaron.ballman wrote:
> 
That the term used in RVV spec, so I keep this as `NF` :)


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman accepted this revision.
aaron.ballman added a comment.

LGTM, only minor nits found (feel free to ignore any that you disagree with).




Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:346
 
+// RVVRequire should be sync with target features, but only
+// required features used in riscv_vector.td.





Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:362
+
+  // Overloaded intrinsic name, could be empty if it can be computed from Name
+  // e.g. vadd





Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:400
+  // Number of fields, greater than 1 if it's segment load/store.
+  uint8_t NF;
+};





Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:32
+
+// Function definition of a RVV intrinsic
+struct RVVIntrinsicDef {





Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:40
+
+  /// Mapping to which clang built-in function, e.g. __builtin_rvv_vadd
+  std::string BuiltinName;





Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:131
+namespace {
+class RISCVIntrinsicManagerImpl : public clang::sema::RISCVIntrinsicManager {
+private:

You can drop all uses of `clang::` in this file.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:181-187
+auto ProtoSeq =
+ProtoSeq2ArrayRef(Record.PrototypeIndex, Record.PrototypeLength);
+auto ProtoMaskSeq = ProtoSeq2ArrayRef(Record.MaskedPrototypeIndex,
+  Record.MaskedPrototypeLength);
+auto SuffixProto =
+ProtoSeq2ArrayRef(Record.SuffixIndex, Record.SuffixLength);
+auto OverloadedSuffixProto = 
ProtoSeq2ArrayRef(Record.OverloadedSuffixIndex,

Please don't use `auto` when the type is not spelled out in the initialization.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:307-308
+  // Skip return type, and convert RVVType to QualType for arguments.
+  for (size_t i = 1; i < SigLength; ++i)
+ArgTypes.push_back(RVVType2Qual(Context, Sigs[i]));
+





Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:63
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};




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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added a comment.

@aaron.ballman do you mind give few more look on this patch, we would like 
gather LGTM from both RISC-V folks and clang folks, thanks :)


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added a comment.

ping


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 444188.
kito-cheng added a comment.

Changes:

- Correct filename for testcases.
- Use forward declaration for llvm::raw_ostream


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/Sema/riscv-bad-intrinsic-pragma.c
  clang/test/Sema/riscv-intrinsic-pragma.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType.
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtensions;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = ~0U;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:17
 #include "llvm/ADT/StringRef.h"
+#include "llvm/Support/raw_ostream.h"
 #include 

Do we need the header or is a forward declaration enough?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.



Comment at: clang/test/Sema/riscv-bad-intrnisic-pragma.c:1
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v %s -emit-llvm -o - \
+// RUN:2>&1 | FileCheck %s

this test file name is misspelled



Comment at: clang/test/Sema/riscv-intrnisic-pragma.c:1
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -emit-llvm -o - -verify 
%s
+

test file name is misspelled


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 442431.
kito-cheng added a comment.

Changes:

Restore the patch, I just accidentally updated wrong revision here...


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/Sema/riscv-bad-intrnisic-pragma.c
  clang/test/Sema/riscv-intrnisic-pragma.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType.
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtensions;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = ~0U;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// Create all 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 442429.
kito-cheng added a comment.

Changes:

- Less invasive way to fix this issue.


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Files:
  llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
  llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir


Index: llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
===
--- llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
+++ llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
@@ -33,7 +33,7 @@
 ; CHECK-NEXT: renamable $x11 = ADDI $x0, 1
 ; CHECK-NEXT: $x12 = ADDI $x10, 768
 ; CHECK-NEXT: SD killed renamable $x11, $x12, 32 :: (store (s64) into 
%ir.1)
-; CHECK-NEXT: SD $x12, $x12, 40 :: (store (s64) into %ir.2)
+; CHECK-NEXT: SD renamable $x10, $x12, 40 :: (store (s64) into %ir.2)
 ; CHECK-NEXT: renamable $x11 = ADDI $x0, 2
 ; CHECK-NEXT: SD killed renamable $x11, killed $x12, 48 :: (store (s64) 
into %ir.3)
 ; CHECK-NEXT: PseudoRET
Index: llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
===
--- llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+++ llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
@@ -293,8 +293,15 @@
   assert((isCompressibleLoad(MI) || isCompressibleStore(MI)) &&
  "Unsupported instruction for this optimization.");
 
+  int SkipN = 0;
+
+  // Skip first operand for store instruction, it's operand for store value,
+  // it's unsafe to rename if offset is non-zero.
+  if (isCompressibleStore(MI) && OldRegImm.Imm != 0)
+SkipN = 1;
+
   // Update registers
-  for (MachineOperand  : MI.operands())
+  for (MachineOperand  : drop_begin(MI.operands(), SkipN))
 if (MO.isReg() && MO.getReg() == OldRegImm.Reg) {
   // Do not update operands that define the old register.
   //


Index: llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
===
--- llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
+++ llvm/test/CodeGen/RISCV/make-compressible-for-store-address.mir
@@ -33,7 +33,7 @@
 ; CHECK-NEXT: renamable $x11 = ADDI $x0, 1
 ; CHECK-NEXT: $x12 = ADDI $x10, 768
 ; CHECK-NEXT: SD killed renamable $x11, $x12, 32 :: (store (s64) into %ir.1)
-; CHECK-NEXT: SD $x12, $x12, 40 :: (store (s64) into %ir.2)
+; CHECK-NEXT: SD renamable $x10, $x12, 40 :: (store (s64) into %ir.2)
 ; CHECK-NEXT: renamable $x11 = ADDI $x0, 2
 ; CHECK-NEXT: SD killed renamable $x11, killed $x12, 48 :: (store (s64) into %ir.3)
 ; CHECK-NEXT: PseudoRET
Index: llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
===
--- llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+++ llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
@@ -293,8 +293,15 @@
   assert((isCompressibleLoad(MI) || isCompressibleStore(MI)) &&
  "Unsupported instruction for this optimization.");
 
+  int SkipN = 0;
+
+  // Skip first operand for store instruction, it's operand for store value,
+  // it's unsafe to rename if offset is non-zero.
+  if (isCompressibleStore(MI) && OldRegImm.Imm != 0)
+SkipN = 1;
+
   // Update registers
-  for (MachineOperand  : MI.operands())
+  for (MachineOperand  : drop_begin(MI.operands(), SkipN))
 if (MO.isReg() && MO.getReg() == OldRegImm.Reg) {
   // Do not update operands that define the old register.
   //
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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:100
+switch (Type->getElementBitwidth()) {
+case 64:
+  QT = Context.DoubleTy;

aaron.ballman wrote:
> kito-cheng wrote:
> > aaron.ballman wrote:
> > > I almost hate to ask, but... `long double`? Any of the 16-bit float types?
> > Have 16 bit floating below, but we don't support long double in our 
> > intrinsic for now, add an assertion to make sure.
> Very glad to hear about `long double`, but I was unclear on the 16-bit float, 
> I was more wondering if you need to differentiate between `Float16Ty`, 
> `BFloat16Ty`, and `HalfTy` since those will all have the same bit widths but 
> be different types.
RISC-V vector intrinsic only support `_Float16`(`Float16Ty`) for now, 
`__fp16`(`HalfTy`, `half` in OpenCL) won't support, `BFloat16Ty` will be 
another `ScalarTypeKind` like `ScalarTypeKind::BFloat`, we didn't add yet since 
we don't have any `bfloat16` instruction  in RISC-V extension now.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:637
+Out.emplace_back(Record);
+Out.back().Name = SR.Name.c_str();
+Out.back().OverloadedName = SR.OverloadedName.c_str();

frasercrmck wrote:
> I assume the compiler's able to avoid recomputing `Out.back()` multiple 
> times? We could take a reference to `Out.back()` and use that, just in case?
Checked code gen with following program, got almost same code gen:

```
#include 
struct X{
int a;
int b;
int c;
};

#ifdef BACK
void foo(std::vector ){
X x;
Out.emplace_back(x);
Out.back().a =12;
Out.back().b =23;
Out.back().c =30;
}
#else
void foo2(std::vector ){
Out.emplace_back(X());
X  = Out.back();
x.a =12;
x.b =23;
x.c =30;
}
#endif
```

But I think later one might be more readable, let me tweak that.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 442025.
kito-cheng marked 9 inline comments as done.
kito-cheng added a comment.

Changes:

- Address @frasercrmck's comment


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/Sema/riscv-bad-intrnisic-pragma.c
  clang/test/Sema/riscv-intrnisic-pragma.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType.
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtensions;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = ~0U;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// Create 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman added inline comments.



Comment at: clang/lib/Parse/ParsePragma.cpp:3963
+<< PP.getSpelling(Tok) << "riscv" << /*Expected=*/true << 
"'intrinsic'";
+return;
+  }

kito-cheng wrote:
> aaron.ballman wrote:
> > It's fine to warn on this, but then you need to eat tokens until the end of 
> > directive is found so that parsing recovery is correct. e.g.,
> > ```
> > #pragma clang riscv int i = 12;
> > ```
> > See `HandlePragmaAttribute()` for an example (though you'll look for `eod` 
> > instead of `eof`).
> Seems like it already work correctly, and I saw other HandlePragma also just 
> return? I add a testcase to make sure it work.
Ah, you're right, it's the *other* form of pragma handling that needs to do 
that dance, sorry for the noise but thank you for the additional test coverage!



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:100
+switch (Type->getElementBitwidth()) {
+case 64:
+  QT = Context.DoubleTy;

kito-cheng wrote:
> aaron.ballman wrote:
> > I almost hate to ask, but... `long double`? Any of the 16-bit float types?
> Have 16 bit floating below, but we don't support long double in our intrinsic 
> for now, add an assertion to make sure.
Very glad to hear about `long double`, but I was unclear on the 16-bit float, I 
was more wondering if you need to differentiate between `Float16Ty`, 
`BFloat16Ty`, and `HalfTy` since those will all have the same bit widths but be 
different types.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:121
+  // Transform the type to a pointer as the last step, if necessary.
+  if (Type->isPointer())
+QT = Context.getPointerType(QT);

kito-cheng wrote:
> aaron.ballman wrote:
> > Double-checking -- do you have to care about references as well?
> We don't have any references type in argument type, so we don't care about 
> that.
Excellent, thank you


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/lib/Parse/ParsePragma.cpp:3963
+<< PP.getSpelling(Tok) << "riscv" << /*Expected=*/true << 
"'intrinsic'";
+return;
+  }

aaron.ballman wrote:
> It's fine to warn on this, but then you need to eat tokens until the end of 
> directive is found so that parsing recovery is correct. e.g.,
> ```
> #pragma clang riscv int i = 12;
> ```
> See `HandlePragmaAttribute()` for an example (though you'll look for `eod` 
> instead of `eof`).
Seems like it already work correctly, and I saw other HandlePragma also just 
return? I add a testcase to make sure it work.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:100
+switch (Type->getElementBitwidth()) {
+case 64:
+  QT = Context.DoubleTy;

aaron.ballman wrote:
> I almost hate to ask, but... `long double`? Any of the 16-bit float types?
Have 16 bit floating below, but we don't support long double in our intrinsic 
for now, add an assertion to make sure.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:121
+  // Transform the type to a pointer as the last step, if necessary.
+  if (Type->isPointer())
+QT = Context.getPointerType(QT);

aaron.ballman wrote:
> Double-checking -- do you have to care about references as well?
We don't have any references type in argument type, so we don't care about that.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 441692.
kito-cheng marked 18 inline comments as done.
kito-cheng added a comment.

Changes:

- Address @aaron.ballman’s comment
  - Add 2 new testcase:
- riscv-bad-intrnisic-pragma.c
- riscv-intrnisic-pragma.c


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/Sema/riscv-bad-intrnisic-pragma.c
  clang/test/Sema/riscv-intrnisic-pragma.c
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType.
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = ~0U;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Fraser Cormack via Phabricator via cfe-commits]

frasercrmck added a comment.

Just nits from me.




Comment at: clang/include/clang/Sema/RISCVIntrinsicManager.h:9
+//
+// This file defines the RISCVIntrinsicManager, which handle RISC-V vector
+// intrinsic functions.

`handles`



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:49
+  // Index of RISCVIntrinsicManagerImpl::IntrinsicList.
+  SmallVector Indexs;
+};

`Indices` (or `Indexes`)?



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:218
+  for (int Log2LMUL = -3; Log2LMUL <= 3; Log2LMUL++) {
+if (!(Record.Log2LMULMask & (1 << (Log2LMUL + 3 {
+  continue;

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:185-186
+   
Record.OverloadedSuffixSize);
+for (int TypeRangeMaskShift = 0;
+ TypeRangeMaskShift <= static_cast(BasicType::MaxOffset);
+ ++TypeRangeMaskShift) {

aaron.ballman wrote:
> Given that we're bit twiddling with this, I'd feel more comfortable if this 
> was `unsigned int` rather than `int` (same for `BaseTypeI`).
+1



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:47
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;

Comment is plural, variable is singular.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:111
+   std::vector *SemaRecords = nullptr);
+  /// Create all intrinsics record and SemaSignatureTable from SemaRecords.
+  void createRVVIntrinsicRecord(std::vector ,

all records, plural?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:578
+
+if (SemaRecords) {
+  // Create SemaRecord

`if (!SemaRecords) continue;`? Might make things a little more readable.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:637
+Out.emplace_back(Record);
+Out.back().Name = SR.Name.c_str();
+Out.back().OverloadedName = SR.OverloadedName.c_str();

I assume the compiler's able to avoid recomputing `Out.back()` multiple times? 
We could take a reference to `Out.back()` and use that, just in case?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 441684.
kito-cheng added a comment.

Changes:

- Address @craig.topper's comment
  - Introduce RISCVIntrinsicManager.h and let it become member of Sema, that 
make sure the it won't outlive than Sema.


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/RISCVIntrinsicManager.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/Sema.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = (unsigned)-1;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// Create all 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman added a comment.

Some drive-by comments from the peanut gallery.




Comment at: clang/lib/Parse/ParsePragma.cpp:3963
+<< PP.getSpelling(Tok) << "riscv" << /*Expected=*/true << 
"'intrinsic'";
+return;
+  }

It's fine to warn on this, but then you need to eat tokens until the end of 
directive is found so that parsing recovery is correct. e.g.,
```
#pragma clang riscv int i = 12;
```
See `HandlePragmaAttribute()` for an example (though you'll look for `eod` 
instead of `eof`).



Comment at: clang/lib/Parse/ParsePragma.cpp:3971
+<< PP.getSpelling(Tok) << "riscv" << /*Expected=*/true << "'vector'";
+return;
+  }

Same here.



Comment at: clang/lib/Parse/ParsePragma.cpp:3978
+<< "clang riscv intrinsic";
+return;
+  }

And here as well.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:100
+switch (Type->getElementBitwidth()) {
+case 64:
+  QT = Context.DoubleTy;

I almost hate to ask, but... `long double`? Any of the 16-bit float types?



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:111
+break;
+  default:
+llvm_unreachable("Unhandled type.");

Might as well handle `Invalid` and then drop the `default` entirely so it's a 
fully covered switch.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:121
+  // Transform the type to a pointer as the last step, if necessary.
+  if (Type->isPointer())
+QT = Context.getPointerType(QT);

Double-checking -- do you have to care about references as well?



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:185-186
+   
Record.OverloadedSuffixSize);
+for (int TypeRangeMaskShift = 0;
+ TypeRangeMaskShift <= static_cast(BasicType::MaxOffset);
+ ++TypeRangeMaskShift) {

Given that we're bit twiddling with this, I'd feel more comfortable if this was 
`unsigned int` rather than `int` (same for `BaseTypeI`).



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:223-225
+if (!Types.hasValue()) {
+  continue;
+}





Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:227-229
+auto SuffixStr =
+RVVIntrinsic::getSuffixStr(BaseType, Log2LMUL, SuffixProto);
+auto OverloadedSuffixStr = RVVIntrinsic::getSuffixStr(

You should spell the type explicitly here instead of using `auto`.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:235-237
+bool HasMask = Record.MaskedPrototypeLength != 0;
+
+if (HasMask) {





Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:299-301
+  auto Sigs = IDef.Signature;
+  size_t SigLength = Sigs.size();
+  auto ReturnType = Sigs[0];

Spell out the types instead of using `auto`.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:322
+  SC_Extern, S.getCurFPFeatures().isFPConstrained(), false,
+  BuiltinFuncType->isFunctionProtoType());
+

No need to calculate this, we already know.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:328
+  SmallVector ParmList;
+  for (unsigned IParm = 0, e = FP->getNumParams(); IParm != e; ++IParm) {
+ParmVarDecl *Parm =

Naming style fix.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:342
+  // Setup alias to __builtin_rvv_*
+  auto  = PP.getIdentifierTable().get(IDef.BuiltinName);
+  RVVIntrinsicDecl->addAttr(

Spell out type name.



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:358
+  if (OvIItr != OverloadIntrinsics.end()) {
+auto OvIntrinsicDef = OvIItr->second;
+for (auto Index : OvIntrinsicDef.Indexs)

Spell out the type.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:41
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;





Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:74
+public:
+  static constexpr unsigned INVALID_INDEX = (unsigned)-1;
+





Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:232-237
+  for (const auto  : SemaRecords) {
+InsertToSignatureSet(SemaRecord.Prototype);
+InsertToSignatureSet(SemaRecord.MaskedPrototype);
+InsertToSignatureSet(SemaRecord.Suffix);
+InsertToSignatureSet(SemaRecord.OverloadedSuffix);
   }





Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:239-240
+
+  for (const auto  : Signatures)
+insert(Sig);
+}

Pretty sure you can go with this instead.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng marked an inline comment as done.
kito-cheng added a comment.

Oh, have one comment not address yet


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:114
   bool operator>(const PrototypeDescriptor ) const {
-return !(PD.PT <= PT && PD.VTM <= VTM && PD.TM <= TM);
+if (PD.PT != PT)
+  return PD.PT > PT;

craig.topper wrote:
> This can be written as
> 
> `return std::tie(PD.PT, PD.VTM, PD.TM) > std::tie(PT, VTM, TM);`
> 
> Though it's still surprising that PD is on the left. This is operator> but 
> the implementation looks more like operator<.
Rewrite as `operator>` and updated the use site, thank!



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:254
+  if (Signature.empty())
+return 0;
+

khchen wrote:
> Does it mean empty Signature always at 0?
> If yes,  maybe we could check the table from Index = 1 in below loop?
Actually empty signature could be indicate into any index, we have hold length 
when we emit the index. 

Add comment to mention that.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 441610.
kito-cheng marked 24 inline comments as done.
kito-cheng added a comment.

Changes:

- Address @craig.topper's comment
- Address @khchen's comment


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = (unsigned)-1;
+
+  // Create compressed signature table from SemaRecords.
+  void init(ArrayRef SemaRecords);
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// Create all intrinsics and add them to \p Out
-  void createRVVIntrinsics(std::vector> );
+  /// Create all intrinsics and add them to \p 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.



Comment at: clang/include/clang/Basic/TokenKinds.def:911
 
+// Annotation for the riscv pragma directives - #pragma clang riscv intrinsic 
..
+PRAGMA_ANNOTATION(pragma_riscv)

Why only 2 periods at the end. Should be 3 like on like 908 or in the middle of 
line 903



Comment at: clang/include/clang/Sema/Sema.h:1590
 
+  /// Indicate RVV builtin funtions enabled or not.
+  bool DeclareRVVBuiltins = false;

funtion -> functions



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:110
   }
+  bool operator==(const PrototypeDescriptor ) const {
+return !(*this != PD);

I think it's more conventional to define operator== as `PD.PT == PT && PD.VTM 
== VTM && PD.TM == TM` and operator!= as `!(*this == PD)`



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:114
   bool operator>(const PrototypeDescriptor ) const {
-return !(PD.PT <= PT && PD.VTM <= VTM && PD.TM <= TM);
+if (PD.PT != PT)
+  return PD.PT > PT;

This can be written as

`return std::tie(PD.PT, PD.VTM, PD.TM) > std::tie(PT, VTM, TM);`

Though it's still surprising that PD is on the left. This is operator> but the 
implementation looks more like operator<.



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:364
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd

"if can" -> "if it can"



Comment at: clang/include/clang/Support/RISCVVIntrinsicUtils.h:395
+
+  // Supported type, mask of BasicType
+  uint8_t TypeRangeMask;

Missing period at end of comment.



Comment at: clang/lib/Parse/ParsePragma.cpp:3960
+  IdentifierInfo *II = Tok.getIdentifierInfo();
+  if (!II || (!II->isStr("intrinsic"))) {
+PP.Diag(Tok.getLocation(), diag::warn_pragma_invalid_argument)

Drop parenthese arounds `(!II->isStr("intrinsic"))`



Comment at: clang/lib/Parse/ParsePragma.cpp:3968
+  II = Tok.getIdentifierInfo();
+  if (!II || (!II->isStr("vector"))) {
+PP.Diag(Tok.getLocation(), diag::warn_pragma_invalid_argument)

Drop parentheses around `(!II->isStr("vector"))`



Comment at: clang/lib/Sema/CMakeLists.txt:49
   SemaLookup.cpp
+  SemaRISCVVectorLookup.cpp
   SemaModule.cpp

These are supposed to be in alphabetical order



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:68
+   uint8_t Length) {
+  return ArrayRef([Index], Length);
+}

Can this use makeArrayRef?



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:117
+
+  if (Type->isConstant()) {
+QT = Context.getConstType(QT);

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:122
+  // Transform the type to a pointer as the last step, if necessary.
+  if (Type->isPointer()) {
+QT = Context.getPointerType(QT);

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:262
+
+  if (IsMask) {
+Name += "_m";

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:277
+  std::string BuiltinName = "__builtin_rvv_" + std::string(Record.Name);
+  if (IsMask) {
+BuiltinName += "_m";

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:311
+  // Skip return type, and convert RVVType to QualType for arguments.
+  for (size_t i = 1; i < SigLength; ++i) {
+ArgTypes.push_back(RVVType2Qual(Context, Sigs[i]));

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:364
+auto OvIntrinsicDef = OvIItr->second;
+for (auto Index : OvIntrinsicDef.Indexs) {
+  CreateRVVIntrinsicDecl(S, LR, II, PP, Index,

Drop curly braces



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:382
+
+  // It's not RVV intrinsics.
+  return false;

"It's not an RVV intrinsic."



Comment at: clang/lib/Sema/SemaRISCVVectorLookup.cpp:389
+   Preprocessor ) {
+  static std::unique_ptr IntrinsicManager =
+  std::make_unique(S.Context);

Should this be a member of Sema instead of a function static? 
RVVIntrinsicManager holds a reference to ASTContext but will outlive it.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:76
+
+  // Create compressed hsignature table from SemaRecords.
+  void init(const std::vector );

Is `hsignature` a typo?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:582
+  BasicType TypeRangeMask = BasicType::Unknown;
+  for (char I : TypeRange) {
+  

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen added a comment.

@craig.topper @rogfer01 - do you have other comments?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen accepted this revision.
khchen added a comment.
This revision is now accepted and ready to land.

LGTM. Other than that last comments.




Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:77
+  // Create compressed hsignature table from SemaRecords.
+  void init(const std::vector );
+

please use ArrayRef



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:110
+  void createRVVIntrinsics(std::vector> ,
+   std::vector *SemaRecords);
+  /// Create all intrinsics record and SemaSignatureTable from SemaRecords.

maybe SemaRecords could have default argument as nullptr.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:114
+SemaSignatureTable ,
+const std::vector );
+

please use ArrayRef



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:254
+  if (Signature.empty())
+return 0;
+

Does it mean empty Signature always at 0?
If yes,  maybe we could check the table from Index = 1 in below loop?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 441320.
kito-cheng added a comment.

Changes:

- Rebase
- Address @khchen's comment


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRISCVVectorLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,6 +30,59 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
+// Compressed function signature table.
+class SemaSignatureTable {
+private:
+  std::vector SignatureTable;
+
+  void insert(ArrayRef Signature);
+
+public:
+  static constexpr unsigned INVALID_INDEX = (unsigned)-1;
+
+  // Create compressed hsignature table from SemaRecords.
+  void init(const std::vector );
+
+  // Query the Signature, return INVALID_INDEX if not found.
+  unsigned getIndex(ArrayRef Signature);
+
+  /// Print signature table in RVVHeader Record to \p OS
+  void print(raw_ostream );
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
@@ -45,22 +99,22 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRISCVVectorLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
-  /// Create all intrinsics and add them to \p Out
-  void createRVVIntrinsics(std::vector> );
+  /// Create all intrinsics and add them to \p Out and SemaRecords.
+  void createRVVIntrinsics(std::vector> ,
+ 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen added inline comments.



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:175
+  for (auto  : RVVIntrinsicRecords) {
+// Create Intrinsics for each type and LMUL.
+BasicType BaseType = BasicType::Unknown;

Those code logic need to sync with createRVVIntrinsics, maybe we could add more 
comment address that.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:91
 private:
   /// Create all intrinsics and add them to \p Out
   void createRVVIntrinsics(std::vector> );

and also init SemaRecords?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:93
   void createRVVIntrinsics(std::vector> );
+  /// Create all intrinsics record from RVVIntrinsics.
+  void createRVVIntrinsicRecord(std::vector );

I think it should be "Create all intrinsics record and SemaSignatureTable from 
SemaRecords"?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:99
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs 
are
-  /// sorted by extension.
-  void emitArchMacroAndBody(
-  std::vector> , raw_ostream ,
-  std::function);
-
-  // Emit the architecture preprocessor definitions. Return true when emits
-  // non-empty string.
-  bool emitMacroRestrictionStr(RISCVPredefinedMacroT PredefinedMacros,
-   raw_ostream );
+  /// Construct a compressed signature table used for createSema.
+  void ConstructSemaSignatureTable();

/// Construct a compressed signature table from SemaRecords which is used for 
createSema.
maybe better.




Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:103
+  unsigned
+  GetSemaSignatureIndex(const SmallVector );
 };

This is ambiguous of naming and comment because it also insert signature into 
SemaSignatureTable if not found in the table.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:597
+  };
+
+  for (const auto  : SemaRecords) {

maybe we need an assert to check SemaRecords is not empty.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:637
+  std::vector RVVIntrinsicRecords;
+  createRVVIntrinsics(Defs);
+

we only need SemaRecords initialization part of createRVVIntrinsics, right?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:639
+
+  createRVVIntrinsicRecord(RVVIntrinsicRecords);
+

`createRVVIntrinsicRecord also init SemaSignatureTable implicitly.`


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:480
+// They are handled by riscv_vector.h
+if (Name == "vsetvli" || Name == "vsetvlimax")
+  continue;

khchen wrote:
> I feel little tricky to checking the name here. what do you mean they are 
> handled by riscv_vector.h?
> do you mean they have `vsetvl_macro:RVVHeader`?
Yeah, they are defined in riscv_vector.h like this:
```
#define vsetvl_e8mf8(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 5)
#define vsetvl_e8mf4(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 6)
#define vsetvl_e8mf2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 7)
#define vsetvl_e8m1(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 0)
#define vsetvl_e8m2(avl) __builtin_rvv_vsetvli((size_t)(avl), 0, 1)
...
```



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:611
+  for (const auto  : SemaRecords) {
+// Output *MUST* sync with RVVIntrinsicRecord in SemaRVVLookup.cpp.
+OS << "{"

khchen wrote:
> I'm thinking is it possible to have an unittest or test to make sure we won't 
> screw up in the future implementation?
> Is it possible to have unittest to test implement really have `sync` 
> correctly?
> Is it easy to debug the mismatch problem during implementation without any 
> new test added?
> We will add a new implementation (really cool speed up and meaningful 
> improvement), but unfortunately we don't have any tests, that make me a 
> little hesitating...
> 
> What do you think?
Change to another way to preventing sync those file manually, thanks for point 
out that!


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 431646.
kito-cheng marked 5 inline comments as done.
kito-cheng added a comment.

Changes:

- Split out several NFC changes to individual NFC patchs.
- Moving most code emission logic into RISCVVIntrinsicUtils to prevent require 
sync manually.
- PCH support is WIP, will update soon.


Repository:
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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRVVLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,10 +30,46 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required extensions for this intrinsic.
+  unsigned RequiredExtension;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
 
+  std::vector SemaRecords;
+  std::vector SemaSignatureTable;
+
 public:
   RVVEmitter(RecordKeeper ) : Records(R) {}
 
@@ -45,22 +82,25 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRVVLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
   /// Create all intrinsics and add them to \p Out
   void createRVVIntrinsics(std::vector> );
+  /// Create all intrinsics record from RVVIntrinsics.
+  void createRVVIntrinsicRecord(std::vector );
+
   /// Print HeaderCode in RVVHeader Record to \p Out
   void printHeaderCode(raw_ostream );
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs are
-  /// sorted by extension.
-  void 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen added a comment.

Do we need to have some tests in `clang/test/PCH/` for new #pragma?




Comment at: clang/lib/Sema/SemaLookup.cpp:932
+  if (DeclareRVVBuiltins) {
+if (GetRVVBuiltinInfo(*this, R, II, PP)) {
+  return true;

Don’t Use Braces on Simple Single-Statement Bodies.



Comment at: clang/lib/Support/RISCVVIntrinsicUtils.cpp:884
 RVVIntrinsic::getSuffixStr(BasicType Type, int Log2LMUL,
-   const llvm::SmallVector ) 
{
+   const llvm::ArrayRef ) {
   SmallVector SuffixStrs;

maybe this changed should be in another NFC patch.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:372
 StringRef Name = R->getValueAsString("Name");
-StringRef SuffixProto = R->getValueAsString("Suffix");
+StringRef Suffix = R->getValueAsString("Suffix");
 StringRef MangledName = R->getValueAsString("MangledName");

maybe all renaming stuffs should be in another NFC patch.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:480
+// They are handled by riscv_vector.h
+if (Name == "vsetvli" || Name == "vsetvlimax")
+  continue;

I feel little tricky to checking the name here. what do you mean they are 
handled by riscv_vector.h?
do you mean they have `vsetvl_macro:RVVHeader`?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:611
+  for (const auto  : SemaRecords) {
+// Output *MUST* sync with RVVIntrinsicRecord in SemaRVVLookup.cpp.
+OS << "{"

I'm thinking is it possible to have an unittest or test to make sure we won't 
screw up in the future implementation?
Is it possible to have unittest to test implement really have `sync` correctly?
Is it easy to debug the mismatch problem during implementation without any new 
test added?
We will add a new implementation (really cool speed up and meaningful 
improvement), but unfortunately we don't have any tests, that make me a little 
hesitating...

What do you think?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:91
+struct RVVIntrinsicDef {
+  std::string Name;
+  std::string GenericName;

khchen wrote:
> why do we need to declare Name as std::string here but RVVIntrinsicRecord use 
> `const char*`?
`RVVIntrinsicRecord::Name` is raw name of a intrinsic, `RVVIntrinsicDef::Name` 
is expanded with type infos, e.g. `RVVIntrinsicRecord::Name` is `vadd` and  
`RVVIntrinsicDef::Name` is `vadd_vv_i32m1`.



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:92
+  std::string Name;
+  std::string GenericName;
+  std::string BuiltinName;

khchen wrote:
> Nit: I think we use the `overload` terminology rather than `generic`.
Updated.



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:359-371
+  if (!Record.MangledName)
+MangledName = StringRef(Record.Name).split("_").first.str();
+  else
+MangledName = Record.MangledName;
+  if (!SuffixStr.empty())
+Name += "_" + SuffixStr.str();
+  if (!MangledSuffixStr.empty())

khchen wrote:
> IIUC, above code initialize the BuiltinName, Name and MangledName same with 
> RVVIntrinsic::RVVIntrinsic did, right?
> If yes, I think we need to have some comment note that.
More comment added.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 426285.
kito-cheng marked 2 inline comments as done.
kito-cheng added a comment.

Changes:

- Minor tweak.


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRVVLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,9 +30,48 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required target features for this intrinsic.
+  std::vector RequiredFeatures;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
+  // Concat BasicType, LMUL and Proto as key
+  StringMap LegalTypes;
+  StringSet<> IllegalTypes;
+
+  std::vector SemaRecords;
+  std::vector SemaSignatureTable;
 
 public:
   RVVEmitter(RecordKeeper ) : Records(R) {}
@@ -45,22 +85,27 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRVVLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
   /// Create all intrinsics and add them to \p Out
   void createRVVIntrinsics(std::vector> );
   /// Print HeaderCode in RVVHeader Record to \p Out
   void printHeaderCode(raw_ostream );
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs are
-  /// sorted by extension.
-  void emitArchMacroAndBody(
-  std::vector> , raw_ostream ,
-  std::function);
+  /// Construct a compressed signature table used for createSema.
+  void ConstructSemaSignatureTable();

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 426284.
kito-cheng marked 4 inline comments as done.
kito-cheng added a comment.

Changes:

- Add more comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111617/new/

https://reviews.llvm.org/D111617

Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRVVLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,9 +30,48 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  // Intrinsic name, e.g. vadd_vv
+  std::string Name;
+
+  // Overloaded intrinsic name, could be empty if can be computed from Name
+  // e.g. vadd
+  std::string OverloadedName;
+
+  // Supported type, mask of BasicType
+  unsigned TypeRangeMask;
+
+  // Supported LMUL.
+  unsigned Log2LMULMask;
+
+  // Required target features for this intrinsic.
+  std::vector RequiredFeatures;
+
+  // Prototype for this intrinsic.
+  SmallVector Prototype;
+
+  // Prototype for masked intrinsic.
+  SmallVector MaskedPrototype;
+
+  // Suffix of intrinsic name.
+  SmallVector Suffix;
+
+  // Suffix of overloaded intrinsic name.
+  SmallVector OverloadedSuffix;
+
+  // Number of field, large than 1 if it's segment load/store.
+  unsigned NF;
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
+  // Concat BasicType, LMUL and Proto as key
+  StringMap LegalTypes;
+  StringSet<> IllegalTypes;
+
+  std::vector SemaRecords;
+  std::vector SemaSignatureTable;
 
 public:
   RVVEmitter(RecordKeeper ) : Records(R) {}
@@ -45,22 +85,27 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRVVLookup.cpp.
+  /// We've large number of intrinsic function for RVV, creating a customized
+  /// could speed up the compilation time.
+  void createSema(raw_ostream );
+
 private:
   /// Create all intrinsics and add them to \p Out
   void createRVVIntrinsics(std::vector> );
   /// Print HeaderCode in RVVHeader Record to \p Out
   void printHeaderCode(raw_ostream );
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs are
-  /// sorted by extension.
-  void emitArchMacroAndBody(
-  std::vector> , raw_ostream ,
-  std::function);
+  /// Construct a compressed signature table used for createSema.
+  void 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 426281.
kito-cheng marked 2 inline comments as done.
kito-cheng added a comment.

Changes:

- Split out refactor part to D124730 .
- Add more comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111617/new/

https://reviews.llvm.org/D111617

Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/include/clang/Support/RISCVVIntrinsicUtils.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRVVLookup.cpp
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h

Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -20,6 +20,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
@@ -29,9 +30,30 @@
 using namespace clang::RISCV;
 
 namespace {
+struct SemaRecord {
+  std::string Name;
+  std::string MangledName;
+  std::string TypeRange;
+  std::vector Log2LMULList;
+  std::vector RequiredFeatures;
+
+  SmallVector ProtoSeq;
+  SmallVector ProtoMaskSeq;
+  SmallVector SuffixProto;
+  SmallVector MangledSuffixProto;
+
+  unsigned NF;
+};
+
 class RVVEmitter {
 private:
   RecordKeeper 
+  // Concat BasicType, LMUL and Proto as key
+  StringMap LegalTypes;
+  StringSet<> IllegalTypes;
+
+  std::vector SemaRecords;
+  std::vector SemaSignatureTable;
 
 public:
   RVVEmitter(RecordKeeper ) : Records(R) {}
@@ -45,22 +67,20 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaRVVLookup.cpp.
+  void createSema(raw_ostream );
+
 private:
   /// Create all intrinsics and add them to \p Out
   void createRVVIntrinsics(std::vector> );
+  unsigned GetSemaSignatureIndex(const SmallVector );
   /// Print HeaderCode in RVVHeader Record to \p Out
   void printHeaderCode(raw_ostream );
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs are
-  /// sorted by extension.
-  void emitArchMacroAndBody(
-  std::vector> , raw_ostream ,
-  std::function);
+  void ConstructSemaSignatureTable();
 
-  // Emit the architecture preprocessor definitions. Return true when emits
-  // non-empty string.
-  bool emitMacroRestrictionStr(RISCVPredefinedMacroT PredefinedMacros,
-   raw_ostream );
+  void EmitSemaRecords(raw_ostream );
+  void EmitSemaSignatureTable(raw_ostream );
 };
 
 } // namespace
@@ -174,7 +194,6 @@
 // RVVEmitter implementation
 //===--===//
 void RVVEmitter::createHeader(raw_ostream ) {
-
   OS << 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Zakk Chen via Phabricator via cfe-commits]

khchen added a comment.
Herald added a subscriber: eopXD.

It seems like not only one place need to have a consistent way to process 
intrinsic. (ex. InitIntrinsicList/createRVVIntrinsics and 
RVVIntrinsic::RVVIntrinsic/InitRVVIntrinsic)
I'm think how to avoid mismatch implementation in the future, because we will 
support a lot of new builtin with tail and mask policy...




Comment at: clang/lib/Sema/SemaRVVLookup.cpp:91
+struct RVVIntrinsicDef {
+  std::string Name;
+  std::string GenericName;

why do we need to declare Name as std::string here but RVVIntrinsicRecord use 
`const char*`?



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:92
+  std::string Name;
+  std::string GenericName;
+  std::string BuiltinName;

Nit: I think we use the `overload` terminology rather than `generic`.



Comment at: clang/lib/Sema/SemaRVVLookup.cpp:359-371
+  if (!Record.MangledName)
+MangledName = StringRef(Record.Name).split("_").first.str();
+  else
+MangledName = Record.MangledName;
+  if (!SuffixStr.empty())
+Name += "_" + SuffixStr.str();
+  if (!MangledSuffixStr.empty())

IIUC, above code initialize the BuiltinName, Name and MangledName same with 
RVVIntrinsic::RVVIntrinsic did, right?
If yes, I think we need to have some comment note that.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:143
+  /// Emit all the information needed by SemaLookup.cpp.
+  void createSema(raw_ostream );
+

It will be good to have a description about why we need to have custom 
SemaLookup.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:152
   void createRVVHeaders(raw_ostream );
+  ///
+  unsigned GetSemaSignatureIndex(const SmallVector );

missed comment?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:163
 
-  // Emit the architecture preprocessor definitions. Return true when emits
-  // non-empty string.
-  bool emitExtDefStr(uint8_t Extensions, raw_ostream );
+#if 0
   // Slice Prototypes string into sub prototype string and process each sub

Forget to remove this code?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:171
+  void EmitSemaRecords(raw_ostream );
+  void ConstructSemaSignatureTable();
+  void EmitSemaSignatureTable(raw_ostream );

Could we have comment for signature table. 
IIUC, it stores ProtoSeq, ProtoMaskSeq, SuffixProto and MangledSuffixProto 
information in each entry, and SemaRecord use the index to get the information 
from signature table, right?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:853
+
+  for (auto SemaRecord : SemaRecords) {
+InsertToSignatureSet(SemaRecord.ProtoSeq);

Use constant reference to access range-based loop?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:860
+
+  for (auto Sig : Signatures) {
+GetSemaSignatureIndex(Sig);

Don’t Use Braces on Simple Single-Statement Bodies of if/else/loop Statements.
Please check your code again.



Comment at: llvm/include/llvm/Support/RISCVVIntrinsicUtils.h:23
+
+enum RVVBasicType {
+  RVVBasicTypeUnknown = 0,

I think using typed enums is clearer because we would use TypeRangeMask to 
record supported basic types.
It should have the same type with TypeRangeMask.




Comment at: llvm/include/llvm/Support/RISCVVIntrinsicUtils.h:84
+  RVVTypeModifierLMUL1 = 1 << 6,
+  RVVTypeModifierMaskMax = RVVTypeModifierLMUL1,
+};

different naming rule and initialize way comparing to `RVVBasicTypeMaxOffset`


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added a comment.

TL;DR:
--

- Binary size of clang increase ~200k, which is +0.07%  for debug build and 
+0.13% for release build.
- Single file compilation speed up ~33x speed up for debug build and ~8.5x 
speed up for release build
- Regression time reduce ~10% (`ninja check-all`, enable all targets)

Header size change
--

 |  size | LoC |
  --
  Before | 4,434,725 |  69,749 |
  After  | 6,140 | 162 |



Single File Compilation Time


Testcase:

  #include 
  
  vint32m1_t test_vadd_vv_vfloat32m1_t(vint32m1_t op1, vint32m1_t op2, size_t 
vl) {
return vadd(op1, op2, vl);
  }

Debug build:


Before:

  real0m19.352s
  user0m19.252s
  sys 0m0.092s

After:

  real0m0.576s
  user0m0.552s
  sys 0m0.024s

~33x speed up for debug build

Release build:
--

Before:

  real0m0.773s
  user0m0.741s
  sys 0m0.032s

After:

  real0m0.092s
  user0m0.080s
  sys 0m0.012s

~8.5x speed up for release build

Regression time
---

Note: the failed case is `tools/llvm-debuginfod-find/debuginfod.test` which is 
unrelated to this patch.

Debug build
---

Before:

  Testing Time: 1358.38s
Skipped  :11
Unsupported  :   446
Passed   : 75767
Expectedly Failed:   190
Failed   : 1

After

  Testing Time: 1220.29s
Skipped  :11
Unsupported  :   446
Passed   : 75767
Expectedly Failed:   190
Failed   : 1

Release build
-

Before:

  Testing Time: 381.98s
Skipped  :12
Unsupported  :  1407
Passed   : 74765
Expectedly Failed:   176
Failed   : 1

After:

  Testing Time: 346.25s
Skipped  :12
Unsupported  :  1407
Passed   : 74765
Expectedly Failed:   176
Failed   : 1



Binary size of clang


Debug build
---

Before

 textdata bss dec hex filename
  335261851   12726004 552812 348540667   14c64efb
bin/clang

After

 textdata bss dec hex filename
  335442803   12798708 552940 348794451   14ca2e53
bin/clang

+253K, +0.07% code size

Release build
-

Before

 textdata bss dec hex filename
  144123975   8374648  483140 152981763   91e5103 bin/clang

After

 textdata bss dec hex filename
  144255762   8447296  483268 153186326   9217016 bin/clang

+204K, +0.13%


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng updated this revision to Diff 400358.
kito-cheng added a comment.
Herald added subscribers: alextsao1999, hiraditya.

Changes:

- Using different approach to implement to prevent build time explosion.
  - build time for `SemaRVVLookup.cpp` is ~6 sec in my machine.


Repository:
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CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/include/clang/Sema/Sema.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/CMakeLists.txt
  clang/lib/Sema/SemaLookup.cpp
  clang/lib/Sema/SemaRVVLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst
  llvm/include/llvm/Support/RISCVVIntrinsicUtils.h
  llvm/lib/Support/CMakeLists.txt
  llvm/lib/Support/RISCVVIntrinsicUtils.cpp

Index: llvm/lib/Support/RISCVVIntrinsicUtils.cpp
===
--- /dev/null
+++ llvm/lib/Support/RISCVVIntrinsicUtils.cpp
@@ -0,0 +1,748 @@
+//===- RISCVVIntrinsicUtils.cpp - RISC-V Vector Intrinsic Utils -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "llvm/Support/RISCVVIntrinsicUtils.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/Optional.h"
+#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/StringMap.h"
+#include "llvm/ADT/StringSet.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/ADT/Twine.h"
+#include 
+
+namespace llvm {
+namespace RISCV {
+
+LMULType::LMULType(int NewLog2LMUL) {
+  // Check Log2LMUL is -3, -2, -1, 0, 1, 2, 3
+  assert(NewLog2LMUL <= 3 && NewLog2LMUL >= -3 && "Bad LMUL number!");
+  Log2LMUL = NewLog2LMUL;
+}
+
+std::string LMULType::str() const {
+  if (Log2LMUL < 0)
+return "mf" + utostr(1ULL << (-Log2LMUL));
+  return "m" + utostr(1ULL << Log2LMUL);
+}
+
+VScaleVal LMULType::getScale(unsigned ElementBitwidth) const {
+  int Log2ScaleResult = 0;
+  switch (ElementBitwidth) {
+  default:
+break;
+  case 8:
+Log2ScaleResult = Log2LMUL + 3;
+break;
+  case 16:
+Log2ScaleResult = Log2LMUL + 2;
+break;
+  case 32:
+Log2ScaleResult = Log2LMUL + 1;
+break;
+  case 64:
+Log2ScaleResult = Log2LMUL;
+break;
+  }
+  // Illegal vscale result would be less than 1
+  if (Log2ScaleResult < 0)
+return None;
+  return 1 << Log2ScaleResult;
+}
+
+void LMULType::MulLog2LMUL(int log2LMUL) { Log2LMUL += log2LMUL; }
+
+LMULType ::operator*=(uint32_t RHS) {
+  assert(isPowerOf2_32(RHS));
+  this->Log2LMUL = this->Log2LMUL + Log2_32(RHS);
+  return *this;
+}
+
+RVVType::RVVType(RVVBasicType BT, int Log2LMUL, StringRef prototype)
+: LMUL(LMULType(Log2LMUL)) {
+  applyBasicType(BT);
+  applyModifier(prototype);
+  Valid = verifyType();
+  if (Valid) {
+initBuiltinStr();
+initTypeStr();
+if (isVector()) {
+  initClangBuiltinStr();
+}
+  }
+}
+
+StringRef RVVType::getMangledStr() {
+  if (MangledStr.empty()) {
+if (!Valid)
+  MangledStr = "invalid";
+else {
+  MangledStr = (Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+Twine(IsConstant) + Twine(ElementBitwidth))
+   .str();
+  if (!isScalar())
+MangledStr += (Twine(Scale.getValue()) + LMUL.str()).str();
+}
+  }
+
+  return MangledStr;
+}
+
+// clang-format off
+// boolean type are encoded the ratio of n (SEW/LMUL)
+// SEW/LMUL | 1 | 2 | 4 | 8| 16| 32| 64
+// c type   | vbool64_t | vbool32_t | vbool16_t | vbool8_t | vbool4_t  | vbool2_t  | vbool1_t
+// IR type  | nxv1i1| nxv2i1| nxv4i1| nxv8i1   | nxv16i1   | nxv32i1   | nxv64i1
+
+// type\lmul | 1/8| 1/4  | 1/2 | 1   | 2| 4| 8
+//   |--  |  | --- | --- |  |  | 
+// i64   | N/A| N/A  | N/A | nxv1i64 | nxv2i64  | nxv4i64  | nxv8i64
+// i32   | N/A| N/A  | nxv1i32 | nxv2i32 | nxv4i32  | nxv8i32  | nxv16i32
+// i16   | N/A| nxv1i16  | nxv2i16 | nxv4i16 | nxv8i16  | nxv16i16 | nxv32i16
+// i8| nxv1i8 | nxv2i8   | nxv4i8  | nxv8i8  | nxv16i8  | nxv32i8  | nxv64i8
+// double| N/A| N/A  | N/A | nxv1f64 | nxv2f64  | nxv4f64  | nxv8f64
+// float | N/A| N/A  | nxv1f32 | nxv2f32 | nxv4f32  | nxv8f32  | nxv16f32
+// half  | N/A| nxv1f16  | nxv2f16 | nxv4f16 | nxv8f16  | nxv16f16 | nxv32f16
+// clang-format on
+bool RVVType::verifyType() const {
+  if (ScalarType == STK_Invalid)
+return 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng commandeered this revision.
kito-cheng edited reviewers, added: HsiangKai; removed: kito-cheng.
kito-cheng added a comment.

@HsiangKai hand over this revision to me.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

In D111617#3183146 , @HsiangKai wrote:

> Release build:
> Before this patch:
>
>  text data bssdec hex
>   115471733   7987112  443760 123902605   7629a8d ./bin/clang
>
> After this patch:
>
>  text data bssdec hex
>   117568981   7996376  443760 126009117   782bf1d ./bin/clang  (+1.7%)
>
> Debug build:
> Before this patch:
>
>  text data bssdec hex
>   265437945   9544132  494152 275476229   106b6f05./bin/clang
>
> After this patch:
>
>  text data bssdec hex
>   272133359   9553380  494152 282180891   10d1bd1b
> ./bin/clang. (+2.4%)

cmake options:
Release build:

  cmake -DCMAKE_INSTALL_PREFIX=$PREFIX \
-DCMAKE_BUILD_TYPE=Release \
-DCMAKE_C_COMPILER=clang-10 \
-DCMAKE_CXX_COMPILER=clang++-10 \
-DLLVM_ENABLE_PROJECTS="clang" \
-DLLVM_PARALLEL_LINK_JOBS=8 \
-DLLVM_DEFAULT_TARGET_TRIPLE="riscv64-unknown-elf" \
-G "Ninja" $SOURCE

Debug build:

  cmake -DCMAKE_INSTALL_PREFIX=$PREFIX \
-DCMAKE_BUILD_TYPE=Debug \
-DCMAKE_C_COMPILER=clang-10 \
-DCMAKE_CXX_COMPILER=clang++-10 \
-DLLVM_ENABLE_PROJECTS="clang" \
-DLLVM_PARALLEL_LINK_JOBS=8 \
-G "Ninja" $SOURCE


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

Release build:
Before this patch:

 text data bssdec hex
  115471733   7987112  443760 123902605   7629a8d ./bin/clang

After this patch:

 text data bssdec hex
  117568981   7996376  443760 126009117   782bf1d ./bin/clang  (+1.7%)

Debug build:
Before this patch:

 text data bssdec hex
  265437945   9544132  494152 275476229   106b6f05./bin/clang

After this patch:

 text data bssdec hex
  272133359   9553380  494152 282180891   10d1bd1b./bin/clang. 
(+2.4%)


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

In D111617#3175167 , @craig.topper 
wrote:

> In D111617#3060377 , @HsiangKai 
> wrote:
>
>> Although it reduces the header size, this patch will increase the binary 
>> size of clang.
>>
>> Debug build:
>> Before this patch:
>>
>>   textdatabss dec hex
>>  filename
>>   263892591   10838284500232  275231107   1067b183   
>>  clang-14
>>
>> After this patch:
>>
>>   textdatabss dec hex
>>  filename
>>   263909721   12085116500232  276495069   107afadd   
>>  clang-14
>>
>> Release build:
>> Before this patch;
>>
>>   textdatabss dec hex
>>  filename
>>   382952171   8802976410264736481246671   1caf3dcf   
>>  clang-14
>>
>> After this patch:
>>
>>   textdatabss dec hex
>>  filename
>>   387629483   9465258210264736492546801   1d5baaf1   
>>  clang-14
>
> These number indicate the release build is larger than debug. That seems 
> wrong. Am I misreading these numbers?

Indeed, it is strange. The data is got from the first draft version. I have no 
such environment now. I could collect the clang size using the latest 
implementation.
After removing the global static constructor, there is no build time problem 
now.
So, in the latest implementation, we can get the better compile time, smaller 
clang size and acceptable build time.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added a comment.

In D111617#3060377 , @HsiangKai wrote:

> Although it reduces the header size, this patch will increase the binary size 
> of clang.
>
> Debug build:
> Before this patch:
>
>   textdatabss dec hex 
> filename
>   263892591   10838284500232  275231107   1067b183
> clang-14
>
> After this patch:
>
>   textdatabss dec hex 
> filename
>   263909721   12085116500232  276495069   107afadd
> clang-14
>
> Release build:
> Before this patch;
>
>   textdatabss dec hex 
> filename
>   382952171   8802976410264736481246671   1caf3dcf
> clang-14
>
> After this patch:
>
>   textdatabss dec hex 
> filename
>   387629483   9465258210264736492546801   1d5baaf1
> clang-14

These number indicate the release build is larger than debug. That seems wrong. 
Am I misreading these numbers?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 391948.
HsiangKai added a comment.

- Use unique_ptr.
- Avoid to create static global constructors.


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,30 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
+  std::string MangledStr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  StringRef getMangledStr() {
+if (MangledStr.empty()) {
+  if (!Valid)
+MangledStr = "invalid";
+  else {
+MangledStr =
+(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+ Twine(IsConstant) + Twine(ElementBitwidth))
+.str();
+if (!isScalar())
+  MangledStr += (Twine(Scale.getValue()) + LMUL.str()).str();
+  }
+}
+
+return MangledStr;
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +118,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
@@ -110,13 +133,15 @@
   bool isFloat(unsigned Width) const {
 return 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 390198.
HsiangKai added a comment.

Address a part of comments.


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,30 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
+  std::string MangledStr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  StringRef getMangledStr() {
+if (MangledStr.empty()) {
+  if (!Valid)
+MangledStr = "invalid";
+  else {
+MangledStr =
+(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+ Twine(IsConstant) + Twine(ElementBitwidth))
+.str();
+if (!isScalar())
+  MangledStr += (Twine(Scale.getValue()) + LMUL.str()).str();
+  }
+}
+
+return MangledStr;
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +118,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
@@ -110,13 +133,15 @@
   bool isFloat(unsigned Width) const {
 return isFloat() && ElementBitwidth == Width;
 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.



Comment at: clang/lib/Parse/ParsePragma.cpp:511
+RISCVPragmaHandler = std::make_unique(Actions);
+PP.AddPragmaHandler(RISCVPragmaHandler.get());
+  }

Since this is a clang specific pragma should it be `#pragma clang riscv 
intrinsic`? gcc's pragma for SVE is `#pragma GCC aarch64 "arm_sve.h"`



Comment at: clang/lib/Parse/ParsePragma.cpp:3842
+  }
+
+  PP.setPredefines("#define __riscv_pragma_vector_intrinsics");

Do we need to check that there are no tokens left to parse? Quick look at other 
handles I see a check for tok::eod



Comment at: clang/lib/Sema/SemaLookup.cpp:904
+  QualType ,
+  SmallVector ) {
+  // Get the QualType instance of the return type.

Can this be SmallVectorImpl?



Comment at: clang/lib/Sema/SemaLookup.cpp:921
+  QualType , QualType ,
+  SmallVector ) {
+  FunctionProtoType::ExtProtoInfo PI(

SmallVectorImpl



Comment at: clang/lib/Sema/SemaLookup.cpp:929
+
+static unsigned GetTargetFeatures(const TargetInfo ) {
+  bool HasF = TI.hasFeature("f");

Use a fixed size type like uint32_t since it is a bit vector.



Comment at: clang/lib/Sema/SemaLookup.cpp:949
+Sema , LookupResult , IdentifierInfo *II, Preprocessor ,
+const unsigned FctIndex, const unsigned Len, const unsigned BuiltinIndex) {
+

const on integer arguments doesn't make a much sense. It just prevents you from 
assigning over the variable in the function body.



Comment at: clang/lib/Sema/SemaLookup.cpp:966
+  ASTContext  = S.Context;
+  unsigned RVVTargetFeatures = GetTargetFeatures(Context.getTargetInfo());
+

Use a fixed size type like uint32_t here or uint8_t to match RequiredExts,



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1513
+  OS << "enum RVVTypeID {\n";
+  StringMap Seen;
+  for (const auto  : TypeMap) {

Use StringSet?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1516
+auto *RVVTy = T.first;
+if (Seen.find(RVVTy->getShortStr()) == Seen.end()) {
+  OS << "  RVVT_" + RVVTy->getShortStr() << ",\n";

With StringSet you can use
```
if (Seen.insert(RVVTy->getShortStr()).second)
```

The .second field from the pair will tell if you the insert happened or not.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1551
+StringRef IName = Def->getName();
+if (FctOverloadMap.find(IName) == FctOverloadMap.end()) {
+  FctOverloadMap.insert(std::make_pair(

I don't think you need to insert anything here. The 
`FctOverloadMap[IName].push_back(` line below will construct an empty entry 
before the push_back if it doesn't already exist.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1575
+  StringRef GName = Def->getMangledName();
+  if (FctOverloadMap.find(GName) == FctOverloadMap.end()) {
+FctOverloadMap.insert(std::make_pair(

I don't think you need to insert anything. The push_back line will take care of 
it.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1616
+  // List of signatures known to be emitted.
+  std::vector KnownSignatures;
+

Can this be a vector of unique_ptrs?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1622
+// Gather all signatures for the current function.
+auto *CurSignatureList = new BuiltinIndexListTy();
+for (const auto  : Fct.second)

Can this be a unique_ptr?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1639
+  *Candidate == *CurSignatureList) {
+if (CanReuseSignature(Candidate, Fct.second)) {
+  SignatureListMap.find(Candidate)->second.Names.push_back(Fct.first);

I think this condition can be an additional && on the previous if?



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1640
+if (CanReuseSignature(Candidate, Fct.second)) {
+  SignatureListMap.find(Candidate)->second.Names.push_back(Fct.first);
+  SignatureListMap.find(Candidate)->second.BuiltinIndex.push_back(

Don't call SignatureListMap.find(Candidate) twice.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1677
+// Report an error when seeing an entry that is too large for the
+// current index type (unsigned short).  When hitting this, the type
+// of SignatureTable will need to be changed.

I'd use uint16_t rather than unsigned short.



Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:1721
+void RVVEmitter::EmitBuiltinMapTable(raw_ostream 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 31.
HsiangKai added a comment.

Update the implementation of getMangledName().


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  https://reviews.llvm.org/D111617/new/

https://reviews.llvm.org/D111617

Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,30 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
+  std::string MangledStr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  StringRef getMangledStr() {
+if (MangledStr.empty()) {
+  if (!Valid)
+MangledStr = "invalid";
+  else {
+MangledStr =
+(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+ Twine(IsConstant) + Twine(ElementBitwidth))
+.str();
+if (!isScalar())
+  MangledStr += (Twine(Scale.getValue()) + LMUL.str()).str();
+  }
+}
+
+return MangledStr;
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +118,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
@@ -110,13 +133,15 @@
   bool isFloat(unsigned Width) const {
 return isFloat() && 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

The clang binary size increases about +1.4%. Compared to +2.3% previously, it 
is better in the implementation.

The test time of lit testing under `clang/test/CodeGen/RISCV/` is 25.59s. It 
spends 112.07s without this patch in my local environment.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 387489.
HsiangKai added a comment.

Rebase.


Repository:
  rG LLVM Github Monorepo

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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,26 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  const std::string getMangledStr() const {
+if (!Valid)
+  return "";
+
+Twine ScalarTypeStr =
+Twine(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+  Twine(IsConstant) + Twine(ElementBitwidth));
+if (isScalar()) {
+  return ScalarTypeStr.str();
+} else {
+  return Twine(ScalarTypeStr + Twine(Scale.getValue()) + LMUL.str()).str();
+}
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +114,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
@@ -110,13 +129,15 @@
   bool isFloat(unsigned Width) const {
 return isFloat() && ElementBitwidth == Width;
   }
+  bool isPointer() const { return IsPointer; }
+  bool isConstant() const { return 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 387488.
HsiangKai added a comment.

Check required extensions when adding the declarations.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111617/new/

https://reviews.llvm.org/D111617

Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,26 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  const std::string getMangledStr() const {
+if (!Valid)
+  return "";
+
+Twine ScalarTypeStr =
+Twine(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+  Twine(IsConstant) + Twine(ElementBitwidth));
+if (isScalar()) {
+  return ScalarTypeStr.str();
+} else {
+  return Twine(ScalarTypeStr + Twine(Scale.getValue()) + LMUL.str()).str();
+}
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +114,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && Scale.getValue() != 0; }
@@ -110,13 +129,15 @@
   bool isFloat(unsigned Width) const {
 return isFloat() && ElementBitwidth == Width;
   }
+  bool isPointer() const { return 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai updated this revision to Diff 387472.
HsiangKai added a comment.
Herald added subscribers: VincentWu, luke957, mgrang.

Restructure the data structure to reuse information between C intrinsics.
In this way, we can have a smaller binary size and speed up the lookup
for the C intrinsics.


Repository:
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  https://reviews.llvm.org/D111617/new/

https://reviews.llvm.org/D111617

Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -15,6 +15,7 @@
 //===--===//
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringMap.h"
@@ -22,6 +23,8 @@
 #include "llvm/ADT/Twine.h"
 #include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
+#include "llvm/TableGen/StringMatcher.h"
+#include "llvm/TableGen/TableGenBackend.h"
 #include 
 
 using namespace llvm;
@@ -55,7 +58,6 @@
 Float,
 Invalid,
   };
-  BasicType BT;
   ScalarTypeKind ScalarType = Invalid;
   LMULType LMUL;
   bool IsPointer = false;
@@ -71,11 +73,26 @@
   std::string ClangBuiltinStr;
   std::string Str;
   std::string ShortStr;
+  std::string QualExpr;
 
 public:
   RVVType() : RVVType(BasicType(), 0, StringRef()) {}
   RVVType(BasicType BT, int Log2LMUL, StringRef prototype);
 
+  const std::string getMangledStr() const {
+if (!Valid)
+  return "";
+
+Twine ScalarTypeStr =
+Twine(Twine(ScalarType) + Twine(IsPointer) + Twine(IsImmediate) +
+  Twine(IsConstant) + Twine(ElementBitwidth));
+if (isScalar()) {
+  return ScalarTypeStr.str();
+} else {
+  return Twine(ScalarTypeStr + Twine(Scale.getValue()) + LMUL.str()).str();
+}
+  }
+
   // Return the string representation of a type, which is an encoded string for
   // passing to the BUILTIN() macro in Builtins.def.
   const std::string () const { return BuiltinStr; }
@@ -97,6 +114,8 @@
 return ShortStr;
   }
 
+  const std::string () { return QualExpr; }
+
   bool isValid() const { return Valid; }
   bool isScalar() const { return Scale.hasValue() && Scale.getValue() == 0; }
   bool isVector() const { return Scale.hasValue() && 

[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

In D111617#3076994 , @rogfer01 wrote:

> In D111617#3060377 , @HsiangKai 
> wrote:
>
>> Although it reduces the header size, this patch will increase the binary 
>> size of clang.
>
> Options we can consider to mitigate this:
>
> - See if we can be more economical reprenting the table itself

Yes, I agree. This primitive work has lots of space to improve. Most of the C 
intrinsics have the same argument lists. We could encode them in a table and 
reuse the same argument lists. In addition, we could use StringMatcher in the 
TableGen utilities to generate the switch cases to improve the performance. I 
am trying to implement this patch in a better way.

> - Store it in the binary in a format unsuitable for lookups (e.g. compressed) 
> and then transform it (in memory) the first time is used so queries can be 
> solved in a reasonable amount of time.
>
>> Or we should go back to think about the design of RVV intrinsics?
>
> Certainly the explosion of cases is an issue.
>
> Maybe an alternative is using overloaded builtins (similar to what atomic 
> builtins can do when the type is not specified), but I understand this means 
> implementing the typechecking itself. Which perhaps it can be generated too.
>
> This looks like it might bring a lot of reduction in cases and tables. Corner 
> cases will appear when the arguments of a call are not enough to determine 
> the precise intrinsic desired, e.g. loads as they are currently defined would 
> be ambiguous between different LMUL types (though there may be ways to 
> mitigate this, e.g. overload only within LMULs).




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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Roger Ferrer Ibanez via Phabricator via cfe-commits]

rogfer01 added a comment.

In D111617#3060377 , @HsiangKai wrote:

> Although it reduces the header size, this patch will increase the binary size 
> of clang.

Options we can consider to mitigate this:

- See if we can be more economical reprenting the table itself
- Store it in the binary in a format unsuitable for lookups (e.g. compressed) 
and then transform it (in memory) the first time is used so queries can be 
solved in a reasonable amount of time.

> Or we should go back to think about the design of RVV intrinsics?

Certainly the explosion of cases is an issue.

Maybe an alternative is using overloaded builtins (similar to what atomic 
builtins can do when the type is not specified), but I understand this means 
implementing the typechecking itself. Which perhaps it can be generated too.

This looks like it might bring a lot of reduction in cases and tables. Corner 
cases will appear when the arguments of a call are not enough to determine the 
precise intrinsic desired, e.g. loads as they are currently defined would be 
ambiguous between different LMUL types (though there may be ways to mitigate 
this, e.g. overload only within LMULs).


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

As discussed in D110684 , developers complain 
not only compile time, but also binary size & memory usage caused by RVV 
intrinsics. We need to consider binary size, too. Is there other way to handle 
it? Or we should go back to think about the design of RVV intrinsics?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added a comment.

Although it reduces the header size, this patch will increase the binary size 
of clang.

Debug build:
Before this patch:

  textdatabss dec hex   
  filename
  263892591   10838284500232  275231107   1067b183  
  clang-14

After this patch:

  textdatabss dec hex   
  filename
  263909721   12085116500232  276495069   107afadd  
  clang-14

Release build:
Before this patch;

  textdatabss dec hex   
  filename
  382952171   8802976410264736481246671   1caf3dcf  
  clang-14

After this patch:

  textdatabss dec hex   
  filename
  387629483   9465258210264736492546801   1d5baaf1  
  clang-14


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai added inline comments.



Comment at: clang/lib/Sema/SemaLookup.cpp:923
+
+  const RVVIntrinsicInfo *Intrinsic = std::find_if(
+  std::begin(RVVIntrinsicInfos), std::end(RVVIntrinsicInfos),

kito-cheng wrote:
> rogfer01 wrote:
> > Not for this patch: I think this table may be a bit large so all lookups 
> > (including those that will fail) will be slower after a `#pragma riscv 
> > intrinsic vector` is found.
> > 
> > Filtering them as fast as possible (looking at the spec shows that 
> > currently all RVV intrinsics start with `v`) or using some hash table (if 
> > too difficult to build at compile time we could build it the first time we 
> > get here?) might be something we want to do.
> OpenCL using a tablegen-based generator to generate a big swtich table to 
> speed up the lookup rather than linear scan, here is generated file:
> 
> https://gist.github.com/kito-cheng/46616c82c0f25e5df31ff5eaa14914ba#file-openclbuiltins-inc-L8055
> 
> I think we could using same approach to prevent the slow down.
Indeed, OpenCL generates a checking function, `isOpenCLBuiltin`, as the filter. 
I will use the similar approach to filter the queries.



Comment at: clang/lib/Sema/SemaLookup.cpp:1011
 
+  if (PP.getPredefines() == "#define __riscv_pragma_vector_intrinsics") {
+const TargetInfo  = Context.getTargetInfo();

rogfer01 wrote:
> This seems a bit fragile if there are more predefines than just this one. I 
> understand the intent is to avoid looking up the RVV builtin every time, only 
> do that if we have found the pragma, right?
> 
> Several pragma handlers receive a reference to `Sema` (in an object called 
> `Action` or `Actions`) and then they notify `Sema` (via a member function 
> that would have to be added to it) about having parsed the pragma. That could 
> be used to set some flag to true in `Sema` itself and also emit diagnostics 
> if we want (e.g. what if the pragma is used twice? can it be used anywhere?).
> 
> Do you think this would be workable?
I should add a flag somewhere as the checking condition. I will try to find a 
better way to do it. Thanks for your suggestion. I think it is workable.

The purpose of the pragma is to enable the lazily insertion. If users do not 
include `riscv_vector.h` and they use `vadd` as the function call, we will not 
treat it as a vector generic intrinsic.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Kito Cheng via Phabricator via cfe-commits]

kito-cheng added inline comments.



Comment at: clang/lib/Sema/SemaLookup.cpp:923
+
+  const RVVIntrinsicInfo *Intrinsic = std::find_if(
+  std::begin(RVVIntrinsicInfos), std::end(RVVIntrinsicInfos),

rogfer01 wrote:
> Not for this patch: I think this table may be a bit large so all lookups 
> (including those that will fail) will be slower after a `#pragma riscv 
> intrinsic vector` is found.
> 
> Filtering them as fast as possible (looking at the spec shows that currently 
> all RVV intrinsics start with `v`) or using some hash table (if too difficult 
> to build at compile time we could build it the first time we get here?) might 
> be something we want to do.
OpenCL using a tablegen-based generator to generate a big swtich table to speed 
up the lookup rather than linear scan, here is generated file:

https://gist.github.com/kito-cheng/46616c82c0f25e5df31ff5eaa14914ba#file-openclbuiltins-inc-L8055

I think we could using same approach to prevent the slow down.


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Roger Ferrer Ibanez via Phabricator via cfe-commits]

rogfer01 added inline comments.



Comment at: clang/lib/Sema/SemaLookup.cpp:923
+
+  const RVVIntrinsicInfo *Intrinsic = std::find_if(
+  std::begin(RVVIntrinsicInfos), std::end(RVVIntrinsicInfos),

Not for this patch: I think this table may be a bit large so all lookups 
(including those that will fail) will be slower after a `#pragma riscv 
intrinsic vector` is found.

Filtering them as fast as possible (looking at the spec shows that currently 
all RVV intrinsics start with `v`) or using some hash table (if too difficult 
to build at compile time we could build it the first time we get here?) might 
be something we want to do.



Comment at: clang/lib/Sema/SemaLookup.cpp:1011
 
+  if (PP.getPredefines() == "#define __riscv_pragma_vector_intrinsics") {
+const TargetInfo  = Context.getTargetInfo();

This seems a bit fragile if there are more predefines than just this one. I 
understand the intent is to avoid looking up the RVV builtin every time, only 
do that if we have found the pragma, right?

Several pragma handlers receive a reference to `Sema` (in an object called 
`Action` or `Actions`) and then they notify `Sema` (via a member function that 
would have to be added to it) about having parsed the pragma. That could be 
used to set some flag to true in `Sema` itself and also emit diagnostics if we 
want (e.g. what if the pragma is used twice? can it be used anywhere?).

Do you think this would be workable?


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[PATCH] D111617: [RISCV] Lazily add RVV C intrinsics.

[Hsiangkai Wang via Phabricator via cfe-commits]

HsiangKai created this revision.
HsiangKai added reviewers: khchen, craig.topper, rogfer01, kito-cheng.
Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, 
frasercrmck, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, 
s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, 
edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, 
johnrusso, rbar, asb, Anastasia, mgorny.
HsiangKai requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, MaskRay.
Herald added projects: clang, LLVM.

Leverage the method OpenCL uses that adds C intrinsics when the lookup
failed. There is no need to define C intrinsics in the header file any
more. It could help to avoid the large header file to speed up the
compilation of RVV source code. Besides that, only the C intrinsics used
by the users will be added into the declaration table.

This patch is based on https://reviews.llvm.org/D103228 and inspired by
OpenCL implementation.

Authored-by: Kito Cheng 
Co-Authored-by: Hsiangkai Wang 


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Files:
  clang/include/clang/Basic/CMakeLists.txt
  clang/include/clang/Basic/TokenKinds.def
  clang/include/clang/Parse/Parser.h
  clang/lib/Parse/ParsePragma.cpp
  clang/lib/Sema/SemaLookup.cpp
  clang/utils/TableGen/RISCVVEmitter.cpp
  clang/utils/TableGen/TableGen.cpp
  clang/utils/TableGen/TableGenBackends.h
  llvm/docs/CommandGuide/tblgen.rst

Index: llvm/docs/CommandGuide/tblgen.rst
===
--- llvm/docs/CommandGuide/tblgen.rst
+++ llvm/docs/CommandGuide/tblgen.rst
@@ -348,6 +348,10 @@
 
   Generate ``riscv_vector_builtin_cg.inc`` for Clang.
 
+.. option:: -gen-riscv-vector-builtin-sema
+
+  Generate ``riscv_vector_builtin_sema.inc`` for Clang.
+
 .. option:: -gen-attr-docs
 
   Generate attribute documentation.
Index: clang/utils/TableGen/TableGenBackends.h
===
--- clang/utils/TableGen/TableGenBackends.h
+++ clang/utils/TableGen/TableGenBackends.h
@@ -110,6 +110,7 @@
 void EmitRVVHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltins(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitRVVBuiltinCG(llvm::RecordKeeper , llvm::raw_ostream );
+void EmitRVVBuiltinSema(llvm::RecordKeeper , llvm::raw_ostream );
 
 void EmitCdeHeader(llvm::RecordKeeper , llvm::raw_ostream );
 void EmitCdeBuiltinDef(llvm::RecordKeeper , llvm::raw_ostream );
Index: clang/utils/TableGen/TableGen.cpp
===
--- clang/utils/TableGen/TableGen.cpp
+++ clang/utils/TableGen/TableGen.cpp
@@ -88,6 +88,7 @@
   GenRISCVVectorHeader,
   GenRISCVVectorBuiltins,
   GenRISCVVectorBuiltinCG,
+  GenRISCVVectorBuiltinSema,
   GenAttrDocs,
   GenDiagDocs,
   GenOptDocs,
@@ -243,6 +244,8 @@
"Generate riscv_vector_builtins.inc for clang"),
 clEnumValN(GenRISCVVectorBuiltinCG, "gen-riscv-vector-builtin-codegen",
"Generate riscv_vector_builtin_cg.inc for clang"),
+clEnumValN(GenRISCVVectorBuiltinSema, "gen-riscv-vector-builtin-sema",
+   "Generate riscv_vector_builtin_sema.inc for clang"),
 clEnumValN(GenAttrDocs, "gen-attr-docs",
"Generate attribute documentation"),
 clEnumValN(GenDiagDocs, "gen-diag-docs",
@@ -458,6 +461,9 @@
   case GenRISCVVectorBuiltinCG:
 EmitRVVBuiltinCG(Records, OS);
 break;
+  case GenRISCVVectorBuiltinSema:
+EmitRVVBuiltinSema(Records, OS);
+break;
   case GenAttrDocs:
 EmitClangAttrDocs(Records, OS);
 break;
Index: clang/utils/TableGen/RISCVVEmitter.cpp
===
--- clang/utils/TableGen/RISCVVEmitter.cpp
+++ clang/utils/TableGen/RISCVVEmitter.cpp
@@ -203,12 +203,6 @@
   // Emit the code block for switch body in EmitRISCVBuiltinExpr, it should
   // init the RVVIntrinsic ID and IntrinsicTypes.
   void emitCodeGenSwitchBody(raw_ostream ) const;
-
-  // Emit the macros for mapping C/C++ intrinsic function to builtin functions.
-  void emitIntrinsicMacro(raw_ostream ) const;
-
-  // Emit the mangled function definition.
-  void emitMangledFuncDef(raw_ostream ) const;
 };
 
 class RVVEmitter {
@@ -231,6 +225,9 @@
   /// Emit all the information needed to map builtin -> LLVM IR intrinsic.
   void createCodeGen(raw_ostream );
 
+  /// Emit all the information needed by SemaLookup.cpp.
+  void createSema(raw_ostream );
+
   std::string getSuffixStr(char Type, int Log2LMUL, StringRef Prototypes);
 
 private:
@@ -246,15 +243,6 @@
   ArrayRef PrototypeSeq);
   Optional computeType(BasicType BT, int Log2LMUL, StringRef Proto);
 
-  /// Emit Acrh predecessor definitions and body, assume the element of Defs are
-  /// sorted by extension.
-  void emitArchMacroAndBody(
-