[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-15 Thread Renato Golin via Phabricator via cfe-commits
rengolin added a comment.

I think we can safely say that we care less about jazelle than we care about 
armv1/2/3, so feel free to ignore that, too.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-15 Thread David Spickett via Phabricator via cfe-commits
DavidSpickett added subscribers: nickdesaulniers, psmith.
DavidSpickett added a comment.

> 1:38 AM  might be good to take them out here as well

So I looked into this. Here are the Arm architectures that clang has that
gcc doesn't:
"armv5tej" // Not in GCC, j = jazelle
"armv7k" // Apple Watch S1
"armv7s" // iPhone 5
"xscale"

(minus some very new ones that are just because I used trunk clang)

These are the gcc architectures that clang doesn't have:
"armv6j"
"armv6s-m"
"armv6z"
"armv6zk"
"armv7"

So a random grab bag of v6 and 7 on both sides. Not worth disturbing that
now.

Arnd picked out jazelle. GCC doesn't list armv5tej but it does accept it
https://godbolt.org/z/cazcbfjGY. For armv6j clang doesn't list it but it
also does accept it https://godbolt.org/z/aEKfnojTY.

llvm's support for jazelle is a single instruction "bxj" which is a branch
exchange, but for jazelle (
https://developer.arm.com/documentation/dui0473/j/arm-and-thumb-instructions/bxj
).
Which makes some sense. If you had that one instruction you could compile
99% of the code with public toolchains, then the rest with some tool from
Arm, I guess. GCC appears to have done the same.

So targets wise I think things are fine as is unless a v6 enthusiast tries
to use clang sometime.

For jazelle the bxj instruction appears to be present on non jazelle
processors, and can be used as a normal bx in ThumbEE. The code to
implement it and the armv5tej target is minimal and compact so I think we
keep it for now.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-08 Thread David Spickett via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe428baf0019e: [LLVM][ARM] Remove options for armv2, 2A, 3 
and 3M (authored by DavidSpickett).

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Files:
  clang/docs/ReleaseNotes.rst
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/lib/Support/ARMTargetParser.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
  llvm/test/MC/ARM/directive-arch-armv2.s
  llvm/test/MC/ARM/directive-arch-armv2a.s
  llvm/test/MC/ARM/directive-arch-armv3.s
  llvm/test/MC/ARM/directive-arch-armv3m.s
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -20,21 +20,20 @@
 
 namespace {
 const char *ARMArch[] = {
-"armv2",   "armv2a", "armv3",   "armv3m","armv4",
-"armv4t",  "armv5",  "armv5t",  "armv5e","armv5te",
-"armv5tej","armv6",  "armv6j",  "armv6k","armv6hl",
-"armv6t2", "armv6kz","armv6z",  "armv6zk",   "armv6-m",
-"armv6m",  "armv6sm","armv6s-m","armv7-a",   "armv7",
-"armv7a",  "armv7ve","armv7hl", "armv7l","armv7-r",
-"armv7r",  "armv7-m","armv7m",  "armv7k","armv7s",
-"armv7e-m","armv7em","armv8-a", "armv8", "armv8a",
-"armv8l",  "armv8.1-a",  "armv8.1a","armv8.2-a", "armv8.2a",
-"armv8.3-a",   "armv8.3a",   "armv8.4-a",   "armv8.4a",  "armv8.5-a",
-"armv8.5a","armv8.6-a",  "armv8.6a","armv8.7-a", "armv8.7a",
-"armv8.8-a",   "armv8.8a",   "armv8-r", "armv8r","armv8-m.base",
-"armv8m.base", "armv8-m.main",   "armv8m.main", "iwmmxt","iwmmxt2",
-"xscale",  "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
-"armv9.1-a",   "armv9.1a",   "armv9.2-a",   "armv9.2a",
+"armv4","armv4t",  "armv5",  "armv5t",  "armv5e",
+"armv5te",  "armv5tej","armv6",  "armv6j",  "armv6k",
+"armv6hl",  "armv6t2", "armv6kz","armv6z",  "armv6zk",
+"armv6-m",  "armv6m",  "armv6sm","armv6s-m","armv7-a",
+"armv7","armv7a",  "armv7ve","armv7hl", "armv7l",
+"armv7-r",  "armv7r",  "armv7-m","armv7m",  "armv7k",
+"armv7s",   "armv7e-m","armv7em","armv8-a", "armv8",
+"armv8a",   "armv8l",  "armv8.1-a",  "armv8.1a","armv8.2-a",
+"armv8.2a", "armv8.3-a",   "armv8.3a",   "armv8.4-a",   "armv8.4a",
+"armv8.5-a","armv8.5a","armv8.6-a",  "armv8.6a","armv8.7-a",
+"armv8.7a", "armv8.8-a",   "armv8.8a",   "armv8-r", "armv8r",
+"armv8-m.base", "armv8m.base", "armv8-m.main",   "armv8m.main", "iwmmxt",
+"iwmmxt2",  "xscale",  "armv8.1-m.main", "armv9-a", "armv9",
+"armv9a",   "armv9.1-a",   "armv9.1a",   "armv9.2-a",   "armv9.2a",
 };
 
 template 
@@ -438,14 +437,6 @@
 }
 
 TEST(TargetParserTest, testARMArch) {
-  EXPECT_TRUE(
-  testARMArch("armv2", "generic", "v2", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv2a", "generic", "v2a", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv3", "generic", "v3", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv3m", "generic", "v3m", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
   testARMArch("armv4", "strongarm", "v4",
   ARMBuildAttrs::CPUArch::v4));
@@ -603,10 +594,6 @@
   EXPECT_FALSE(testARMExtension("xscale", ARM::ArchKind::INVALID, "crc"));
   EXPECT_FALSE(testARMExtension("swift", ARM::ArchKind::INVALID, "crc"));
 
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2A, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3M, "thumb"));
   EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV4, "dsp"));
   EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV4T, "dsp"));
   EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV5T, "simd"));
Index: llvm/test/MC/ARM/directive-arch-armv3m.s
===
--- llvm/test/MC/ARM/directive-arch-armv3m.s
+++ /dev/null
@@ -1,30 +0,0 @@
-@ Test the .arch directive for armv3m
-
-@ This test case will check the default .ARM.attributes value for the
-@ armv3m architecture.
-
-@ RUN: 

Re: [PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-02 Thread Nick Desaulniers via cfe-commits
Arnd mentions on IRC:

1:38 AM  ndesaulniers: I just looked at the patch and found that the
list of supported targets still includes armv5 and armve (both without t),
which never existed in hardware and were removed from gcc a while ago
1:38 AM  might be good to take them out here as well
1:38 AM  the only v5 targets in gcc now are armv5t and armv5te
1:40 AM  not sure about armv5tej, which clang also accepts. I'm
pretty sure that neither clang not gcc actually supported 'j' instructions
as they are not publicly documented, but I don't know if gcc previously
accepted that name as an alias
1:41 AM  OTOH gcc does allow 'armv6j' and a few others that don't
really exist in hardware without additional letters

On Fri, Sep 2, 2022, 3:56 AM Renato Golin via Phabricator <
revi...@reviews.llvm.org> wrote:

> rengolin accepted this revision.
> rengolin added a comment.
>
> Agree. Even 10 years ago we made the concerted effort not to care about
> pre-v4, so I'd be a little surprised if people are actually using modern
> clang to target those platforms.
>
> Projects that rely on it can work in the same way as gcc and pick an older
> version of the toolchains.
>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D133109/new/
>
> https://reviews.llvm.org/D133109
>
>
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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-02 Thread Renato Golin via Phabricator via cfe-commits
rengolin accepted this revision.
rengolin added a comment.

Agree. Even 10 years ago we made the concerted effort not to care about pre-v4, 
so I'd be a little surprised if people are actually using modern clang to 
target those platforms.

Projects that rely on it can work in the same way as gcc and pick an older 
version of the toolchains.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-02 Thread David Spickett via Phabricator via cfe-commits
DavidSpickett added a comment.

This is probably overkill but I posted an RFC just in case 
https://discourse.llvm.org/t/rfc-removal-of-armv2-2a-3-3m-target-options/65040. 
Like I said, no rush to land this.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-01 Thread Nick Desaulniers via Phabricator via cfe-commits
nickdesaulniers accepted this revision.
nickdesaulniers added a comment.

For the Linux kernel, we're only building v5+ continuously.

It looks like the Linux kernel supports v4+ and v3m (for Acorn Risc-PC (Intel 
StrongARM(R) SA-110)). We've never been able to build that target, and it's not 
high ROI to do so.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/Makefile#n74

> GCC no longer supports Arm architecture prior to v4 so it is likely the 
> alternative of adding support for v3 is not worth it.

Oh, looks like the kernel already has a check for (6 <= GCC < 9.1), so there's 
no risk of breakage on our side.  Thanks for the heads up though!
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2abd6e34fcf3bd9f9ffafcaa47cdc3ed443f9add

Consider amending the commit message to mention the specific version of GCC 
that support for v3- was removed from.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-01 Thread Peter Smith via Phabricator via cfe-commits
peter.smith accepted this revision.
peter.smith added a comment.
This revision is now accepted and ready to land.

LGTM. GCC no longer supports Arm architecture prior to v4 so it is likely the 
alternative of adding support for v3 is not worth it. The only Arm machines 
running v2 are likely to be the Acorn Archimedes family, these have their own 
object file format so are unlikely to benefit from LLVM support.

Agree that the openmp reference looks harmless.

Will be worth waiting to see if Nick has any objections.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-01 Thread David Spickett via Phabricator via cfe-commits
DavidSpickett added reviewers: psmith, easyaspi314.
DavidSpickett added a comment.

The remaining reference in the repo is a #define in 
`openmp/runtime/src/kmp_platform.h` which seems harmless.


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-01 Thread David Spickett via Phabricator via cfe-commits
DavidSpickett added a comment.

https://github.com/llvm/llvm-project/issues/57486


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[PATCH] D133109: [LLVM][ARM] Remove options for armv2, 2A, 3 and 3M

2022-09-01 Thread David Spickett via Phabricator via cfe-commits
DavidSpickett created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
DavidSpickett requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Fixes #57486

These pre v4 architectures are not specifically supported
by codegen. As demonstrated in the linked issue.

This removes the options and associated testing.

The Pre_v4 build attribute remains mainly because its absence
would be more confusing. It will not be used other than to
complete the list of build attributes as shown in the ABI.

https://github.com/ARM-software/abi-aa/blob/main/addenda32/addenda32.rst#3352the-target-related-attributes


Repository:
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https://reviews.llvm.org/D133109

Files:
  clang/docs/ReleaseNotes.rst
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm/Support/ARMTargetParser.def
  llvm/lib/Support/ARMTargetParser.cpp
  llvm/lib/Target/ARM/ARM.td
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
  llvm/test/MC/ARM/directive-arch-armv2.s
  llvm/test/MC/ARM/directive-arch-armv2a.s
  llvm/test/MC/ARM/directive-arch-armv3.s
  llvm/test/MC/ARM/directive-arch-armv3m.s
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -20,21 +20,20 @@
 
 namespace {
 const char *ARMArch[] = {
-"armv2",   "armv2a", "armv3",   "armv3m","armv4",
-"armv4t",  "armv5",  "armv5t",  "armv5e","armv5te",
-"armv5tej","armv6",  "armv6j",  "armv6k","armv6hl",
-"armv6t2", "armv6kz","armv6z",  "armv6zk",   "armv6-m",
-"armv6m",  "armv6sm","armv6s-m","armv7-a",   "armv7",
-"armv7a",  "armv7ve","armv7hl", "armv7l","armv7-r",
-"armv7r",  "armv7-m","armv7m",  "armv7k","armv7s",
-"armv7e-m","armv7em","armv8-a", "armv8", "armv8a",
-"armv8l",  "armv8.1-a",  "armv8.1a","armv8.2-a", "armv8.2a",
-"armv8.3-a",   "armv8.3a",   "armv8.4-a",   "armv8.4a",  "armv8.5-a",
-"armv8.5a","armv8.6-a",  "armv8.6a","armv8.7-a", "armv8.7a",
-"armv8.8-a",   "armv8.8a",   "armv8-r", "armv8r","armv8-m.base",
-"armv8m.base", "armv8-m.main",   "armv8m.main", "iwmmxt","iwmmxt2",
-"xscale",  "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
-"armv9.1-a",   "armv9.1a",   "armv9.2-a",   "armv9.2a",
+"armv4","armv4t",  "armv5",  "armv5t",  "armv5e",
+"armv5te",  "armv5tej","armv6",  "armv6j",  "armv6k",
+"armv6hl",  "armv6t2", "armv6kz","armv6z",  "armv6zk",
+"armv6-m",  "armv6m",  "armv6sm","armv6s-m","armv7-a",
+"armv7","armv7a",  "armv7ve","armv7hl", "armv7l",
+"armv7-r",  "armv7r",  "armv7-m","armv7m",  "armv7k",
+"armv7s",   "armv7e-m","armv7em","armv8-a", "armv8",
+"armv8a",   "armv8l",  "armv8.1-a",  "armv8.1a","armv8.2-a",
+"armv8.2a", "armv8.3-a",   "armv8.3a",   "armv8.4-a",   "armv8.4a",
+"armv8.5-a","armv8.5a","armv8.6-a",  "armv8.6a","armv8.7-a",
+"armv8.7a", "armv8.8-a",   "armv8.8a",   "armv8-r", "armv8r",
+"armv8-m.base", "armv8m.base", "armv8-m.main",   "armv8m.main", "iwmmxt",
+"iwmmxt2",  "xscale",  "armv8.1-m.main", "armv9-a", "armv9",
+"armv9a",   "armv9.1-a",   "armv9.1a",   "armv9.2-a",   "armv9.2a",
 };
 
 template 
@@ -438,14 +437,6 @@
 }
 
 TEST(TargetParserTest, testARMArch) {
-  EXPECT_TRUE(
-  testARMArch("armv2", "generic", "v2", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv2a", "generic", "v2a", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv3", "generic", "v3", ARMBuildAttrs::CPUArch::Pre_v4));
-  EXPECT_TRUE(
-  testARMArch("armv3m", "generic", "v3m", ARMBuildAttrs::CPUArch::Pre_v4));
   EXPECT_TRUE(
   testARMArch("armv4", "strongarm", "v4",
   ARMBuildAttrs::CPUArch::v4));
@@ -603,10 +594,6 @@
   EXPECT_FALSE(testARMExtension("xscale", ARM::ArchKind::INVALID, "crc"));
   EXPECT_FALSE(testARMExtension("swift", ARM::ArchKind::INVALID, "crc"));
 
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2A, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3, "thumb"));
-  EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3M, "thumb"));
   EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV4, "dsp"));