[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGee815ff2ce8d: [PowerPC] Fix the implicit casting for the emulated intrinsics (authored by maryammo). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144293/new/ https://reviews.llvm.org/D144293 Files: clang/lib/Headers/ppc_wrappers/emmintrin.h clang/lib/Headers/ppc_wrappers/smmintrin.h clang/test/CodeGen/PowerPC/ppc-smmintrin.c Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ __shortmask = vec_reve(__shortmask); #endif Index: clang/lib/Headers/ppc_wrappers/emmintrin.h === --- clang/lib/Headers/ppc_wrappers/emmintrin.h +++ clang/lib/Headers/ppc_wrappers/emmintrin.h @@ -46,6 +46,7 @@ /* SSE2 */ typedef __vector double __v2df; +typedef __vector float __v4f; typedef __vector long long __v2di; typedef __vector unsigned long long __v2du; typedef __vector int __v4si; @@ -951,7 +952,7 @@ _mm_cvtpi32_pd(__m64 __A) { __v4si __temp; __v2di __tmp2; - __v2df __result; + __v4f __result; __temp = (__v4si)vec_splats(__A); __tmp2 = (__v2di)vec_unpackl(__temp); Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ __shortmask = vec_reve(__shortmask); #endif Index: clang/lib/Headers/ppc_wrappers/emmintrin.h
[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
maryammo updated this revision to Diff 499273. maryammo added a comment. Address review comments Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144293/new/ https://reviews.llvm.org/D144293 Files: clang/lib/Headers/ppc_wrappers/emmintrin.h clang/lib/Headers/ppc_wrappers/smmintrin.h clang/test/CodeGen/PowerPC/ppc-smmintrin.c Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ __shortmask = vec_reve(__shortmask); #endif Index: clang/lib/Headers/ppc_wrappers/emmintrin.h === --- clang/lib/Headers/ppc_wrappers/emmintrin.h +++ clang/lib/Headers/ppc_wrappers/emmintrin.h @@ -46,6 +46,7 @@ /* SSE2 */ typedef __vector double __v2df; +typedef __vector float __v4f; typedef __vector long long __v2di; typedef __vector unsigned long long __v2du; typedef __vector int __v4si; @@ -951,7 +952,7 @@ _mm_cvtpi32_pd(__m64 __A) { __v4si __temp; __v2di __tmp2; - __v2df __result; + __v4f __result; __temp = (__v4si)vec_splats(__A); __tmp2 = (__v2di)vec_unpackl(__temp); Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ __shortmask = vec_reve(__shortmask); #endif Index: clang/lib/Headers/ppc_wrappers/emmintrin.h === --- clang/lib/Headers/ppc_wrappers/emmintrin.h +++ clang/lib/Headers/ppc_wrappers/emmintrin.h
[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
maryammo added inline comments. Comment at: clang/lib/Headers/ppc_wrappers/smmintrin.h:310 __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ amyk wrote: > Potentially silly question, but is it intentionally for that mask for be > signed? In altivec header, `vec_unpackh` 's parameter is either `signed char` or `bool char`, so we need explicit casting since `__charmask` is `unsigned char`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144293/new/ https://reviews.llvm.org/D144293 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
amyk added inline comments. Comment at: clang/lib/Headers/ppc_wrappers/emmintrin.h:57 typedef __vector unsigned char __v16qu; +typedef __vector float __v2f; nemanjai wrote: > The name `__v2f` seems strange since `__vector float` is a vector of 4 > `float` values. Should this be `__v4f`? nit: Could we also put this to where we put the `double`? Comment at: clang/lib/Headers/ppc_wrappers/smmintrin.h:310 __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ Potentially silly question, but is it intentionally for that mask for be signed? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144293/new/ https://reviews.llvm.org/D144293 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
nemanjai accepted this revision. nemanjai added a comment. This revision is now accepted and ready to land. LGTM as long as the naming nit is addressed. Comment at: clang/lib/Headers/ppc_wrappers/emmintrin.h:57 typedef __vector unsigned char __v16qu; +typedef __vector float __v2f; The name `__v2f` seems strange since `__vector float` is a vector of 4 `float` values. Should this be `__v4f`? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D144293/new/ https://reviews.llvm.org/D144293 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D144293: [PowerPC] Fix the implicit casting for the emulated intrinsics
maryammo created this revision. Herald added subscribers: shchenz, kbarton, nemanjai. Herald added a project: All. maryammo requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This patch is to fix some implicit castings for emulated intrinsics so that there are no lax-vector-conversions errors and warnings. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D144293 Files: clang/lib/Headers/ppc_wrappers/emmintrin.h clang/lib/Headers/ppc_wrappers/smmintrin.h clang/test/CodeGen/PowerPC/ppc-smmintrin.c Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask = (__v8hu)vec_unpackh((__v16qi)__charmask); #ifdef __BIG_ENDIAN__ __shortmask = vec_reve(__shortmask); #endif Index: clang/lib/Headers/ppc_wrappers/emmintrin.h === --- clang/lib/Headers/ppc_wrappers/emmintrin.h +++ clang/lib/Headers/ppc_wrappers/emmintrin.h @@ -54,6 +54,7 @@ typedef __vector unsigned short __v8hu; typedef __vector signed char __v16qi; typedef __vector unsigned char __v16qu; +typedef __vector float __v2f; /* The Intel API is flexible enough that we must allow aliasing with other vector types, and their scalar components. */ @@ -951,7 +952,7 @@ _mm_cvtpi32_pd(__m64 __A) { __v4si __temp; __v2di __tmp2; - __v2df __result; + __v2f __result; __temp = (__v4si)vec_splats(__A); __tmp2 = (__v2di)vec_unpackl(__temp); Index: clang/test/CodeGen/PowerPC/ppc-smmintrin.c === --- clang/test/CodeGen/PowerPC/ppc-smmintrin.c +++ clang/test/CodeGen/PowerPC/ppc-smmintrin.c @@ -73,7 +73,7 @@ // CHECK-LABEL: define available_externally <2 x i64> @_mm_blend_epi16(<2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, <2 x i64> noundef %{{[0-9a-zA-Z_.]+}}, i32 noundef signext %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[TRUNC:[0-9a-zA-Z_.]+]] = trunc i32 %{{[0-9a-zA-Z_.]+}} to i8 -// CHECK: call <16 x i8> @vec_splats(signed char)(i8 noundef signext %[[TRUNC]]) +// CHECK: call <16 x i8> @vec_splats(unsigned char)(i8 noundef zeroext %[[TRUNC]]) // CHECK: call <16 x i8> @llvm.ppc.altivec.vgbbd(<16 x i8> %{{[0-9a-zA-Z_.]+}}) // CHECK: %[[PACK:[0-9a-zA-Z_.]+]] = call <8 x i16> @vec_unpackh(signed char vector[16]) // CHECK: store <8 x i16> %[[PACK]], ptr %{{[0-9a-zA-Z_.]+}}, align 16 @@ -232,8 +232,8 @@ test_round() { _mm_round_ps(mn1, 0); _mm_round_ss(mn1, mn2, 0); - _mm_round_pd(mn1, 0); - _mm_round_sd(mn1, mn2, 0); + _mm_round_pd(md1, 0); + _mm_round_sd(md1, md2, 0); } // CHECK-LABEL: @test_round Index: clang/lib/Headers/ppc_wrappers/smmintrin.h === --- clang/lib/Headers/ppc_wrappers/smmintrin.h +++ clang/lib/Headers/ppc_wrappers/smmintrin.h @@ -305,9 +305,9 @@ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_blend_epi16(__m128i __A, __m128i __B, const int __imm8) { - __v16qi __charmask = vec_splats((signed char)__imm8); + __v16qu __charmask = vec_splats((unsigned char)__imm8); __charmask = vec_gb(__charmask); - __v8hu __shortmask = (__v8hu)vec_unpackh(__charmask); + __v8hu __shortmask =