[PATCH] D147461: [Headers] Add some intrinsic function descriptions to immintrin.h

[Paul Robinson via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa82170fa41ca: [Headers] Add some intrinsic function 
descriptions to immintrin.h. (authored by probinson).
Herald added a project: clang.

Changed prior to commit:
  https://reviews.llvm.org/D147461?vs=510568=510778#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147461/new/

https://reviews.llvm.org/D147461

Files:
  clang/lib/Headers/immintrin.h

Index: clang/lib/Headers/immintrin.h
===
--- clang/lib/Headers/immintrin.h
+++ clang/lib/Headers/immintrin.h
@@ -284,18 +284,45 @@
 
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||  \
 defined(__RDRND__)
+/// Returns a 16-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///A pointer to a 16-bit memory location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand16_step(unsigned short *__p)
 {
   return (int)__builtin_ia32_rdrand16_step(__p);
 }
 
+/// Returns a 32-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///A pointer to a 32-bit memory location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand32_step(unsigned int *__p)
 {
   return (int)__builtin_ia32_rdrand32_step(__p);
 }
 
+/// Returns a 64-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///A pointer to a 64-bit memory location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 #ifdef __x86_64__
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand64_step(unsigned long long *__p)
@@ -325,48 +352,108 @@
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||  \
 defined(__FSGSBASE__)
 #ifdef __x86_64__
+/// Reads the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDFSBASE  instruction.
+///
+/// \returns The lower 32 bits of the FS base register.
 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readfsbase_u32(void)
 {
   return __builtin_ia32_rdfsbase32();
 }
 
+/// Reads the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDFSBASE  instruction.
+///
+/// \returns The contents of the FS base register.
 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readfsbase_u64(void)
 {
   return __builtin_ia32_rdfsbase64();
 }
 
+/// Reads the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDGSBASE  instruction.
+///
+/// \returns The lower 32 bits of the GS base register.
 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readgsbase_u32(void)
 {
   return __builtin_ia32_rdgsbase32();
 }
 
+/// Reads the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDGSBASE  instruction.
+///
+/// \returns The contents of the GS base register.
 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readgsbase_u64(void)
 {
   return __builtin_ia32_rdgsbase64();
 }
 
+/// Modifies the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRFSBASE  instruction.
+///
+/// \param __V
+///Value to use for the lower 32 bits of the FS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _writefsbase_u32(unsigned int __V)
 {
   __builtin_ia32_wrfsbase32(__V);
 }
 
+/// Modifies the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRFSBASE  instruction.
+///
+/// \param __V
+///Value to use for the FS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _writefsbase_u64(unsigned long long __V)
 {
   __builtin_ia32_wrfsbase64(__V);
 }
 
+/// Modifies the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRGSBASE  instruction.
+///
+/// \param __V
+///Value to use for the lower 32 bits of the GS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 

[PATCH] D147461: [Headers] Add some intrinsic function descriptions to immintrin.h

[Phoebe Wang via Phabricator via cfe-commits]

pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

LGTM, thanks for working on it!




Comment at: clang/lib/Headers/immintrin.h:294
+/// \param __p
+///Pointer to a 16-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.

memory location



Comment at: clang/lib/Headers/immintrin.h:294
+/// \param __p
+///Pointer to a 16-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.

pengfei wrote:
> memory location
Nit: I saw others prefer to `A pointer`



Comment at: clang/lib/Headers/immintrin.h:309
+/// \param __p
+///Pointer to a 32-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.

ditto.



Comment at: clang/lib/Headers/immintrin.h:324
+/// \param __p
+///Pointer to a 64-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.

ditto.



Comment at: clang/lib/Headers/immintrin.h:414
+/// \param __V
+///Value to use for the lower 32 bits of the FS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, 
__target__("fsgsbase")))

Nit: I saw others prefer to `A 32-bit integer value`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147461/new/

https://reviews.llvm.org/D147461

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D147461: [Headers] Add some intrinsic function descriptions to immintrin.h

[Paul Robinson via Phabricator via cfe-commits]

probinson added a comment.

FTR, I'll be working my way through a bunch of intrinsics over the next month 
or so, trying not to do too many at once. Mostly AVX2 but also some others.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147461/new/

https://reviews.llvm.org/D147461

___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D147461: [Headers] Add some intrinsic function descriptions to immintrin.h

[Paul Robinson via Phabricator via cfe-commits]

probinson created this revision.
probinson added reviewers: RKSimon, pengfei.
Herald added a project: All.
probinson requested review of this revision.

https://reviews.llvm.org/D147461

Files:
  clang/lib/Headers/immintrin.h

Index: clang/lib/Headers/immintrin.h
===
--- clang/lib/Headers/immintrin.h
+++ clang/lib/Headers/immintrin.h
@@ -284,18 +284,45 @@
 
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||  \
 defined(__RDRND__)
+/// Returns a 16-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///Pointer to a 16-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand16_step(unsigned short *__p)
 {
   return (int)__builtin_ia32_rdrand16_step(__p);
 }
 
+/// Returns a 32-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///Pointer to a 32-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand32_step(unsigned int *__p)
 {
   return (int)__builtin_ia32_rdrand32_step(__p);
 }
 
+/// Returns a 64-bit hardware-generated random value.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDRAND  instruction.
+///
+/// \param __p
+///Pointer to a 64-bit location to place the random value.
+/// \returns 1 if the value was successfully generated, 0 otherwise.
 #ifdef __x86_64__
 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd")))
 _rdrand64_step(unsigned long long *__p)
@@ -325,48 +352,108 @@
 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) ||  \
 defined(__FSGSBASE__)
 #ifdef __x86_64__
+/// Reads the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDFSBASE  instruction.
+///
+/// \returns The lower 32 bits of the FS base register.
 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readfsbase_u32(void)
 {
   return __builtin_ia32_rdfsbase32();
 }
 
+/// Reads the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDFSBASE  instruction.
+///
+/// \returns The contents of the FS base register.
 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readfsbase_u64(void)
 {
   return __builtin_ia32_rdfsbase64();
 }
 
+/// Reads the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDGSBASE  instruction.
+///
+/// \returns The lower 32 bits of the GS base register.
 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readgsbase_u32(void)
 {
   return __builtin_ia32_rdgsbase32();
 }
 
+/// Reads the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  RDGSBASE  instruction.
+///
+/// \returns The contents of the GS base register.
 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _readgsbase_u64(void)
 {
   return __builtin_ia32_rdgsbase64();
 }
 
+/// Modifies the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRFSBASE  instruction.
+///
+/// \param __V
+///Value to use for the lower 32 bits of the FS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _writefsbase_u32(unsigned int __V)
 {
   __builtin_ia32_wrfsbase32(__V);
 }
 
+/// Modifies the FS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRFSBASE  instruction.
+///
+/// \param __V
+///Value to use for the FS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _writefsbase_u64(unsigned long long __V)
 {
   __builtin_ia32_wrfsbase64(__V);
 }
 
+/// Modifies the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRGSBASE  instruction.
+///
+/// \param __V
+///Value to use for the lower 32 bits of the GS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))
 _writegsbase_u32(unsigned int __V)
 {
   __builtin_ia32_wrgsbase32(__V);
 }
 
+/// Modifies the GS base register.
+///
+/// \headerfile 
+///
+/// This intrinsic corresponds to the  WRFSBASE  instruction.
+///
+/// \param __V
+///Value to use for GS base register.
 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase")))