[PATCH] D153836: [RISCV] Bump vector crypto to v1.0.0-rc1

[Brandon Wu via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG02f94a655fb6: [RISCV] Bump vector crypto to v1.0.0-rc1 
(authored by 4vtomat).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153836/new/

https://reviews.llvm.org/D153836

Files:
  clang/test/Preprocessor/riscv-target-features.c
  llvm/docs/RISCVUsage.rst
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/MC/RISCV/attribute-arch.s

Index: llvm/test/MC/RISCV/attribute-arch.s
===
--- llvm/test/MC/RISCV/attribute-arch.s
+++ llvm/test/MC/RISCV/attribute-arch.s
@@ -111,50 +111,50 @@
 .attribute arch, "rv32izbc1p0"
 # CHECK: attribute  5, "rv32i2p1_zbc1p0"
 
-.attribute arch, "rv32i_zve64x_zvbb0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvbb1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvbc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbc0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvbc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbc1p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvkg0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvkg1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvkn0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvkn1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvkn1p0_zvkned1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvknc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvknc0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvknc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zvbc1p0_zve32x1p0_zve64x1p0_zvkn1p0_zvknc1p0_zvkned1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvkng0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvkn0p9_zvkned0p9_zvkng0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvkng1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvkg1p0_zvkn1p0_zvkned1p0_zvkng1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvknha0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvknha1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvknhb0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p9_zvknhb0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvknhb1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha1p0_zvknhb1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvkned0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvkned1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvks0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvks1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvks1p0_zvksed1p0_zvksh1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvksc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksc0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvksc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zvbc1p0_zve32x1p0_zve64x1p0_zvks1p0_zvksc1p0_zvksed1p0_zvksh1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvksg0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvks0p9_zvksed0p9_zvksg0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvksg1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvkg1p0_zvks1p0_zvksed1p0_zvksg1p0_zvksh1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvksed0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksed0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvksed1p0"
+# CHECK: attribute  5, 

[PATCH] D153836: [RISCV] Bump vector crypto to v1.0.0-rc1

[Brandon Wu via Phabricator via cfe-commits]

4vtomat added a comment.

In D153836#4452236 , @asb wrote:

> Agreed that looking at 
> https://github.com/riscv/riscv-crypto/compare/v20230531...v20230620 there are 
> no changes that need to be reflected on the LLVM side beyond the version bump 
> here. LGTM

Thanks for reviewing!


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153836/new/

https://reviews.llvm.org/D153836

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[PATCH] D153836: [RISCV] Bump vector crypto to v1.0.0-rc1

[Alex Bradbury via Phabricator via cfe-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

Agreed that looking at 
https://github.com/riscv/riscv-crypto/compare/v20230531...v20230620 there are 
no changes that need to be reflected on the LLVM side beyond the version bump 
here. LGTM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153836/new/

https://reviews.llvm.org/D153836

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[PATCH] D153836: [RISCV] Bump vector crypto to v1.0.0-rc1

[Brandon Wu via Phabricator via cfe-commits]

4vtomat created this revision.
Herald added subscribers: jobnoorman, luke, VincentWu, vkmr, frasercrmck, 
jdoerfert, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, 
jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, 
zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, 
rbar, asb, hiraditya, arichardson.
Herald added a project: All.
4vtomat requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, wangpc, eopXD, MaskRay.
Herald added projects: clang, LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153836

Files:
  clang/test/Preprocessor/riscv-target-features.c
  llvm/docs/RISCVUsage.rst
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
  llvm/test/CodeGen/RISCV/attributes.ll
  llvm/test/MC/RISCV/attribute-arch.s

Index: llvm/test/MC/RISCV/attribute-arch.s
===
--- llvm/test/MC/RISCV/attribute-arch.s
+++ llvm/test/MC/RISCV/attribute-arch.s
@@ -111,50 +111,50 @@
 .attribute arch, "rv32izbc1p0"
 # CHECK: attribute  5, "rv32i2p1_zbc1p0"
 
-.attribute arch, "rv32i_zve64x_zvbb0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvbb1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvbc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbc0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvbc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbc1p0_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvkg0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvkg1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvkn0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvkn1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvkn1p0_zvkned1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvknc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvknc0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvknc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zvbc1p0_zve32x1p0_zve64x1p0_zvkn1p0_zvknc1p0_zvkned1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvkng0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvkn0p9_zvkned0p9_zvkng0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvkng1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvkg1p0_zvkn1p0_zvkned1p0_zvkng1p0_zvknha1p0_zvknhb1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvknha0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvknha1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvknhb0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p9_zvknhb0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvknhb1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha1p0_zvknhb1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve32x_zvkned0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p9_zvl32b1p0"
+.attribute arch, "rv32i_zve32x_zvkned1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned1p0_zvl32b1p0"
 
-.attribute arch, "rv32i_zve64x_zvks0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvks1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zve32x1p0_zve64x1p0_zvks1p0_zvksed1p0_zvksh1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvksc0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksc0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvksc1p0"
+# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb1p0_zvbc1p0_zve32x1p0_zve64x1p0_zvks1p0_zvksc1p0_zvksed1p0_zvksh1p0_zvkt1p0_zvl32b1p0_zvl64b1p0"
 
-.attribute arch, "rv32i_zve64x_zvksg0p9"
-# CHECK: attribute  5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvks0p9_zvksed0p9_zvksg0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0"
+.attribute arch, "rv32i_zve64x_zvksg1p0"
+# CHECK: attribute  5,