[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG696ea67f197f: Disable call to fma for soft-float (authored 
by long5hot).

Repository:
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Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17297,7 +17297,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17297,7 +17297,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

landing on this PR, from the conclusion of #55230 
 and D158632 
 conversation..
"If the llvm.fmuladd intrinsic reaches the backend, the backend is responsible 
for deciding how to represent it."


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

ping!


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

@nemanjai , @jhibbits  should i land on this commit, because as @shchenz  said, 
similiar to D158632  review we are having 
plan to do same for PPC.


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[PATCH] D156344: Disable call to fma for soft-float

[ChenZheng via Phabricator via cfe-commits]

shchenz added a comment.

In D156344#4583767 , @long5hot wrote:

> In D156344#4583559 , @shchenz wrote:
>
>> compiler-rt builtins library should not just undefining fma for PPC, right 
>> (see 
>> https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html)? If 
>> so, maybe we should at least first try not generating fma for soft-float at 
>> the first place where fmul + fadd is fused, like `tryEmitFMulAdd` in clang 
>> front end?
>
> I actually raised D154605  for that one, 
> but it's only for X86.
> I was relying on target-features containing "+fma", which is wrong. The 
> review was raised just to get feedback from community working on various 
> targets.
> Plan is to disable fma-intrinsic from IR for all targets which doesn't 
> support fma.

Thanks. I think `soft-float` looks like a candidate for the `hasFMA` function 
in D154605 .


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

In D156344#4583559 , @shchenz wrote:

> compiler-rt builtins library should not just undefining fma for PPC, right 
> (see https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html)? 
> If so, maybe we should at least first try not generating fma for soft-float 
> at the first place where fmul + fadd is fused, like `tryEmitFMulAdd` in clang 
> front end?

I actually raised D154605  for that one, but 
it's only for X86.
I was relying on target-features containing "+fma", which is wrong. The review 
was raised just to get feedback from community working on various targets.
Plan is to disable fma-intrinsic from IR for all targets which doesn't support 
fma.


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[PATCH] D156344: Disable call to fma for soft-float

[ChenZheng via Phabricator via cfe-commits]

shchenz added a comment.

compiler-rt builtins library should not just undefining fma for PPC, right (see 
https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html)? If so, 
maybe we should at least first try not generating fma for soft-float at the 
first place where fmul + fadd is fused, like `tryEmitFMulAdd` in clang front 
end?


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot added a comment.

Apologies for updating diff too many times, used arcanist first time. Won't 
happend again!


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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544438.

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Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
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[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544437.

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Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll
  llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn


Index: llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
===
--- llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
+++ llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
@@ -1,11 +1,20 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("Opts") {
+  visibility = [ ":sancov" ]
+  args = [ "-gen-opt-parser-defs" ]
+}
+
 executable("sancov") {
   deps = [
+":Opts",
 "//llvm/lib/DebugInfo/DWARF",
 "//llvm/lib/DebugInfo/PDB",
 "//llvm/lib/DebugInfo/Symbolize",
 "//llvm/lib/MC",
 "//llvm/lib/MC/MCDisassembler",
 "//llvm/lib/Object",
+"//llvm/lib/Option",
 "//llvm/lib/Support",
 "//llvm/lib/Target:AllTargetsDescs",
 "//llvm/lib/Target:AllTargetsDisassemblers",
Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:


Index: llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
===
--- llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
+++ llvm/utils/gn/secondary/llvm/tools/sancov/BUILD.gn
@@ -1,11 +1,20 @@
+import("//llvm/utils/TableGen/tablegen.gni")
+
+tablegen("Opts") {
+  visibility = [ ":sancov" ]
+  args = [ "-gen-opt-parser-defs" ]
+}
+
 executable("sancov") {
   deps = [
+":Opts",
 "//llvm/lib/DebugInfo/DWARF",
 "//llvm/lib/DebugInfo/PDB",
 "//llvm/lib/DebugInfo/Symbolize",
 "//llvm/lib/MC",
 "//llvm/lib/MC/MCDisassembler",
 "//llvm/lib/Object",
+"//llvm/lib/Option",
 "//llvm/lib/Support",
 "//llvm/lib/Target:AllTargetsDescs",
 "//llvm/lib/Target:AllTargetsDisassemblers",
Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,

[PATCH] D156344: Disable call to fma for soft-float

[Kishan Parmar via Phabricator via cfe-commits]

long5hot updated this revision to Diff 544432.
long5hot added a comment.
Herald added subscribers: cfe-commits, MaskRay.
Herald added a project: clang.

After clang release/16.x there is a regression that -mabi=elfv1
or -mabi=elfv2 are being unused and throws warning. But clang-trunk
throws error for -mabi=elfv2 or elfv1. Intent of this patch to accept
elfv1 or elfv2 for -mabi.


Repository:
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Files:
  clang/lib/Driver/ToolChains/Clang.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/ppcsoftops.ll


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, 
double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn 
memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn 
memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+  ABIName = "elfv1";
+  A->claim();
+} else if (V == "elfv2") {
+  ABIName = "elfv2";
+  A->claim();
 } else if (V != "altivec")
   // The ppc64 linux abis are all "altivec" abis by default. Accept and 
ignore
   // the option if given as we don't have backend support for any targets


Index: llvm/test/CodeGen/PowerPC/ppcsoftops.ll
===
--- llvm/test/CodeGen/PowerPC/ppcsoftops.ll
+++ llvm/test/CodeGen/PowerPC/ppcsoftops.ll
@@ -51,4 +51,25 @@
   ; CHECK-LABEL:  __divdf3
 }
 
+; Function Attrs: noinline nounwind optnone uwtable
+define dso_local zeroext i32 @func(double noundef %0, double noundef %1) #0 {
+  %3 = alloca double, align 8
+  %4 = alloca double, align 8
+  store double %0, ptr %3, align 8
+  store double %1, ptr %4, align 8
+  %5 = load double, ptr %3, align 8
+  %6 = load double, ptr %4, align 8
+  %7 = fneg double %6
+  %8 = call double @llvm.fmuladd.f64(double %7, double 0x41F0, double %5)
+  %9 = fptoui double %8 to i32
+  ret i32 %9
+
+  ; CHECK-LABEL:  __muldf3
+  ; CHECK-LABEL:  __adddf3
+}
+
+; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+declare double @llvm.fmuladd.f64(double, double, double) #1
+
 attributes #0 = {"use-soft-float"="true" }
+attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -17225,7 +17225,7 @@
 
 bool PPCTargetLowering::isFMAFasterThanFMulAndFAdd(const Function ,
Type *Ty) const {
-  if (Subtarget.hasSPE())
+  if (Subtarget.hasSPE() || Subtarget.useSoftFloat())
 return false;
   switch (Ty->getScalarType()->getTypeID()) {
   case Type::FloatTyID:
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -2068,6 +2068,12 @@
 } else if (V == "vec-extabi") {
   VecExtabi = true;
   A->claim();
+} else if (V == "elfv1") {
+