[PATCH] D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs

[Craig Topper via Phabricator via cfe-commits]

craig.topper added a comment.

There's a separate review for X86.d https://reviews.llvm.org/D34828


https://reviews.llvm.org/D34842



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[PATCH] D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs

[Simon Pilgrim via Phabricator via cfe-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM with a couple of comments.

On the LLVM side, X86.td GoldMont class looks like it needs RDRAND as well.




Comment at: lib/Basic/Targets.cpp:3310
 setFeatureEnabledImpl(Features, "cx16", true);
-  break;
+break;
   case CK_KNL:

Is it worth doing the reordering first as an NFC? Then add MOVBE?


https://reviews.llvm.org/D34842



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[PATCH] D34842: [X86] Add RDRND to Goldmont. Add MOVBE to all Atom CPUs

[Craig Topper via Phabricator via cfe-commits]

craig.topper created this revision.

This adds to RDNRND to Goldmont as I believe it has that feature in addition to 
RDSEED.

I don't know how to test the MOVBE part since we don't have a __MOVBE__ macro 
nor do we need one. The backend will already infer the feature from the CPU 
name. We do have a command line switch to force it on and off regardless of 
CPU. So really I don't even think this change is necessary, I just found it 
inconsistent that the movbe handling existed for the command line option, but 
was not bound to any CPU.


https://reviews.llvm.org/D34842

Files:
  lib/Basic/Targets.cpp
  test/Preprocessor/predefined-arch-macros.c


Index: test/Preprocessor/predefined-arch-macros.c
===
--- test/Preprocessor/predefined-arch-macros.c
+++ test/Preprocessor/predefined-arch-macros.c
@@ -996,6 +996,7 @@
 // CHECK_GLM_M32: #define __MPX__ 1
 // CHECK_GLM_M32: #define __PCLMUL__ 1
 // CHECK_GLM_M32: #define __POPCNT__ 1
+// CHECK_GLM_M32: #define __RDRND__ 1
 // CHECK_GLM_M32: #define __RDSEED__ 1
 // CHECK_GLM_M32: #define __SHA__ 1
 // CHECK_GLM_M32: #define __SSE2__ 1
@@ -1034,6 +1035,7 @@
 // CHECK_GLM_M64: #define __MPX__ 1
 // CHECK_GLM_M64: #define __PCLMUL__ 1
 // CHECK_GLM_M64: #define __POPCNT__ 1
+// CHECK_GLM_M64: #define __RDRND__ 1
 // CHECK_GLM_M64: #define __RDSEED__ 1
 // CHECK_GLM_M64: #define __SSE2__ 1
 // CHECK_GLM_M64: #define __SSE3__ 1
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -3224,7 +3224,6 @@
 setFeatureEnabledImpl(Features, "cx16", true);
 break;
   case CK_Core2:
-  case CK_Bonnell:
 setFeatureEnabledImpl(Features, "ssse3", true);
 setFeatureEnabledImpl(Features, "fxsr", true);
 setFeatureEnabledImpl(Features, "cx16", true);
@@ -3279,7 +3278,6 @@
 setFeatureEnabledImpl(Features, "xsaveopt", true);
 LLVM_FALLTHROUGH;
   case CK_Westmere:
-  case CK_Silvermont:
 setFeatureEnabledImpl(Features, "aes", true);
 setFeatureEnabledImpl(Features, "pclmul", true);
 LLVM_FALLTHROUGH;
@@ -3290,19 +3288,26 @@
 break;
   case CK_Goldmont:
 setFeatureEnabledImpl(Features, "sha", true);
+setFeatureEnabledImpl(Features, "rdrnd", true);
 setFeatureEnabledImpl(Features, "rdseed", true);
 setFeatureEnabledImpl(Features, "xsave", true);
 setFeatureEnabledImpl(Features, "xsaveopt", true);
 setFeatureEnabledImpl(Features, "xsavec", true);
 setFeatureEnabledImpl(Features, "xsaves", true);
 setFeatureEnabledImpl(Features, "clflushopt", true);
 setFeatureEnabledImpl(Features, "mpx", true);
+LLVM_FALLTHROUGH;
+  case CK_Silvermont:
 setFeatureEnabledImpl(Features, "aes", true);
 setFeatureEnabledImpl(Features, "pclmul", true);
 setFeatureEnabledImpl(Features, "sse4.2", true);
+LLVM_FALLTHROUGH;
+  case CK_Bonnell:
+setFeatureEnabledImpl(Features, "ssse3", true);
+setFeatureEnabledImpl(Features, "movbe", true);
 setFeatureEnabledImpl(Features, "fxsr", true);
 setFeatureEnabledImpl(Features, "cx16", true);
-  break;
+break;
   case CK_KNL:
 setFeatureEnabledImpl(Features, "avx512f", true);
 setFeatureEnabledImpl(Features, "avx512cd", true);


Index: test/Preprocessor/predefined-arch-macros.c
===
--- test/Preprocessor/predefined-arch-macros.c
+++ test/Preprocessor/predefined-arch-macros.c
@@ -996,6 +996,7 @@
 // CHECK_GLM_M32: #define __MPX__ 1
 // CHECK_GLM_M32: #define __PCLMUL__ 1
 // CHECK_GLM_M32: #define __POPCNT__ 1
+// CHECK_GLM_M32: #define __RDRND__ 1
 // CHECK_GLM_M32: #define __RDSEED__ 1
 // CHECK_GLM_M32: #define __SHA__ 1
 // CHECK_GLM_M32: #define __SSE2__ 1
@@ -1034,6 +1035,7 @@
 // CHECK_GLM_M64: #define __MPX__ 1
 // CHECK_GLM_M64: #define __PCLMUL__ 1
 // CHECK_GLM_M64: #define __POPCNT__ 1
+// CHECK_GLM_M64: #define __RDRND__ 1
 // CHECK_GLM_M64: #define __RDSEED__ 1
 // CHECK_GLM_M64: #define __SSE2__ 1
 // CHECK_GLM_M64: #define __SSE3__ 1
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -3224,7 +3224,6 @@
 setFeatureEnabledImpl(Features, "cx16", true);
 break;
   case CK_Core2:
-  case CK_Bonnell:
 setFeatureEnabledImpl(Features, "ssse3", true);
 setFeatureEnabledImpl(Features, "fxsr", true);
 setFeatureEnabledImpl(Features, "cx16", true);
@@ -3279,7 +3278,6 @@
 setFeatureEnabledImpl(Features, "xsaveopt", true);
 LLVM_FALLTHROUGH;
   case CK_Westmere:
-  case CK_Silvermont:
 setFeatureEnabledImpl(Features, "aes", true);
 setFeatureEnabledImpl(Features, "pclmul", true);
 LLVM_FALLTHROUGH;
@@ -3290,19 +3288,26 @@
 break;
   case CK_Goldmont:
 setFeatureEnabledImpl(Features, "sha", true);
+setFeatureEnabledImpl(Features, "rdrnd", true);