[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-31 Thread Momchil Velikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL367428: [AArch64] Add support for Transactional Memory 
Extension (TME) (authored by chill, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D64416?vs=212332=212559#toc

Repository:
  rL LLVM

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Files:
  cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
  cfe/trunk/lib/Basic/Targets/AArch64.cpp
  cfe/trunk/lib/Basic/Targets/AArch64.h
  cfe/trunk/lib/Headers/arm_acle.h
  cfe/trunk/lib/Sema/SemaChecking.cpp
  cfe/trunk/test/CodeGen/aarch64-tme.cpp
  cfe/trunk/test/Sema/aarch64-tme-errors.c
  cfe/trunk/test/Sema/aarch64-tme-tcancel-errors.c
  llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
  llvm/trunk/include/llvm/Support/AArch64TargetParser.def
  llvm/trunk/include/llvm/Support/AArch64TargetParser.h
  llvm/trunk/lib/Target/AArch64/AArch64.td
  llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
  llvm/trunk/test/CodeGen/AArch64/tme.ll
  llvm/trunk/test/MC/AArch64/tme-error.s
  llvm/trunk/test/MC/AArch64/tme.s
  llvm/trunk/test/MC/Disassembler/AArch64/tme.txt
  llvm/trunk/unittests/Support/TargetParserTest.cpp

Index: llvm/trunk/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/trunk/include/llvm/Support/AArch64TargetParser.def
+++ llvm/trunk/include/llvm/Support/AArch64TargetParser.def
@@ -79,6 +79,7 @@
 AARCH64_ARCH_EXT_NAME("ssbs", AArch64::AEK_SSBS,"+ssbs",  "-ssbs")
 AARCH64_ARCH_EXT_NAME("sb",   AArch64::AEK_SB,  "+sb","-sb")
 AARCH64_ARCH_EXT_NAME("predres",  AArch64::AEK_PREDRES, "+predres", "-predres")
+AARCH64_ARCH_EXT_NAME("tme",  AArch64::AEK_TME, "+tme",   "-tme")
 #undef AARCH64_ARCH_EXT_NAME
 
 #ifndef AARCH64_CPU_NAME
Index: llvm/trunk/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/trunk/include/llvm/Support/AArch64TargetParser.h
+++ llvm/trunk/include/llvm/Support/AArch64TargetParser.h
@@ -54,6 +54,7 @@
   AEK_SVE2SM4 = 1 << 25,
   AEK_SVE2SHA3 =1 << 26,
   AEK_SVE2BITPERM = 1 << 27,
+  AEK_TME = 1 << 28,
 };
 
 enum class ArchKind {
Index: llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
@@ -733,3 +733,18 @@
 def int_aarch64_stgp  : Intrinsic<[], [llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty],
 [IntrWriteMem, IntrArgMemOnly, NoCapture<0>, WriteOnly<0>]>;
 }
+
+// Transactional Memory Extension (TME) Intrinsics
+let TargetPrefix = "aarch64" in {
+def int_aarch64_tstart  : GCCBuiltin<"__builtin_arm_tstart">,
+ Intrinsic<[llvm_i64_ty]>;
+
+def int_aarch64_tcommit : GCCBuiltin<"__builtin_arm_tcommit">, Intrinsic<[]>;
+
+def int_aarch64_tcancel : GCCBuiltin<"__builtin_arm_tcancel">,
+  Intrinsic<[], [llvm_i64_ty], [ImmArg<0>]>;
+
+def int_aarch64_ttest   : GCCBuiltin<"__builtin_arm_ttest">,
+  Intrinsic<[llvm_i64_ty], [],
+[IntrNoMem, IntrHasSideEffects]>;
+}
Index: llvm/trunk/test/CodeGen/AArch64/tme.ll
===
--- llvm/trunk/test/CodeGen/AArch64/tme.ll
+++ llvm/trunk/test/CodeGen/AArch64/tme.ll
@@ -0,0 +1,44 @@
+; RUN: llc %s -verify-machineinstrs -o - | FileCheck %s
+
+target triple = "aarch64-unknown-unknown-eabi"
+
+define i64 @test_tstart() #0 {
+  %r = tail call i64 @llvm.aarch64.tstart()
+  ret i64 %r
+}
+declare i64 @llvm.aarch64.tstart() #1
+; CHECK-LABEL: test_tstart
+; CHECK: tstart x
+
+define i64 @test_ttest() #0 {
+  %r = tail call i64 @llvm.aarch64.ttest()
+  ret i64 %r
+}
+declare i64 @llvm.aarch64.ttest() #1
+; CHECK-LABEL: test_ttest
+; CHECK: ttest x
+
+define void @test_tcommit() #0 {
+  tail call void @llvm.aarch64.tcommit()
+  ret void
+}
+declare void @llvm.aarch64.tcommit() #1
+; CHECK-LABEL: test_tcommit
+; CHECK: tcommit
+
+define void @test_tcancel() #0 {
+  tail call void @llvm.aarch64.tcancel(i64 0) #1
+  tail call void @llvm.aarch64.tcancel(i64 1) #1
+  tail call void @llvm.aarch64.tcancel(i64 65534) #1
+  tail call void @llvm.aarch64.tcancel(i64 65535) #1
+  ret void
+}
+declare void @llvm.aarch64.tcancel(i64 immarg) #1
+; CHECK-LABEL: test_tcancel
+; CHECK: tcancel #0
+; CHECK: tcancel #0x1
+; CHECK: tcancel #0xfffe
+; CHECK: tcancel #0x
+
+attributes #0 = { "target-features"="+tme" }
+attributes #1 = { nounwind }
Index: llvm/trunk/test/MC/AArch64/tme-error.s
===
--- llvm/trunk/test/MC/AArch64/tme-error.s
+++

[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-30 Thread Momchil Velikov via Phabricator via cfe-commits 
chill updated this revision to Diff 212332.
chill added a comment.

Rebase on top of master.


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Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/Headers/arm_acle.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/aarch64-tme.cpp
  clang/test/Sema/aarch64-tme-errors.c
  clang/test/Sema/aarch64-tme-tcancel-errors.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/test/CodeGen/AArch64/tme.ll
  llvm/test/MC/AArch64/tme-error.s
  llvm/test/MC/AArch64/tme.s
  llvm/test/MC/Disassembler/AArch64/tme.txt
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1153,6 +1153,7 @@
   {"rcpc", "norcpc", "+rcpc", "-rcpc" },
   {"rng", "norng", "+rand", "-rand"},
   {"memtag", "nomemtag", "+mte", "-mte"},
+  {"tme", "notme", "+tme", "-tme"},
   {"ssbs", "nossbs", "+ssbs", "-ssbs"},
   {"sb", "nosb", "+sb", "-sb"},
   {"predres", "nopredres", "+predres", "-predres"}
Index: llvm/test/MC/Disassembler/AArch64/tme.txt
===
--- /dev/null
+++ llvm/test/MC/Disassembler/AArch64/tme.txt
@@ -0,0 +1,19 @@
+# Tests for transaction memory extension instructions
+# RUN: llvm-mc -triple=aarch64 -mattr=+tme   -disassemble < %s  | FileCheck %s
+# RUN: not llvm-mc -triple=aarch64 -mattr=-tme   -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+[0x63,0x30,0x23,0xd5]
+[0x64,0x31,0x23,0xd5]
+[0x7f,0x30,0x03,0xd5]
+[0x80,0x46,0x62,0xd4]
+
+# CHECK: tstart x3
+# CHECK: ttest  x4
+# CHECK: tcommit
+# CHECK: tcancel #0x1234
+
+# NOTEME: mrs
+# NOTEME-NEXT: mrs
+# NOTEME-NEXT: msr
+# NOTME:  warning: invalid instruction encoding
+# NOTME-NEXT: [0x80,0x46,0x62,0xd4]
Index: llvm/test/MC/AArch64/tme.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme.s
@@ -0,0 +1,24 @@
+// Tests for transaction memory extension instructions
+//
+// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+tme   < %s  | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-tme   < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+tstart x3
+ttest  x4
+tcommit
+tcancel #0x1234
+
+// CHECK: tstart x3 // encoding: [0x63,0x30,0x23,0xd5]
+// CHECK: ttest x4  // encoding: [0x64,0x31,0x23,0xd5]
+// CHECK: tcommit   // encoding: [0x7f,0x30,0x03,0xd5]
+// CHECK: tcancel #0x1234   // encoding: [0x80,0x46,0x62,0xd4]
+
+
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tstart x3
+// NOTME: instruction requires: tme
+// NOTME-NEXT: ttest  x4
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcommit
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcancel #0x1234
Index: llvm/test/MC/AArch64/tme-error.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme-error.s
@@ -0,0 +1,47 @@
+// Tests for transactional memory extension instructions
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+tme < %s 2>&1   | FileCheck %s
+
+tstart
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: tstart
+tstart  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, x5
+tstart  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, #1
+tstart  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart sp
+
+ttest
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: ttest
+ttest  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, x5
+ttest  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, #1
+ttest  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest sp
+
+tcommit  x4
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tcommit x4
+tcommit  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tcommit sp
+
+
+tcancel
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT tcancel
+tcancel x0
+// CHECK: error: immediate must be an integer in range [0, 65535]
+// CHECK-NEXT tcancel
+tcancel #65536
+// CHECK: error: immediate must be an integer in

[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-29 Thread Momchil Velikov via Phabricator via cfe-commits 
chill added a comment.

If there are no objections, I'll go ahead with committing that Soon(tm) on the 
basis of previous acceptance.


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-22 Thread Momchil Velikov via Phabricator via cfe-commits 
chill updated this revision to Diff 211140.
This revision is now accepted and ready to land.

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Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/Headers/arm_acle.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/aarch64-tme.cpp
  clang/test/Sema/aarch64-tme-errors.c
  clang/test/Sema/aarch64-tme-tcancel-errors.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/test/CodeGen/AArch64/tme.ll
  llvm/test/MC/AArch64/tme-error.s
  llvm/test/MC/AArch64/tme.s
  llvm/test/MC/Disassembler/AArch64/tme.txt
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1119,6 +1119,7 @@
   {"rcpc", "norcpc", "+rcpc", "-rcpc" },
   {"rng", "norng", "+rand", "-rand"},
   {"memtag", "nomemtag", "+mte", "-mte"},
+  {"tme", "notme", "+tme", "-tme"},
   {"ssbs", "nossbs", "+ssbs", "-ssbs"},
   {"sb", "nosb", "+sb", "-sb"},
   {"predres", "nopredres", "+predres", "-predres"}
Index: llvm/test/MC/Disassembler/AArch64/tme.txt
===
--- /dev/null
+++ llvm/test/MC/Disassembler/AArch64/tme.txt
@@ -0,0 +1,19 @@
+# Tests for transaction memory extension instructions
+# RUN: llvm-mc -triple=aarch64 -mattr=+tme   -disassemble < %s  | FileCheck %s
+# RUN: not llvm-mc -triple=aarch64 -mattr=-tme   -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+[0x63,0x30,0x23,0xd5]
+[0x64,0x31,0x23,0xd5]
+[0x7f,0x30,0x03,0xd5]
+[0x80,0x46,0x62,0xd4]
+
+# CHECK: tstart x3
+# CHECK: ttest  x4
+# CHECK: tcommit
+# CHECK: tcancel #0x1234
+
+# NOTEME: mrs
+# NOTEME-NEXT: mrs
+# NOTEME-NEXT: msr
+# NOTME:  warning: invalid instruction encoding
+# NOTME-NEXT: [0x80,0x46,0x62,0xd4]
Index: llvm/test/MC/AArch64/tme.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme.s
@@ -0,0 +1,24 @@
+// Tests for transaction memory extension instructions
+//
+// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+tme   < %s  | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-tme   < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+tstart x3
+ttest  x4
+tcommit
+tcancel #0x1234
+
+// CHECK: tstart x3 // encoding: [0x63,0x30,0x23,0xd5]
+// CHECK: ttest x4  // encoding: [0x64,0x31,0x23,0xd5]
+// CHECK: tcommit   // encoding: [0x7f,0x30,0x03,0xd5]
+// CHECK: tcancel #0x1234   // encoding: [0x80,0x46,0x62,0xd4]
+
+
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tstart x3
+// NOTME: instruction requires: tme
+// NOTME-NEXT: ttest  x4
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcommit
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcancel #0x1234
Index: llvm/test/MC/AArch64/tme-error.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme-error.s
@@ -0,0 +1,47 @@
+// Tests for transactional memory extension instructions
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+tme < %s 2>&1   | FileCheck %s
+
+tstart
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: tstart
+tstart  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, x5
+tstart  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, #1
+tstart  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart sp
+
+ttest
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: ttest
+ttest  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, x5
+ttest  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, #1
+ttest  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest sp
+
+tcommit  x4
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tcommit x4
+tcommit  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tcommit sp
+
+
+tcancel
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT tcancel
+tcancel x0
+// CHECK: error: immediate must be an integer in range [0, 65535]
+// CHECK-NEXT tcancel
+tcancel #65536
+// CHECK: error: immediate must be an integer in range

[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-19 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added inline comments.



Comment at: llvm/test/CodeGen/AArch64/tme-tcancel.ll:1
+; RUN: llc %s -o - | FileCheck %s
+

Would it make sense to add -verify-machineinstrs to all these 
Codegen/AArch64/tme-*.ll tests?


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-19 Thread Tim Northover via Phabricator via cfe-commits 
t.p.northover added inline comments.



Comment at: clang/test/Sema/aarch64-tme-errors.c:1
+// RUN: %clang_cc1 -triple aarch64-eabi -verify %s
+

I don't think the Sema checks need to be split over so many files. One for the 
whole of transactional seems enough. Similarly for CodeGen really.



Comment at: llvm/test/CodeGen/AArch64/tme-tcancel.ll:6
+define void @test_tcancel() #0 {
+  tail call void @llvm.aarch64.tcancel(i64 0) #1
+  ret void

Testing more values than 0 would be a good idea.


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-19 Thread Oliver Stannard (Linaro) via Phabricator via cfe-commits 
ostannard accepted this revision.
ostannard added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-19 Thread Momchil Velikov via Phabricator via cfe-commits 
chill updated this revision to Diff 210768.
chill added a comment.
This revision is now accepted and ready to land.

Changed `tcancel` implementation.


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Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/Headers/arm_acle.h
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/aarch64-tme-tcancel-arg.cpp
  clang/test/CodeGen/aarch64-tme.c
  clang/test/Sema/aarch64-tme-errors.c
  clang/test/Sema/aarch64-tme-tcancel-const-error.c
  clang/test/Sema/aarch64-tme-tcancel-range-error.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/include/llvm/Support/AArch64TargetParser.def
  llvm/include/llvm/Support/AArch64TargetParser.h
  llvm/lib/Target/AArch64/AArch64.td
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/test/CodeGen/AArch64/tme-tcancel.ll
  llvm/test/CodeGen/AArch64/tme-tcommit.ll
  llvm/test/CodeGen/AArch64/tme-tstart.ll
  llvm/test/CodeGen/AArch64/tme-ttest.ll
  llvm/test/MC/AArch64/tme-error.s
  llvm/test/MC/AArch64/tme.s
  llvm/test/MC/Disassembler/AArch64/tme.txt
  llvm/unittests/Support/TargetParserTest.cpp

Index: llvm/unittests/Support/TargetParserTest.cpp
===
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -1119,6 +1119,7 @@
   {"rcpc", "norcpc", "+rcpc", "-rcpc" },
   {"rng", "norng", "+rand", "-rand"},
   {"memtag", "nomemtag", "+mte", "-mte"},
+  {"tme", "notme", "+tme", "-tme"},
   {"ssbs", "nossbs", "+ssbs", "-ssbs"},
   {"sb", "nosb", "+sb", "-sb"},
   {"predres", "nopredres", "+predres", "-predres"}
Index: llvm/test/MC/Disassembler/AArch64/tme.txt
===
--- /dev/null
+++ llvm/test/MC/Disassembler/AArch64/tme.txt
@@ -0,0 +1,19 @@
+# Tests for transaction memory extension instructions
+# RUN: llvm-mc -triple=aarch64 -mattr=+tme   -disassemble < %s  | FileCheck %s
+# RUN: not llvm-mc -triple=aarch64 -mattr=-tme   -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+[0x63,0x30,0x23,0xd5]
+[0x64,0x31,0x23,0xd5]
+[0x7f,0x30,0x03,0xd5]
+[0x80,0x46,0x62,0xd4]
+
+# CHECK: tstart x3
+# CHECK: ttest  x4
+# CHECK: tcommit
+# CHECK: tcancel #0x1234
+
+# NOTEME: mrs
+# NOTEME-NEXT: mrs
+# NOTEME-NEXT: msr
+# NOTME:  warning: invalid instruction encoding
+# NOTME-NEXT: [0x80,0x46,0x62,0xd4]
Index: llvm/test/MC/AArch64/tme.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme.s
@@ -0,0 +1,24 @@
+// Tests for transaction memory extension instructions
+//
+// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+tme   < %s  | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-tme   < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+tstart x3
+ttest  x4
+tcommit
+tcancel #0x1234
+
+// CHECK: tstart x3 // encoding: [0x63,0x30,0x23,0xd5]
+// CHECK: ttest x4  // encoding: [0x64,0x31,0x23,0xd5]
+// CHECK: tcommit   // encoding: [0x7f,0x30,0x03,0xd5]
+// CHECK: tcancel #0x1234   // encoding: [0x80,0x46,0x62,0xd4]
+
+
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tstart x3
+// NOTME: instruction requires: tme
+// NOTME-NEXT: ttest  x4
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcommit
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcancel #0x1234
Index: llvm/test/MC/AArch64/tme-error.s
===
--- /dev/null
+++ llvm/test/MC/AArch64/tme-error.s
@@ -0,0 +1,47 @@
+// Tests for transactional memory extension instructions
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+tme < %s 2>&1   | FileCheck %s
+
+tstart
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: tstart
+tstart  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, x5
+tstart  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart x4, #1
+tstart  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tstart sp
+
+ttest
+// CHECK: error: too few operands for instruction
+// CHECK-NEXT: ttest
+ttest  x4, x5
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, x5
+ttest  x4, #1
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest x4, #1
+ttest  sp
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: ttest sp
+
+tcommit  x4
+// CHECK: error: invalid operand for instruction
+// CHECK-NEXT: tcommit x4
+tcommit  sp
+// CHECK: error: invalid operand for

[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-18 Thread Momchil Velikov via Phabricator via cfe-commits 
chill reopened this revision.
chill added a comment.
This revision is now accepted and ready to land.

I reverted the patch, have to rework `tcancel`.


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Re: [PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-17 Thread Momchil Velikov via cfe-commits 
Thanks, I've reverted it for now.


From: Simon Pilgrim via Phabricator 
Sent: 17 July 2019 18:23:29
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jdoerf...@anl.gov
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Subject: [PATCH] D64416: [AArch64] Add support for Transactional Memory 
Extension (TME)

RKSimon added a comment.

@chill This is failing on buildbots with EXPENSIVE_CHECKS enabled: 
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/18684/steps/test-check-all/logs/stdio


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-17 Thread Simon Pilgrim via Phabricator via cfe-commits 
RKSimon added a comment.

@chill This is failing on buildbots with EXPENSIVE_CHECKS enabled: 
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/18684/steps/test-check-all/logs/stdio


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[PATCH] D64416: [AArch64] Add support for Transactional Memory Extension (TME)

2019-07-17 Thread Momchil Velikov via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL366322: [AArch64] Add support for Transactional Memory 
Extension (TME) (authored by chill, committed by ).
Herald added a subscriber: kristina.

Changed prior to commit:
  https://reviews.llvm.org/D64416?vs=209188=210310#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
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Files:
  cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
  cfe/trunk/lib/Basic/Targets/AArch64.cpp
  cfe/trunk/lib/Basic/Targets/AArch64.h
  cfe/trunk/lib/Headers/arm_acle.h
  cfe/trunk/lib/Sema/SemaChecking.cpp
  cfe/trunk/test/CodeGen/aarch64-tme-tcancel-arg.cpp
  cfe/trunk/test/CodeGen/aarch64-tme.c
  cfe/trunk/test/Sema/aarch64-tme-errors.c
  cfe/trunk/test/Sema/aarch64-tme-tcancel-const-error.c
  cfe/trunk/test/Sema/aarch64-tme-tcancel-range-error.c
  llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
  llvm/trunk/include/llvm/Support/AArch64TargetParser.def
  llvm/trunk/include/llvm/Support/AArch64TargetParser.h
  llvm/trunk/lib/Target/AArch64/AArch64.td
  llvm/trunk/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
  llvm/trunk/test/CodeGen/AArch64/tme-tcancel.ll
  llvm/trunk/test/CodeGen/AArch64/tme-tcommit.ll
  llvm/trunk/test/CodeGen/AArch64/tme-tstart.ll
  llvm/trunk/test/CodeGen/AArch64/tme-ttest.ll
  llvm/trunk/test/MC/AArch64/tme-error.s
  llvm/trunk/test/MC/AArch64/tme.s
  llvm/trunk/test/MC/Disassembler/AArch64/tme.txt
  llvm/trunk/unittests/Support/TargetParserTest.cpp

Index: llvm/trunk/include/llvm/Support/AArch64TargetParser.def
===
--- llvm/trunk/include/llvm/Support/AArch64TargetParser.def
+++ llvm/trunk/include/llvm/Support/AArch64TargetParser.def
@@ -79,6 +79,7 @@
 AARCH64_ARCH_EXT_NAME("ssbs",  AArch64::AEK_SSBS, "+ssbs",  "-ssbs")
 AARCH64_ARCH_EXT_NAME("sb",AArch64::AEK_SB,   "+sb","-sb")
 AARCH64_ARCH_EXT_NAME("predres",   AArch64::AEK_PREDRES,  "+predres", "-predres")
+AARCH64_ARCH_EXT_NAME("tme",   AArch64::AEK_TME,  "+tme",   "-tme")
 #undef AARCH64_ARCH_EXT_NAME
 
 #ifndef AARCH64_CPU_NAME
Index: llvm/trunk/include/llvm/Support/AArch64TargetParser.h
===
--- llvm/trunk/include/llvm/Support/AArch64TargetParser.h
+++ llvm/trunk/include/llvm/Support/AArch64TargetParser.h
@@ -54,6 +54,7 @@
   AEK_SVE2SM4 = 1 << 25,
   AEK_SVE2SHA3 =1 << 26,
   AEK_BITPERM = 1 << 27,
+  AEK_TME = 1 << 28,
 };
 
 enum class ArchKind {
Index: llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
@@ -703,3 +703,20 @@
 def int_aarch64_subp :  Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_ptr_ty],
 [IntrNoMem]>;
 }
+
+// Transactional Memory Extension (TME) Intrinsics
+let TargetPrefix = "aarch64" in {
+def int_aarch64_tstart  : GCCBuiltin<"__builtin_arm_tstart">,
+ Intrinsic<[llvm_i64_ty]>;
+
+def int_aarch64_tcommit : GCCBuiltin<"__builtin_arm_tcommit">, Intrinsic<[]>;
+
+def int_aarch64_tcancel : GCCBuiltin<"__builtin_arm_tcancel">,
+  Intrinsic<[], [llvm_i64_ty],
+[ImmArg<0>, IntrNoMem, IntrHasSideEffects,
+ IntrNoReturn]>;
+
+def int_aarch64_ttest   : GCCBuiltin<"__builtin_arm_ttest">,
+  Intrinsic<[llvm_i64_ty], [],
+[IntrNoMem, IntrHasSideEffects]>;
+}
Index: llvm/trunk/test/MC/AArch64/tme.s
===
--- llvm/trunk/test/MC/AArch64/tme.s
+++ llvm/trunk/test/MC/AArch64/tme.s
@@ -0,0 +1,24 @@
+// Tests for transaction memory extension instructions
+//
+// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+tme   < %s  | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-tme   < %s 2>&1 | FileCheck %s --check-prefix=NOTME
+
+tstart x3
+ttest  x4
+tcommit
+tcancel #0x1234
+
+// CHECK: tstart x3 // encoding: [0x63,0x30,0x23,0xd5]
+// CHECK: ttest x4  // encoding: [0x64,0x31,0x23,0xd5]
+// CHECK: tcommit   // encoding: [0x7f,0x30,0x03,0xd5]
+// CHECK: tcancel #0x1234   // encoding: [0x80,0x46,0x62,0xd4]
+
+
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tstart x3
+// NOTME: instruction requires: tme
+// NOTME-NEXT: ttest  x4
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcommit
+// NOTME: instruction requires: tme
+// NOTME-NEXT: tcancel #0x1234
Index: llvm/trunk/test/MC/AArch64/tme-error.s
===
--- llvm/trunk/test/MC/AArch64/tme-error.s
+++