[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-16 Thread Kyrill Tkachov via Phabricator via cfe-commits
ktkachov added a comment.

In D64495#1587266 , @sammccall wrote:

> FYI, this change broke git-llvm for everyone with a different username :-)
>  Fixed in r366198


Ah sorry, I accidentally included it in the commit!


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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-16 Thread Sam McCall via Phabricator via cfe-commits
sammccall added a comment.

FYI, this change broke git-llvm for everyone with a different username :-)
Fixed in r366198


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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-16 Thread Kyrill Tkachov via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rL366197: [AArch64] Implement __jcvt intrinsic from Armv8.3-A 
(authored by ktkachov, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D64495?vs=209149=210051#toc

Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
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Files:
  cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
  cfe/trunk/lib/Basic/Targets/AArch64.cpp
  cfe/trunk/lib/Basic/Targets/AArch64.h
  cfe/trunk/lib/CodeGen/CGBuiltin.cpp
  cfe/trunk/lib/Headers/arm_acle.h
  cfe/trunk/test/CodeGen/arm_acle.c
  cfe/trunk/test/CodeGen/builtins-arm64.c
  llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
  llvm/trunk/utils/git-svn/git-llvm

Index: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
===
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
@@ -717,7 +717,9 @@
 // v8.3a floating point conversion for javascript
 let Predicates = [HasJS, HasFPARMv8] in
 def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
-  "fjcvtzs", []> {
+  "fjcvtzs",
+  [(set GPR32:$Rd,
+ (int_aarch64_fjcvtzs FPR64:$Rn))]> {
   let Inst{31} = 0;
 } // HasJS, HasFPARMv8
 
Index: llvm/trunk/utils/git-svn/git-llvm
===
--- llvm/trunk/utils/git-svn/git-llvm
+++ llvm/trunk/utils/git-svn/git-llvm
@@ -372,7 +372,7 @@
 # Now we're ready to commit.
 commit_msg = git('show', '--pretty=%B', '--quiet', rev)
 if not dry_run:
-commit_args = ['commit', '-m', commit_msg]
+commit_args = ['commit', '-m', commit_msg, '--username', 'ktkachov']
 if '--force-interactive' in svn(svn_repo, 'commit', '--help'):
 commit_args.append('--force-interactive')
 log(svn(svn_repo, *commit_args))
Index: llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/trunk/include/llvm/IR/IntrinsicsAArch64.td
@@ -31,6 +31,8 @@
 def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
 LLVMMatchType<0>], [IntrNoMem]>;
 
+def int_aarch64_fjcvtzs : Intrinsic<[llvm_i32_ty], [llvm_double_ty], [IntrNoMem]>;
+
 //===--===//
 // HINT
 
Index: llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
===
--- llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
+++ llvm/trunk/test/CodeGen/AArch64/fjcvtzs.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s
+
+define i32 @test_jcvt(double %v) {
+; CHECK-LABEL: test_jcvt:
+; CHECK: fjcvtzs w0, d0
+  %val = call i32 @llvm.aarch64.fjcvtzs(double %v)
+  ret i32 %val
+}
+
+declare i32 @llvm.aarch64.fjcvtzs(double)
Index: cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
===
--- cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
+++ cfe/trunk/include/clang/Basic/BuiltinsAArch64.def
@@ -65,6 +65,8 @@
 BUILTIN(__builtin_arm_dsb, "vUi", "nc")
 BUILTIN(__builtin_arm_isb, "vUi", "nc")
 
+BUILTIN(__builtin_arm_jcvt, "Zid", "nc")
+
 // Prefetch
 BUILTIN(__builtin_arm_prefetch, "vvC*UiUiUiUi", "nc")
 
Index: cfe/trunk/test/CodeGen/arm_acle.c
===
--- cfe/trunk/test/CodeGen/arm_acle.c
+++ cfe/trunk/test/CodeGen/arm_acle.c
@@ -2,6 +2,9 @@
 // RUN: %clang_cc1 -ffreestanding -triple armv8-eabi -target-cpu cortex-a57 -O2  -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch32 -check-prefix=ARM-NEWPM -check-prefix=AArch32-NEWPM
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fno-experimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-LEGACY -check-prefix=AArch64-LEGACY
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-NEWPM -check-prefix=AArch64-NEWPM
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.3a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3
+// RUN: 

[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-11 Thread Kyrill Tkachov via Phabricator via cfe-commits
ktkachov updated this revision to Diff 209149.
ktkachov added a comment.

Fix comments plus an offline comment I had (copy-pasto in an assert message)


CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/arm_acle.h
  clang/test/CodeGen/arm_acle.c
  clang/test/CodeGen/builtins-arm64.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/fjcvtzs.ll

Index: llvm/test/CodeGen/AArch64/fjcvtzs.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/fjcvtzs.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s
+
+define i32 @test_jcvt(double %v) {
+; CHECK-LABEL: test_jcvt:
+; CHECK: fjcvtzs w0, d0
+  %val = call i32 @llvm.aarch64.fjcvtzs(double %v)
+  ret i32 %val
+}
+
+declare i32 @llvm.aarch64.fjcvtzs(double)
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -717,7 +717,9 @@
 // v8.3a floating point conversion for javascript
 let Predicates = [HasJS, HasFPARMv8] in
 def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
-  "fjcvtzs", []> {
+  "fjcvtzs",
+  [(set GPR32:$Rd,
+ (int_aarch64_fjcvtzs FPR64:$Rn))]> {
   let Inst{31} = 0;
 } // HasJS, HasFPARMv8
 
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -31,6 +31,8 @@
 def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
 LLVMMatchType<0>], [IntrNoMem]>;
 
+def int_aarch64_fjcvtzs : Intrinsic<[llvm_i32_ty], [llvm_double_ty], [IntrNoMem]>;
+
 //===--===//
 // HINT
 
Index: clang/test/CodeGen/builtins-arm64.c
===
--- clang/test/CodeGen/builtins-arm64.c
+++ clang/test/CodeGen/builtins-arm64.c
@@ -58,6 +58,12 @@
 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
 }
 
+int32_t jcvt(double v) {
+  //CHECK-LABEL: @jcvt(
+  //CHECK: call i32 @llvm.aarch64.fjcvtzs
+  return __builtin_arm_jcvt(v);
+}
+
 __typeof__(__builtin_arm_rsr("1:2:3:4:5")) rsr(void);
 
 uint32_t rsr() {
Index: clang/test/CodeGen/arm_acle.c
===
--- clang/test/CodeGen/arm_acle.c
+++ clang/test/CodeGen/arm_acle.c
@@ -2,6 +2,9 @@
 // RUN: %clang_cc1 -ffreestanding -triple armv8-eabi -target-cpu cortex-a57 -O2  -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch32 -check-prefix=ARM-NEWPM -check-prefix=AArch32-NEWPM
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fno-experimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-LEGACY -check-prefix=AArch64-LEGACY
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-NEWPM -check-prefix=AArch64-NEWPM
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.3a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.4a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.5a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3
 
 #include 
 
@@ -823,3 +826,11 @@
 
 // AArch64: ![[M0]] = !{!"1:2:3:4:5"}
 // AArch64: ![[M1]] = !{!"sysreg"}
+
+// AArch64-v8_3-LABEL: @test_jcvt(
+// AArch64-v8_3: call i32 @llvm.aarch64.fjcvtzs
+#ifdef __ARM_64BIT_STATE
+int32_t test_jcvt(double v) {
+  return __jcvt(v);
+}
+#endif
Index: clang/lib/Headers/arm_acle.h
===
--- clang/lib/Headers/arm_acle.h
+++ clang/lib/Headers/arm_acle.h
@@ -597,6 +597,14 @@
 }
 #endif
 
+/* 

[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Sjoerd Meijer via Phabricator via cfe-commits
SjoerdMeijer accepted this revision.
SjoerdMeijer added a comment.
This revision is now accepted and ready to land.

Looks like a good change to me, some nits inlined.

It shouldn't be difficult to request an account and commit it yourself, which 
might be useful if you maybe intend to submit more patches. 
But I can of course easily commit this on your behalf, just let me know. If you 
want me to commit this, it is easiest if you do upload a new diff with the nits 
fixed.




Comment at: clang/test/CodeGen/arm_acle.c:5
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 
-target-feature +neon -target-feature +crc -target-feature +crypto -O2 
-fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s 
-check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-NEWPM 
-check-prefix=AArch64-NEWPM
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 
-target-feature +v8.3a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - 
%s | FileCheck %s -check-prefix=AArch64-v8_3 -check-prefix=CHECK-LABEL
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 
-target-feature +v8.4a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - 
%s | FileCheck %s -check-prefix=AArch64-v8_3 -check-prefix=CHECK-LABEL

Some nits that you can fix before committing; no need for another review I 
think.

You can remove: 

  -check-prefix=CHECK-LABEL

in all these 3 lines below.



Comment at: clang/test/CodeGen/arm_acle.c:830
+
+// CHECK-LABEL: @test_jcvt(
+// AArch64-v8_3: call i32 @llvm.aarch64.fjcvtzs

and change 

  // CHECK-LABEL: @test_jcvt(

into 

   // AArch64-v8_3-LABEL: @test_jcvt(


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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Kyrill Tkachov via Phabricator via cfe-commits
ktkachov updated this revision to Diff 208980.
ktkachov added a comment.

Add more CHECK-LABEL tests, test v8.4a and v8.5a features. Fix formatting in 
pattern.


CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/arm_acle.h
  clang/test/CodeGen/arm_acle.c
  clang/test/CodeGen/builtins-arm64.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/fjcvtzs.ll

Index: llvm/test/CodeGen/AArch64/fjcvtzs.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/fjcvtzs.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s
+
+define i32 @test_jcvt(double %v) {
+; CHECK-LABEL: test_jcvt:
+; CHECK: fjcvtzs w0, d0
+  %val = call i32 @llvm.aarch64.fjcvtzs(double %v)
+  ret i32 %val
+}
+
+declare i32 @llvm.aarch64.fjcvtzs(double)
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -717,7 +717,9 @@
 // v8.3a floating point conversion for javascript
 let Predicates = [HasJS, HasFPARMv8] in
 def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
-  "fjcvtzs", []> {
+  "fjcvtzs",
+  [(set GPR32:$Rd,
+ (int_aarch64_fjcvtzs FPR64:$Rn))]> {
   let Inst{31} = 0;
 } // HasJS, HasFPARMv8
 
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -31,6 +31,8 @@
 def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
 LLVMMatchType<0>], [IntrNoMem]>;
 
+def int_aarch64_fjcvtzs : Intrinsic<[llvm_i32_ty], [llvm_double_ty], [IntrNoMem]>;
+
 //===--===//
 // HINT
 
Index: clang/test/CodeGen/builtins-arm64.c
===
--- clang/test/CodeGen/builtins-arm64.c
+++ clang/test/CodeGen/builtins-arm64.c
@@ -58,6 +58,12 @@
 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
 }
 
+int32_t jcvt(double v) {
+  //CHECK-LABEL: @jcvt(
+  //CHECK: call i32 @llvm.aarch64.fjcvtzs
+  return __builtin_arm_jcvt(v);
+}
+
 __typeof__(__builtin_arm_rsr("1:2:3:4:5")) rsr(void);
 
 uint32_t rsr() {
Index: clang/test/CodeGen/arm_acle.c
===
--- clang/test/CodeGen/arm_acle.c
+++ clang/test/CodeGen/arm_acle.c
@@ -2,6 +2,9 @@
 // RUN: %clang_cc1 -ffreestanding -triple armv8-eabi -target-cpu cortex-a57 -O2  -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch32 -check-prefix=ARM-NEWPM -check-prefix=AArch32-NEWPM
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fno-experimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-LEGACY -check-prefix=AArch64-LEGACY
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-NEWPM -check-prefix=AArch64-NEWPM
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.3a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3 -check-prefix=CHECK-LABEL
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.4a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3 -check-prefix=CHECK-LABEL
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.5a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=AArch64-v8_3 -check-prefix=CHECK-LABEL
 
 #include 
 
@@ -823,3 +826,11 @@
 
 // AArch64: ![[M0]] = !{!"1:2:3:4:5"}
 // AArch64: ![[M1]] = !{!"sysreg"}
+
+// CHECK-LABEL: @test_jcvt(
+// AArch64-v8_3: call i32 @llvm.aarch64.fjcvtzs
+#ifdef __ARM_64BIT_STATE
+int32_t test_jcvt(double v) {
+  return __jcvt(v);
+}
+#endif
Index: clang/lib/Headers/arm_acle.h
===
--- 

[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Sjoerd Meijer via Phabricator via cfe-commits
SjoerdMeijer added inline comments.



Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:720
 def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
-  "fjcvtzs", []> {
+  "fjcvtzs", [(set GPR32:$Rd, 
(int_aarch64_fjcvtzs FPR64:$Rn))]> {
   let Inst{31} = 0;

and a last nit: this needs some reformatting (exceeding the max column width)


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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Sjoerd Meijer via Phabricator via cfe-commits
SjoerdMeijer added inline comments.



Comment at: clang/lib/Basic/Targets/AArch64.cpp:237
+break;
+  case llvm::AArch64::ArchKind::ARMV8_4A:
+getTargetDefinesARMV84A(Opts, Builder);

SjoerdMeijer wrote:
> It is a good change, but I think you should either add tests for these cases, 
> or remove this (temporarily) because it is not adding much at the moment.
Ah, sorry: "-march=armv8.4-a also enables this"
probably good to add some tests for v8.4 and v8.5 too then.


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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Sjoerd Meijer via Phabricator via cfe-commits
SjoerdMeijer added inline comments.



Comment at: clang/lib/Basic/Targets/AArch64.cpp:237
+break;
+  case llvm::AArch64::ArchKind::ARMV8_4A:
+getTargetDefinesARMV84A(Opts, Builder);

It is a good change, but I think you should either add tests for these cases, 
or remove this (temporarily) because it is not adding much at the moment.



Comment at: clang/test/CodeGen/arm_acle.c:829
+
+// AArch64-v8_3: call i32 @llvm.aarch64.fjcvtzs
+#ifdef __ARM_64BIT_STATE

Same comment, better is to do a CHECK-LABEL first



Comment at: clang/test/CodeGen/builtins-arm64.c:61
 
+int32_t jcvt(double v) {
+  //CHECK: call i32 @llvm.aarch64.fjcvtzs

Although this file doesn't seem to do this, better is check the function name 
first, e.g.:

  // CHECK-LABEL: @jcvt(

followed by what you want to check:
  
  //CHECK: call i32 @llvm.aarch64.fjcvtzs


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64495/new/

https://reviews.llvm.org/D64495



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[PATCH] D64495: [AArch64] Implement __jcvt intrinsic from Armv8.3-A

2019-07-10 Thread Kyrill Tkachov via Phabricator via cfe-commits
ktkachov created this revision.
ktkachov added reviewers: t.p.northover, SjoerdMeijer, pbarrio, momchil.velikov.
ktkachov added projects: LLVM, clang.
Herald added subscribers: llvm-commits, cfe-commits, hiraditya, kristof.beyls, 
javed.absar.

The __jcvt intrinsic defined in ACLE [1] is available when __ARM_FEATURE_JCVT 
is defined.

  

This change introduces the AArch64 intrinsic, wires it up to the instruction 
and a new clang builtin function.
The __ARM_FEATURE_JCVT macro is now defined when an Armv8.3-A or higher target 
is used.
I've implemented the target detection logic in Clang so that this feature is 
enabled for architectures from armv8.3-a onwards (so -march=armv8.4-a also 
enables this, for example).

make check-all didn't show any new failures.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

N.B. This is my first patch to LLVM. Apologies if some code looks weird. If 
this is okay can somebody please apply it for me?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D64495

Files:
  clang/include/clang/Basic/BuiltinsAArch64.def
  clang/lib/Basic/Targets/AArch64.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Headers/arm_acle.h
  clang/test/CodeGen/arm_acle.c
  clang/test/CodeGen/builtins-arm64.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/fjcvtzs.ll

Index: llvm/test/CodeGen/AArch64/fjcvtzs.ll
===
--- /dev/null
+++ llvm/test/CodeGen/AArch64/fjcvtzs.ll
@@ -0,0 +1,10 @@
+; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s
+
+define i32 @test_jcvt(double %v) {
+; CHECK-LABEL: test_jcvt:
+; CHECK: fjcvtzs w0, d0
+  %val = call i32 @llvm.aarch64.fjcvtzs(double %v)
+  ret i32 %val
+}
+
+declare i32 @llvm.aarch64.fjcvtzs(double)
Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
===
--- llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -717,7 +717,7 @@
 // v8.3a floating point conversion for javascript
 let Predicates = [HasJS, HasFPARMv8] in
 def FJCVTZS  : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
-  "fjcvtzs", []> {
+  "fjcvtzs", [(set GPR32:$Rd, (int_aarch64_fjcvtzs FPR64:$Rn))]> {
   let Inst{31} = 0;
 } // HasJS, HasFPARMv8
 
Index: llvm/include/llvm/IR/IntrinsicsAArch64.td
===
--- llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -31,6 +31,8 @@
 def int_aarch64_udiv : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>,
 LLVMMatchType<0>], [IntrNoMem]>;
 
+def int_aarch64_fjcvtzs : Intrinsic<[llvm_i32_ty], [llvm_double_ty], [IntrNoMem]>;
+
 //===--===//
 // HINT
 
Index: clang/test/CodeGen/builtins-arm64.c
===
--- clang/test/CodeGen/builtins-arm64.c
+++ clang/test/CodeGen/builtins-arm64.c
@@ -58,6 +58,11 @@
 // CHECK: call {{.*}} @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
 }
 
+int32_t jcvt(double v) {
+  //CHECK: call i32 @llvm.aarch64.fjcvtzs
+  return __builtin_arm_jcvt(v);
+}
+
 __typeof__(__builtin_arm_rsr("1:2:3:4:5")) rsr(void);
 
 uint32_t rsr() {
Index: clang/test/CodeGen/arm_acle.c
===
--- clang/test/CodeGen/arm_acle.c
+++ clang/test/CodeGen/arm_acle.c
@@ -2,6 +2,7 @@
 // RUN: %clang_cc1 -ffreestanding -triple armv8-eabi -target-cpu cortex-a57 -O2  -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch32 -check-prefix=ARM-NEWPM -check-prefix=AArch32-NEWPM
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fno-experimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-LEGACY -check-prefix=AArch64-LEGACY
 // RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +neon -target-feature +crc -target-feature +crypto -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s -check-prefix=ARM -check-prefix=AArch64 -check-prefix=ARM-NEWPM -check-prefix=AArch64-NEWPM
+// RUN: %clang_cc1 -ffreestanding -triple aarch64-eabi -target-cpu cortex-a57 -target-feature +v8.3a -O2 -fexperimental-new-pass-manager -S -emit-llvm -o - %s | FileCheck %s --check-prefix=AArch64-v8_3
 
 #include 
 
@@ -823,3 +824,11 @@
 
 // AArch64: ![[M0]] = !{!"1:2:3:4:5"}
 // AArch64: ![[M1]] = !{!"sysreg"}
+
+
+// AArch64-v8_3: call i32 @llvm.aarch64.fjcvtzs
+#ifdef __ARM_64BIT_STATE
+int32_t