[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-22 Thread Craig Topper via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4e6ad11bc6f2: [RISCV] Add Zba feature and move add.uw and 
slli.uw to it. (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D94617?vs=318217&id=318616#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94617/new/

https://reviews.llvm.org/D94617

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rv64Zba.ll
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/MC/RISCV/rv64zba-invalid.s
  llvm/test/MC/RISCV/rv64zba-valid.s
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

Index: llvm/test/MC/RISCV/rv64zbb-valid.s
===
--- llvm/test/MC/RISCV/rv64zbb-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-valid.s
@@ -12,12 +12,6 @@
 # RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \
 # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
-# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
-slli.uw t0, t1, 0
-# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
-# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
-add.uw t0, t1, t2
 # CHECK-ASM-AND-OBJ: slow t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
 slow t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zbb-invalid.s
===
--- llvm/test/MC/RISCV/rv64zbb-invalid.s
+++ llvm/test/MC/RISCV/rv64zbb-invalid.s
@@ -1,12 +1,5 @@
 # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
 
-# Too few operands
-slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Immediate operand out of range
-slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-# Too few operands
-add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
 # Too few operands
 slow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
 # Too few operands
Index: llvm/test/MC/RISCV/rv64zba-valid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-valid.s
@@ -0,0 +1,20 @@
+# With B extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
+# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# With Bitmanip base extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
+# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
+# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
+slli.uw t0, t1, 0
+# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
+# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
+add.uw t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zba-invalid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-invalid.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+
+# Too few operands
+slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
+# Immediate operand out of range
+slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+# Too few operands
+add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/CodeGen/RISCV/rv64Zbb.ll
===
--- llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -987,107 +987,3 @@
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
   ret i64 %abs
 }
-
-define i64 @slliuw(i64 %a) nounwind {
-; RV64I-LABEL: slliuw:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:slli a0, a0, 1
-; RV64I-NEXT:addi a1, zero, 1
-; RV64I-NEXT:slli a1, a1, 33
-; RV64I-NEXT:addi a1, a1, -2
-; RV64I-NEXT:and a0, a0, a1
-; RV64I-NEXT:ret
-;
-; RV64IB-LABEL: slliuw:
-; RV64IB:   # %bb.0:
-; RV64IB-NEXT:slli.uw a0, a0, 1
-; RV64IB-NEXT:ret
-;
-; RV64IBB-LABEL: slliuw:
-; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:slli.uw a0, a0, 1
-; RV64IBB-NEX

[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-21 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper updated this revision to Diff 318217.
craig.topper added a comment.

clang-format


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94617/new/

https://reviews.llvm.org/D94617

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rv64Zba.ll
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/MC/RISCV/rv64zba-invalid.s
  llvm/test/MC/RISCV/rv64zba-valid.s
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

Index: llvm/test/MC/RISCV/rv64zbb-valid.s
===
--- llvm/test/MC/RISCV/rv64zbb-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-valid.s
@@ -12,12 +12,6 @@
 # RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \
 # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
-# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
-slli.uw t0, t1, 0
-# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
-# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
-add.uw t0, t1, t2
 # CHECK-ASM-AND-OBJ: slow t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
 slow t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zbb-invalid.s
===
--- llvm/test/MC/RISCV/rv64zbb-invalid.s
+++ llvm/test/MC/RISCV/rv64zbb-invalid.s
@@ -1,13 +1,6 @@
 # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
 
 # Too few operands
-slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Immediate operand out of range
-slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-# Too few operands
-add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Too few operands
 slow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
 # Too few operands
 srow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv64zba-valid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-valid.s
@@ -0,0 +1,20 @@
+# With B extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
+# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# With Bitmanip base extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
+# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
+# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
+slli.uw t0, t1, 0
+# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
+# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
+add.uw t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zba-invalid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-invalid.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+
+# Too few operands
+slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
+# Immediate operand out of range
+slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+# Too few operands
+add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/CodeGen/RISCV/rv64Zbb.ll
===
--- llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -987,107 +987,3 @@
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
   ret i64 %abs
 }
-
-define i64 @slliuw(i64 %a) nounwind {
-; RV64I-LABEL: slliuw:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:slli a0, a0, 1
-; RV64I-NEXT:addi a1, zero, 1
-; RV64I-NEXT:slli a1, a1, 33
-; RV64I-NEXT:addi a1, a1, -2
-; RV64I-NEXT:and a0, a0, a1
-; RV64I-NEXT:ret
-;
-; RV64IB-LABEL: slliuw:
-; RV64IB:   # %bb.0:
-; RV64IB-NEXT:slli.uw a0, a0, 1
-; RV64IB-NEXT:ret
-;
-; RV64IBB-LABEL: slliuw:
-; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:slli.uw a0, a0, 1
-; RV64IBB-NEXT:ret
-  %conv1 = shl i64 %a, 1
-  %shl = and i64 %conv1, 8589934590
-  ret i64 %shl
-}
-
-define i128

[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-21 Thread Alex Bradbury via Phabricator via cfe-commits 
asb accepted this revision.
asb added inline comments.



Comment at: clang/lib/Driver/ToolChains/Arch/RISCV.cpp:61
 isExperimentalExtension(StringRef Ext) {
-  if (Ext == "b" || Ext == "zbb" || Ext == "zbc" || Ext == "zbe" ||
+  if (Ext == "b" || Ext == "zba" || Ext == "zbb" || Ext == "zbc" || Ext == 
"zbe" ||
   Ext == "zbf" || Ext == "zbm" || Ext == "zbp" || Ext == "zbr" ||

Nit: clang-format's suggested reformatting seems sensible here


Repository:
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[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-20 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper updated this revision to Diff 318038.
craig.topper added a comment.

Rebase


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94617/new/

https://reviews.llvm.org/D94617

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rv64Zba.ll
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/MC/RISCV/rv64zba-invalid.s
  llvm/test/MC/RISCV/rv64zba-valid.s
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

Index: llvm/test/MC/RISCV/rv64zbb-valid.s
===
--- llvm/test/MC/RISCV/rv64zbb-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-valid.s
@@ -12,12 +12,6 @@
 # RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \
 # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
-# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
-slli.uw t0, t1, 0
-# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
-# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
-add.uw t0, t1, t2
 # CHECK-ASM-AND-OBJ: slow t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
 slow t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zbb-invalid.s
===
--- llvm/test/MC/RISCV/rv64zbb-invalid.s
+++ llvm/test/MC/RISCV/rv64zbb-invalid.s
@@ -1,13 +1,6 @@
 # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
 
 # Too few operands
-slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Immediate operand out of range
-slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-# Too few operands
-add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Too few operands
 slow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
 # Too few operands
 srow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv64zba-valid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-valid.s
@@ -0,0 +1,20 @@
+# With B extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
+# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# With Bitmanip base extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
+# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
+# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
+slli.uw t0, t1, 0
+# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
+# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
+add.uw t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zba-invalid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-invalid.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+
+# Too few operands
+slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
+# Immediate operand out of range
+slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+# Too few operands
+add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/CodeGen/RISCV/rv64Zbb.ll
===
--- llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -987,107 +987,3 @@
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
   ret i64 %abs
 }
-
-define i64 @slliuw(i64 %a) nounwind {
-; RV64I-LABEL: slliuw:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:slli a0, a0, 1
-; RV64I-NEXT:addi a1, zero, 1
-; RV64I-NEXT:slli a1, a1, 33
-; RV64I-NEXT:addi a1, a1, -2
-; RV64I-NEXT:and a0, a0, a1
-; RV64I-NEXT:ret
-;
-; RV64IB-LABEL: slliuw:
-; RV64IB:   # %bb.0:
-; RV64IB-NEXT:slli.uw a0, a0, 1
-; RV64IB-NEXT:ret
-;
-; RV64IBB-LABEL: slliuw:
-; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:slli.uw a0, a0, 1
-; RV64IBB-NEXT:ret
-  %conv1 = shl i64 %a, 1
-  %shl = and i64 %conv1, 8589934590
-  ret i64 %shl
-}
-
-define i128 @slliu

[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-20 Thread Fraser Cormack via Phabricator via cfe-commits 
frasercrmck accepted this revision.
frasercrmck added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D94617: [RISCV] Add Zba feature and move add.uw and slli.uw to it.

2021-01-13 Thread Craig Topper via Phabricator via cfe-commits 
craig.topper created this revision.
craig.topper added reviewers: asb, lenary, frasercrmck, luismarques, kito-cheng.
Herald added subscribers: NickHung, evandro, apazos, sameer.abuasal, pzheng, 
s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, 
rogfer01, edward-jones, zzheng, jrtc27, shiva0217, niosHD, sabuasal, simoncook, 
johnrusso, rbar, hiraditya.
craig.topper requested review of this revision.
Herald added subscribers: cfe-commits, MaskRay.
Herald added projects: clang, LLVM.

Still need to add SH*ADD instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94617

Files:
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/test/Driver/riscv-arch.c
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/rv64Zba.ll
  llvm/test/CodeGen/RISCV/rv64Zbb.ll
  llvm/test/MC/RISCV/rv64zba-invalid.s
  llvm/test/MC/RISCV/rv64zba-valid.s
  llvm/test/MC/RISCV/rv64zbb-invalid.s
  llvm/test/MC/RISCV/rv64zbb-valid.s

Index: llvm/test/MC/RISCV/rv64zbb-valid.s
===
--- llvm/test/MC/RISCV/rv64zbb-valid.s
+++ llvm/test/MC/RISCV/rv64zbb-valid.s
@@ -12,12 +12,6 @@
 # RUN: | llvm-objdump --mattr=+experimental-zbb -d -r - \
 # RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
-# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
-slli.uw t0, t1, 0
-# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
-# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
-add.uw t0, t1, t2
 # CHECK-ASM-AND-OBJ: slow t0, t1, t2
 # CHECK-ASM: encoding: [0xbb,0x12,0x73,0x20]
 slow t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zbb-invalid.s
===
--- llvm/test/MC/RISCV/rv64zbb-invalid.s
+++ llvm/test/MC/RISCV/rv64zbb-invalid.s
@@ -1,13 +1,6 @@
 # RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zbb < %s 2>&1 | FileCheck %s
 
 # Too few operands
-slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Immediate operand out of range
-slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
-# Too few operands
-add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
-# Too few operands
 slow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
 # Too few operands
 srow t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/MC/RISCV/rv64zba-valid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-valid.s
@@ -0,0 +1,20 @@
+# With B extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-b -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-b < %s \
+# RUN: | llvm-objdump --mattr=+experimental-b -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# With Bitmanip base extension:
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zba -show-encoding \
+# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zba < %s \
+# RUN: | llvm-objdump --mattr=+experimental-zba -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
+
+# CHECK-ASM-AND-OBJ: slli.uw t0, t1, 0
+# CHECK-ASM: encoding: [0x9b,0x12,0x03,0x08]
+slli.uw t0, t1, 0
+# CHECK-ASM-AND-OBJ: add.uw t0, t1, t2
+# CHECK-ASM: encoding: [0xbb,0x02,0x73,0x08]
+add.uw t0, t1, t2
Index: llvm/test/MC/RISCV/rv64zba-invalid.s
===
--- /dev/null
+++ llvm/test/MC/RISCV/rv64zba-invalid.s
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-b,experimental-zba < %s 2>&1 | FileCheck %s
+
+# Too few operands
+slli.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
+# Immediate operand out of range
+slli.uw t0, t1, 64 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+slli.uw t0, t1, -1 # CHECK: :[[@LINE]]:17: error: immediate must be an integer in the range [0, 63]
+# Too few operands
+add.uw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction
Index: llvm/test/CodeGen/RISCV/rv64Zbb.ll
===
--- llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -987,49 +987,3 @@
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
   ret i64 %abs
 }
-
-define i64 @slliuw(i64 %a) nounwind {
-; RV64I-LABEL: slliuw:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:slli a0, a0, 1
-; RV64I-NEXT:addi a1, zero, 1
-; RV64I-NEXT:slli a1, a1, 33
-; RV64I-NEXT:addi