[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-09 Thread via cfe-commits 

https://github.com/hstk30-hw closed 
https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-09 Thread Victor Campos via cfe-commits 

https://github.com/vhscampos approved this pull request.

LGTM. Thanks

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-08 Thread via cfe-commits 

hstk30-hw wrote:

> There are some typos in the commit message and in the PR title.

@vhscampos Check again. Fixed the typos.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-08 Thread David Green via cfe-commits 

https://github.com/davemgreen approved this pull request.

Thanks. LGTM

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-08 Thread via cfe-commits 

https://github.com/hstk30-hw updated 
https://github.com/llvm/llvm-project/pull/75440

>From ee562f7e8e8577ee93631a8425efd80e7ce64c18 Mon Sep 17 00:00:00 2001
From: hstk30-hw 
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Coprocessor Instrinsics

---
 clang/lib/Basic/Targets/ARM.cpp   |  64 +++
 clang/lib/Basic/Targets/ARM.h |  13 +
 clang/lib/Headers/arm_acle.h  |  59 +++
 clang/test/CodeGen/arm-acle-coproc.c  | 383 ++
 .../Preprocessor/aarch64-target-features.c|   1 +
 5 files changed, 520 insertions(+)
 create mode 100644 clang/test/CodeGen/arm-acle-coproc.c

diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ce7e4d4639ceac..c705d30cf6bf42 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -17,6 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -836,6 +837,69 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+  case llvm::ARM::ArchKind::ARMV4T:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1 | FEATURE_COPROC_B2;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+  case llvm::ARM::ArchKind::ARMV8_1MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  }
+  Builder.defineMacro("__ARM_FEATURE_COPROC",
+  "0x" + Twine::utohexstr(FeatureCoprocBF));
+
   if (ArchKind == llvm::ARM::ArchKind::XSCALE)
 Builder.defineMacro("__XSCALE__");
 
diff --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index b1aa2794c7e4c3..9802eb01abf3c4 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -100,6 +100,19 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public 
TargetInfo {
   };
   uint32_t HW_FP;
 
+  enum {
+/// __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
+/// __arm_stcl, __arm_mcr and __arm_mrc
+FEATURE_COPROC_B1 = (1 << 0),
+/// __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l,
+/// __arm_stc2l, __arm_mcr2 and __arm_mrc2
+FEATURE_COPROC_B2 = (1 << 1),
+/// __arm_mcrr, __arm_mrrc
+FEATURE_COPROC_B3 = (1 << 2),
+/// __arm_mcrr2,  __arm_mrrc2
+FEATURE_COPROC_B4 = (1 << 3),
+  };
+
   void setABIAAPCS();
   void setABIAPCS(bool IsAAPCS16);
 
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..9aae2285aeb1d8 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -756,6 +756,65 @@ __arm_st64bv0(void *__addr, data512_t __value) {
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if defined(__ARM_FEATURE_COPROC)
+
+#if (__ARM_FEATURE_COPROC &

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-07 Thread David Green via cfe-commits 

davemgreen wrote:

If you can make armv9-a work the same as armv8-a and add some tests for it then 
this LGTM

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-07 Thread David Green via cfe-commits 


@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:

davemgreen wrote:

Oh right, ARMV9_5A is AArch64 only. That's OK then.
I would expect the other ArmV9-A cases to be the same as ArmV8-A for AArch32, 
and wouldn't have expected a change in coprocessor instructions.
The reference manual is at 
https://developer.arm.com/documentation/ddi0487/ja/?lang=en and doesn't seem to 
mention cdp.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-06 Thread via cfe-commits 


@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:

hstk30-hw wrote:

In this https://gist.github.com/davemgreen/e7ade833274a60e975e67a66eda7cb44, 
not have  test cases on ARMV9. According to the code logic, ARMV9 seem support 
all Coprocessor Instrinsics. This is different from ARMV8, I'm not sure, so the 
default case is 0 for now.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-06 Thread via cfe-commits 


@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:

hstk30-hw wrote:

We need defined ARMV9_5A in ARMTargetParser.def first.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-06 Thread via cfe-commits 

https://github.com/hstk30-hw updated 
https://github.com/llvm/llvm-project/pull/75440

>From 18af0ae248707b7c33b24065cdbab5399337f8bc Mon Sep 17 00:00:00 2001
From: hstk30-hw 
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Coprocessor Instrinsics

---
 clang/lib/Basic/Targets/ARM.cpp   |  67 
 clang/lib/Basic/Targets/ARM.h |  13 +
 clang/lib/Headers/arm_acle.h  |  59 +++
 clang/test/CodeGen/arm-acle-coproc.c  | 365 ++
 .../Preprocessor/aarch64-target-features.c|   1 +
 5 files changed, 505 insertions(+)
 create mode 100644 clang/test/CodeGen/arm-acle-coproc.c

diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ce7e4d4639ceac..d9844b3a837554 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -17,6 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -836,6 +837,72 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+  case llvm::ARM::ArchKind::ARMV4T:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1 | FEATURE_COPROC_B2;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+  case llvm::ARM::ArchKind::ARMV8_1MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  }
+  Builder.defineMacro("__ARM_FEATURE_COPROC",
+  "0x" + Twine::utohexstr(FeatureCoprocBF));
+
   if (ArchKind == llvm::ARM::ArchKind::XSCALE)
 Builder.defineMacro("__XSCALE__");
 
diff --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index b1aa2794c7e4c3..9802eb01abf3c4 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -100,6 +100,19 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public 
TargetInfo {
   };
   uint32_t HW_FP;
 
+  enum {
+/// __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
+/// __arm_stcl, __arm_mcr and __arm_mrc
+FEATURE_COPROC_B1 = (1 << 0),
+/// __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l,
+/// __arm_stc2l, __arm_mcr2 and __arm_mrc2
+FEATURE_COPROC_B2 = (1 << 1),
+/// __arm_mcrr, __arm_mrrc
+FEATURE_COPROC_B3 = (1 << 2),
+/// __arm_mcrr2,  __arm_mrrc2
+FEATURE_COPROC_B4 = (1 << 3),
+  };
+
   void setABIAAPCS();
   void setABIAPCS(bool IsAAPCS16);
 
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..9aae2285aeb1d8 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -756,6 +756,65 @@ __arm_st64bv0(void *__addr, data512_t __value) {

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-02 Thread David Green via cfe-commits 

https://github.com/davemgreen edited 
https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-02 Thread David Green via cfe-commits 


@@ -756,6 +756,58 @@ __arm_st64bv0(void *__addr, data512_t __value) {
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if defined(__ARM_FEATURE_COPROC)
+
+#if (__ARM_FEATURE_COPROC & 0x1)
+
+#if (__ARM_ARCH != 8)

davemgreen wrote:

Could this be < 8?
This doesn't apply to 8-m.main, right? The test looks OK.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-02 Thread David Green via cfe-commits 


@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:

davemgreen wrote:

There is a ARMV9_5A now too. I think I would expect these to be the same as 
ARMV8.
Is this switch statement exhaustive? Could the default case be made the same as 
ARMV8 so we don't need to extend it every time an architecture is added?

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-02 Thread David Green via cfe-commits 


@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:

davemgreen wrote:

Add ARMV8_1MMainline too.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-02 Thread David Green via cfe-commits 

https://github.com/davemgreen commented:

Thanks. This is looking good to me. I just have a few comments about different 
architecture revisions.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2024-01-01 Thread via cfe-commits 

https://github.com/hstk30-hw updated 
https://github.com/llvm/llvm-project/pull/75440

>From ce9db667e6567532fe119ff8d793281215f223dc Mon Sep 17 00:00:00 2001
From: hstk30-hw 
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Coprocessor Instrinsics

---
 clang/lib/Basic/Targets/ARM.cpp   |  65 
 clang/lib/Basic/Targets/ARM.h |  13 +
 clang/lib/Headers/arm_acle.h  |  52 +++
 clang/test/CodeGen/arm-acle-coproc.c  | 346 ++
 .../Preprocessor/aarch64-target-features.c|   1 +
 5 files changed, 477 insertions(+)
 create mode 100644 clang/test/CodeGen/arm-acle-coproc.c

diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ce7e4d4639ceac..d68ae21b219535 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -17,6 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
+#include "llvm/TargetParser/ARMTargetParser.h"
 
 using namespace clang;
 using namespace clang::targets;
@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  uint64_t FeatureCoprocBF = 0;
+  switch (ArchKind) {
+  default:
+break;
+  case llvm::ARM::ArchKind::ARMV4:
+// Filter __arm_ldcl and __arm_stcl in acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARM5T:
+FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+break;
+  case llvm::ARM::ArchKind::ARMV5TE:
+  case llvm::ARM::ArchKind::ARMV5TEJ:
+if (!isThumb())
+  FeatureCoprocBF =
+  FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV6:
+  case llvm::ARM::ArchKind::ARMV6K:
+  case llvm::ARM::ArchKind::ARMV6KZ:
+  case llvm::ARM::ArchKind::ARMV6T2:
+if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+  FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7EM:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_3A:
+  case llvm::ARM::ArchKind::ARMV8_4A:
+  case llvm::ARM::ArchKind::ARMV8_5A:
+  case llvm::ARM::ArchKind::ARMV8_6A:
+  case llvm::ARM::ArchKind::ARMV8_7A:
+  case llvm::ARM::ArchKind::ARMV8_8A:
+  case llvm::ARM::ArchKind::ARMV8_9A:
+// Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+break;
+  case llvm::ARM::ArchKind::ARMV8MMainline:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  case llvm::ARM::ArchKind::ARMV9A:
+  case llvm::ARM::ArchKind::ARMV9_1A:
+  case llvm::ARM::ArchKind::ARMV9_2A:
+  case llvm::ARM::ArchKind::ARMV9_3A:
+  case llvm::ARM::ArchKind::ARMV9_4A:
+FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+  FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+break;
+  }
+  Builder.defineMacro("__ARM_FEATURE_COPROC",
+  "0x" + Twine::utohexstr(FeatureCoprocBF));
+
   if (ArchKind == llvm::ARM::ArchKind::XSCALE)
 Builder.defineMacro("__XSCALE__");
 
diff --git a/clang/lib/Basic/Targets/ARM.h b/clang/lib/Basic/Targets/ARM.h
index b1aa2794c7e4c3..9802eb01abf3c4 100644
--- a/clang/lib/Basic/Targets/ARM.h
+++ b/clang/lib/Basic/Targets/ARM.h
@@ -100,6 +100,19 @@ class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public 
TargetInfo {
   };
   uint32_t HW_FP;
 
+  enum {
+/// __arm_cdp __arm_ldc, __arm_ldcl, __arm_stc,
+/// __arm_stcl, __arm_mcr and __arm_mrc
+FEATURE_COPROC_B1 = (1 << 0),
+/// __arm_cdp2, __arm_ldc2, __arm_stc2, __arm_ldc2l,
+/// __arm_stc2l, __arm_mcr2 and __arm_mrc2
+FEATURE_COPROC_B2 = (1 << 1),
+/// __arm_mcrr, __arm_mrrc
+FEATURE_COPROC_B3 = (1 << 2),
+/// __arm_mcrr2,  __arm_mrrc2
+FEATURE_COPROC_B4 = (1 << 3),
+  };
+
   void setABIAAPCS();
   void setABIAPCS(bool IsAAPCS16);
 
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..8a7e9a7930920b 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -756,6 +756,58 @@ __arm_st64bv0(void *__addr, data512_t __value) {
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if defined(__ARM_FEATURE_COPROC)
+
+#if

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-23 Thread via cfe-commits 

hstk30-hw wrote:

Use bitfield still a mess up because the different arm version have different  
Instrinsics available even in the same bit group.
I will try it, hope it readable.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-23 Thread via cfe-commits 


@@ -0,0 +1,346 @@
+// RUN: %clang_cc1 -triple armv4 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4 %s
+// RUN: %clang_cc1 -triple armv4t %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4 %s
+// RUN: %clang_cc1 -triple armv5 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5 %s
+// RUN: %clang_cc1 -triple armv5te %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE %s
+// RUN: %clang_cc1 -triple armv5tej %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE %s
+// RUN: %clang_cc1 -triple armv6 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6 %s
+// RUN: %clang_cc1 -triple armv6m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6M %s
+// RUN: %clang_cc1 -triple armv7a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv7r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv7m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv8a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.1a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.2a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.3a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.4a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.5a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4-THUMB %s
+// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5te %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5tej %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6k %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6kz %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6M %s
+// RUN: %clang_cc1 -triple thumbv7a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv7r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv7m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv8a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.1a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.2a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.3a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.4a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.5a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8-BASE %s
+// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8-MAIN %s
+
+#include 
+
+void cdp() {
+  __arm_cdp(1, 2, 3, 4, 5, 6);
+  // CHECK-V4: __builtin_arm_cdp
+  // CHECK-V4-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V5: __builtin_arm_cdp
+  // CHECK-V5-TE: __builtin_arm_cdp
+  // CHECK-V5-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V5-TE-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V6: __builtin_arm_cdp
+  // CHECK-V6-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V6M-NOT: __builtin_arm_cdp
+  // CHECK-V7: __builtin_arm_cdp
+  // CHECK-V8-NOT: __builtin_arm_cdp
+  // CHECK-V8-BASE-NOT: __builtin_arm_cdp
+  // CHECK-V8-MAIN: __builtin_arm_cdp
+}
+
+void cdp2() {
+  __arm_cdp2(1, 2, 3, 4, 5, 6);
+  // CHECK-V4-NOT: __builtin_arm_cdp2
+  // CHECK-V4-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V5: __builtin_arm_cdp2
+  // CHECK-V5-TE: __builtin_arm_cdp2
+  // CHECK-V5-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V5-TE-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V6: __builtin_arm_cdp2
+  // CHECK-V6-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V6M-NOT: __builtin_arm_cdp2
+  // CHECK-V7: __builtin_arm_cdp2
+  // CHECK-V8-NOT: __builtin_arm_cdp2
+  // CHECK-V8-BASE-NOT: __builtin_arm_cdp2
+  // CHECK-V8-MAIN: __builtin_arm_cdp2
+}
+
+void ldc(int i) {
+  __arm_ldc(1, 2, );
+  // CHECK-V4: __builtin_arm_ldc
+  // CHECK-V4-NOT: __builtin_arm_ldc

hstk30-hw wrote:

plz check it, maybe a typo for V4-THUMB @davemgreen

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-23 Thread via cfe-commits 

https://github.com/hstk30-hw deleted 
https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-23 Thread via cfe-commits 


@@ -0,0 +1,346 @@
+// RUN: %clang_cc1 -triple armv4 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4 %s
+// RUN: %clang_cc1 -triple armv4t %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4 %s
+// RUN: %clang_cc1 -triple armv5 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5 %s
+// RUN: %clang_cc1 -triple armv5te %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE %s
+// RUN: %clang_cc1 -triple armv5tej %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE %s
+// RUN: %clang_cc1 -triple armv6 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6 %s
+// RUN: %clang_cc1 -triple armv6m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6M %s
+// RUN: %clang_cc1 -triple armv7a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv7r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv7m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple armv8a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.1a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.2a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.3a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.4a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple armv8.5a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv4 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4-THUMB %s
+// RUN: %clang_cc1 -triple thumbv4t %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V4-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5te %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE-THUMB %s
+// RUN: %clang_cc1 -triple thumbv5tej %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V5-TE-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6 %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6k %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6kz %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6-THUMB %s
+// RUN: %clang_cc1 -triple thumbv6m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V6M %s
+// RUN: %clang_cc1 -triple thumbv7a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv7r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv7m %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V7 %s
+// RUN: %clang_cc1 -triple thumbv8a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.1a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.2a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.3a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.4a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8.5a %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8r %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8 %s
+// RUN: %clang_cc1 -triple thumbv8m.base %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8-BASE %s
+// RUN: %clang_cc1 -triple thumbv8m.main %s -E -dD -o - | FileCheck 
--check-prefix=CHECK-V8-MAIN %s
+
+#include 
+
+void cdp() {
+  __arm_cdp(1, 2, 3, 4, 5, 6);
+  // CHECK-V4: __builtin_arm_cdp
+  // CHECK-V4-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V5: __builtin_arm_cdp
+  // CHECK-V5-TE: __builtin_arm_cdp
+  // CHECK-V5-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V5-TE-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V6: __builtin_arm_cdp
+  // CHECK-V6-THUMB-NOT: __builtin_arm_cdp
+  // CHECK-V6M-NOT: __builtin_arm_cdp
+  // CHECK-V7: __builtin_arm_cdp
+  // CHECK-V8-NOT: __builtin_arm_cdp
+  // CHECK-V8-BASE-NOT: __builtin_arm_cdp
+  // CHECK-V8-MAIN: __builtin_arm_cdp
+}
+
+void cdp2() {
+  __arm_cdp2(1, 2, 3, 4, 5, 6);
+  // CHECK-V4-NOT: __builtin_arm_cdp2
+  // CHECK-V4-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V5: __builtin_arm_cdp2
+  // CHECK-V5-TE: __builtin_arm_cdp2
+  // CHECK-V5-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V5-TE-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V6: __builtin_arm_cdp2
+  // CHECK-V6-THUMB-NOT: __builtin_arm_cdp2
+  // CHECK-V6M-NOT: __builtin_arm_cdp2
+  // CHECK-V7: __builtin_arm_cdp2
+  // CHECK-V8-NOT: __builtin_arm_cdp2
+  // CHECK-V8-BASE-NOT: __builtin_arm_cdp2
+  // CHECK-V8-MAIN: __builtin_arm_cdp2
+}
+
+void ldc(int i) {
+  __arm_ldc(1, 2, );
+  // CHECK-V4: __builtin_arm_ldc

hstk30-hw wrote:

plz check it, maybe a typo for V4-THUMB @davemgreen 

https://github.com/llvm/llvm-project/pull/75440

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-22 Thread David Green via cfe-commits 

davemgreen wrote:

Thanks for doing this.
I think that __ARM_FEATURE_COPROC should be a bitfield, as defined in 
https://arm-software.github.io/acle/main/acle.html#coprocessor-intrinsics. That 
would remove the need for the other macros.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-22 Thread via cfe-commits 

github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff 88d319a29ff5d3be1bb9a7e88ef6e17df1dfe607 
5a746e97989ba795264d20aef4f056db0c17bc2c -- 
clang/test/CodeGen/arm-acle-coproc.c clang/lib/Basic/Targets/ARM.cpp 
clang/lib/Headers/arm_acle.h clang/test/Preprocessor/aarch64-target-features.c
``





View the diff from clang-format here.


``diff
diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index c7962210e4..bada097555 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -844,22 +844,21 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
 Builder.defineMacro("__ARM_FEATURE_COPROC_V4", "1");
   }
 
-  if (ArchKind == llvm::ARM::ArchKind::ARMV5T &&
-  !isThumb()) {
+  if (ArchKind == llvm::ARM::ArchKind::ARMV5T && !isThumb()) {
 Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
 Builder.defineMacro("__ARM_FEATURE_COPROC_V5", "1");
   }
 
   if ((ArchKind == llvm::ARM::ArchKind::ARMV5TE ||
ArchKind == llvm::ARM::ArchKind::ARMV5TEJ) &&
-   !isThumb()) {
+  !isThumb()) {
 Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
 Builder.defineMacro("__ARM_FEATURE_COPROC_V5TE", "1");
   }
 
   if ((ArchKind == llvm::ARM::ArchKind::ARMV6 ||
-  ArchKind == llvm::ARM::ArchKind::ARMV6K ||
-  ArchKind == llvm::ARM::ArchKind::ARMV6KZ) &&
+   ArchKind == llvm::ARM::ArchKind::ARMV6K ||
+   ArchKind == llvm::ARM::ArchKind::ARMV6KZ) &&
   !isThumb()) {
 Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
 Builder.defineMacro("__ARM_FEATURE_COPROC_V6", "1");
@@ -894,7 +893,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
 Builder.defineMacro("__ARM_FEATURE_COPROC_V8", "1");
   }
 
-  if (ArchKind == llvm::ARM::ArchKind::ARMV9A   ||
+  if (ArchKind == llvm::ARM::ArchKind::ARMV9A ||
   ArchKind == llvm::ARM::ArchKind::ARMV9_1A ||
   ArchKind == llvm::ARM::ArchKind::ARMV9_2A ||
   ArchKind == llvm::ARM::ArchKind::ARMV9_3A ||
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 6852337c38..b91e227655 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -760,7 +760,8 @@ __arm_st64bv0(void *__addr, data512_t __value) {
 #if __ARM_FEATURE_COPROC
 
 #ifndef __ARM_TARGET_COPROC_V8
-#define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) __builtin_arm_cdp(coproc, 
opc1, CRd, CRn, CRm, opc2)
+#define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)   
\
+  __builtin_arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)
 #endif
 
 #define __arm_ldc(coproc, CRd, p) __builtin_arm_ldc(coproc, CRd, p)
@@ -771,28 +772,34 @@ __arm_st64bv0(void *__addr, data512_t __value) {
 #define __arm_stcl(coproc, CRd, p) __builtin_arm_stcl(coproc, CRd, p)
 #endif
 
-
-#define __arm_mcr(coproc, opc1, value, CRn, CRm, opc2) 
__builtin_arm_mcr(coproc, opc1, value, CRn, CRm, opc2)
-#define __arm_mrc(coproc, opc1, CRn, CRm, opc2) __builtin_arm_mrc(coproc, 
opc1, CRn, CRm, opc2)
+#define __arm_mcr(coproc, opc1, value, CRn, CRm, opc2) 
\
+  __builtin_arm_mcr(coproc, opc1, value, CRn, CRm, opc2)
+#define __arm_mrc(coproc, opc1, CRn, CRm, opc2)
\
+  __builtin_arm_mrc(coproc, opc1, CRn, CRm, opc2)
 
 #if !defined(__ARM_TARGET_COPROC_V4) && !defined(__ARM_TARGET_COPROC_V8)
-#define __arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2) 
__builtin_arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)
+#define __arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)  
\
+  __builtin_arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)
 
 #define __arm_ldc2(coproc, CRd, p) __builtin_arm_ldc2(coproc, CRd, p)
 #define __arm_ldc2l(coproc, CRd, p) __builtin_arm_ldc2l(coproc, CRd, p)
 #define __arm_stc2(coproc, CRd, p) __builtin_arm_stc2(coproc, CRd, p)
 #define __arm_stc2l(coproc, CRd, p) __builtin_arm_stc2l(coproc, CRd, p)
 
-#define __arm_mcr2(coproc, opc1, value, CRn, CRm, opc2) 
__builtin_arm_mcr2(coproc, opc1, value, CRn, CRm, opc2)
-#define __arm_mrc2(coproc, opc1, CRn, CRm, opc2) __builtin_arm_mrc2(coproc, 
opc1, CRn, CRm, opc2)
+#define __arm_mcr2(coproc, opc1, value, CRn, CRm, opc2)
\
+  __builtin_arm_mcr2(coproc, opc1, value, CRn, CRm, opc2)
+#define __arm_mrc2(coproc, opc1, CRn, CRm, opc2)   
\
+  __builtin_arm_mrc2(coproc, opc1, CRn, CRm, opc2)
 
 #ifndef __ARM_TARGET_COPROC_V5
 
-#define __arm_mcrr(coproc, opc1, value, CRm) __builtin_arm_mcrr(coproc, opc1, 
value, CRm)
+#define __arm_mcrr(coproc, opc1, value, CRm)   
\
+  __builtin_arm_mcrr(coproc, opc1, value, CRm)
 #define __arm_mrrc(coproc, opc1, CRm) __builtin_arm_mrrc(coproc, opc1, CRm)
 
 #ifndef __ARM_TARGET_COPROC_V5TE
-#define __arm_mcrr2(coproc, opc1, value, CRm)

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-22 Thread via cfe-commits 

https://github.com/hstk30-hw updated 
https://github.com/llvm/llvm-project/pull/75440

>From 5a746e97989ba795264d20aef4f056db0c17bc2c Mon Sep 17 00:00:00 2001
From: hstk30-hw 
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Coprocessor Instrinsics

---
 clang/lib/Basic/Targets/ARM.cpp   |  72 
 clang/lib/Headers/arm_acle.h  |  53 +++
 clang/test/CodeGen/arm-acle-coproc.c  | 346 ++
 .../Preprocessor/aarch64-target-features.c|   1 +
 4 files changed, 472 insertions(+)
 create mode 100644 clang/test/CodeGen/arm-acle-coproc.c

diff --git a/clang/lib/Basic/Targets/ARM.cpp b/clang/lib/Basic/Targets/ARM.cpp
index ce7e4d4639ceac..c7962210e4563b 100644
--- a/clang/lib/Basic/Targets/ARM.cpp
+++ b/clang/lib/Basic/Targets/ARM.cpp
@@ -836,6 +836,78 @@ void ARMTargetInfo::getTargetDefines(const LangOptions 
,
   if (Opts.RWPI)
 Builder.defineMacro("__ARM_RWPI", "1");
 
+  // Macros for enabling co-proc intrinsics
+  if ((ArchKind == llvm::ARM::ArchKind::ARMV4 ||
+   ArchKind == llvm::ARM::ArchKind::ARMV4T) &&
+  !isThumb()) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V4", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV5T &&
+  !isThumb()) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V5", "1");
+  }
+
+  if ((ArchKind == llvm::ARM::ArchKind::ARMV5TE ||
+   ArchKind == llvm::ARM::ArchKind::ARMV5TEJ) &&
+   !isThumb()) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V5TE", "1");
+  }
+
+  if ((ArchKind == llvm::ARM::ArchKind::ARMV6 ||
+  ArchKind == llvm::ARM::ArchKind::ARMV6K ||
+  ArchKind == llvm::ARM::ArchKind::ARMV6KZ) &&
+  !isThumb()) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V6", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV6T2) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V6", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV7A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV7R ||
+  ArchKind == llvm::ARM::ArchKind::ARMV7M ||
+  ArchKind == llvm::ARM::ArchKind::ARMV7S ||
+  ArchKind == llvm::ARM::ArchKind::ARMV7EM) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V7", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV8A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8R ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_1A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_2A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_3A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_4A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_5A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_6A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_7A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_8A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV8_9A) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V8", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV9A   ||
+  ArchKind == llvm::ARM::ArchKind::ARMV9_1A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV9_2A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV9_3A ||
+  ArchKind == llvm::ARM::ArchKind::ARMV9_4A) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V9", "1");
+  }
+
+  if (ArchKind == llvm::ARM::ArchKind::ARMV8MMainline) {
+Builder.defineMacro("__ARM_FEATURE_COPROC", "1");
+Builder.defineMacro("__ARM_FEATURE_COPROC_V8M", "1");
+  }
+
   if (ArchKind == llvm::ARM::ArchKind::XSCALE)
 Builder.defineMacro("__XSCALE__");
 
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..6852337c38038b 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -756,6 +756,59 @@ __arm_st64bv0(void *__addr, data512_t __value) {
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if __ARM_FEATURE_COPROC
+
+#ifndef __ARM_TARGET_COPROC_V8
+#define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) __builtin_arm_cdp(coproc, 
opc1, CRd, CRn, CRm, opc2)
+#endif
+
+#define __arm_ldc(coproc, CRd, p) __builtin_arm_ldc(coproc, CRd, p)
+#define __arm_stc(coproc, CRd, p) __builtin_arm_stc(coproc, CRd, p)
+
+#if !defined(__ARM_TARGET_COPROC_V4) && !defined(__ARM_TARGET_COPROC_V8)
+#define __arm_ldcl(coproc, CRd, p) __builtin_arm_ldcl(coproc, CRd, p)
+#define __arm_stcl(coproc, CRd, p) __builtin_arm_stcl(coproc, CRd, p)
+#endif
+
+
+#define __arm_mcr(coproc, opc1, value, CRn, CRm, opc2) 
__builtin_arm_mcr(coproc, opc1, value, CRn, CRm, opc2)
+#define __arm_mrc(coproc, opc1, CRn, CRm, opc2) __builtin_arm_mrc(coproc, 
opc1, CRn, CRm, opc2)
+
+#if

[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-21 Thread David Green via cfe-commits 

davemgreen wrote:

This is the downstream code we have: 
https://gist.github.com/davemgreen/e7ade833274a60e975e67a66eda7cb44
Note that the __ARM_TARGET_COPROC_XYZ macros are probably wrong. They should be 
__ARM_FEATURE_COPROC bitfield macros according to the ACLE.

Can you make use of some of that? It would be good to add the macro definition 
at the same time as the intrinsics (they can be used to control when the 
intrinsics are available), and the test should be useful for checking they are 
available at the right times.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-21 Thread David Green via cfe-commits 

davemgreen wrote:

Let me try and get the downstream version, you might be able to pick up some 
things from it. A test at least should probably be present.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-21 Thread via cfe-commits 

hstk30-hw wrote:

I follow the gcc arm_acle.h 
https://github.com/gcc-mirror/gcc/blob/144c531fe25483b65ad3189d7b5e9f78154477c2/gcc/config/arm/arm_acle.h#L99C1-L239C1
code. And check the doc https://developer.arm.com/documentation/101028/latest/ .
I think It's ok to merge it.
Check it plz. @vhscampos @davemgreen 

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-21 Thread via cfe-commits 

https://github.com/hstk30-hw edited 
https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-18 Thread David Green via cfe-commits 

davemgreen wrote:

It looks like there is a downstream implementation of this that was never 
upstreamed. Perhaps someone can fish it out for you to show how it looked? It 
might be using the wrong predefined macro, but does have some tests.

https://github.com/llvm/llvm-project/pull/75440
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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-18 Thread via cfe-commits 

https://github.com/hstk30-hw updated 
https://github.com/llvm/llvm-project/pull/75440

>From fdb2b45298ef5282897297c913a195af07aec64b Mon Sep 17 00:00:00 2001
From: hstk30-hw 
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Coprocessor Instrinsics

---
 clang/lib/Headers/arm_acle.h | 49 
 1 file changed, 49 insertions(+)

diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..00f4cf00b2642a 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -756,6 +756,55 @@ __arm_st64bv0(void *__addr, data512_t __value) {
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if (!__thumb__ || __thumb2__)
+#if __ARM_ARCH >= 4
+#define __arm_cdp(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)   
\
+  __builtin_arm_cdp(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)
+#define __arm_ldc(__coproc, __CRd, __p) __builtin_arm_ldc(__coproc, __CRd, __p)
+#define __arm_ldcl(__coproc, __CRd, __p)   
\
+  __builtin_arm_ldcl(__coproc, __CRd, __p)
+#define __arm_stc(__coproc, __CRd, __p) __builtin_arm_stc(__coproc, __CRd, __p)
+#define __arm_stcl(__coproc, __CRd, __p)   
\
+  __builtin_arm_stcl(__coproc, __CRd, __p)
+#define __arm_mcr(__coproc, __opc1, __value, __CRn, __CRm, __opc2) 
\
+  __builtin_arm_mcr(__coproc, __opc1, __value, __CRn, __CRm, __opc2)
+#define __arm_mrc(__coproc, __opc1, __CRn, __CRm, __opc2)  
\
+  __builtin_arm_mrc(__coproc, __opc1, __CRn, __CRm, __opc2)
+
+#if __ARM_ARCH >= 5
+#define __arm_cdp2(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)  
\
+  __builtin_arm_cdp2(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)
+#define __arm_ldc2(__coproc, __CRd, __p)   
\
+  __builtin_arm_ldc2(__coproc, __CRd, __p)
+#define __arm_ldc2l(__coproc, __CRd, __p)  
\
+  __builtin_arm_ldc2l(__coproc, __CRd, __p)
+#define __arm_stc2(__coproc, __CRd, __p)   
\
+  __builtin_arm_stc2(__coproc, __CRd, __p)
+#define __arm_stc2l(__coproc, __CRd, __p)  
\
+  __builtin_arm_stc2l(__coproc, __CRd, __p)
+#define __arm_mcr2(__coproc, __opc1, __value, __CRn, __CRm, __opc2)
\
+  __builtin_arm_mcr2(__coproc, __opc1, __value, __CRn, __CRm, __opc2)
+#define __arm_mrc2(__coproc, __opc1, __CRn, __CRm, __opc2) 
\
+  __builtin_arm_mrc2(__coproc, __opc1, __CRn, __CRm, __opc2)
+
+#if __ARM_ARCH >= 6 || defined(__ARM_ARCH_5TE__)
+#define __arm_mcrr(__coproc, __opc1, __value, __CRm)   
\
+  __builtin_arm_mcrr(__coproc, __opc1, __value, __CRm)
+#define __arm_mrrc(__coproc, __opc1, __CRm)
\
+  __builtin_arm_mrrc(__coproc, __opc1, __CRm)
+
+#if __ARM_ARCH >= 6
+#define __arm_mcrr2(__coproc, __opc1, __value, __CRm)  
\
+  __builtin_arm_mcrr2(__coproc, __opc1, __value, __CRm)
+#define __arm_mrrc2(__coproc, __opc1, __CRm)   
\
+  __builtin_arm_mrrc2(__coproc, __opc1, __CRm)
+#endif /* __ARM_ARCH >= 6.  */
+#endif /* __ARM_ARCH >= 6 ||  defined (__ARM_ARCH_5TE__).  */
+#endif /*  __ARM_ARCH >= 5.  */
+#endif /* __ARM_ARCH >=4 */
+#endif /* (!__thumb__ || __thumb2__) */
+
 /* Transactional Memory Extension (TME) Intrinsics */
 #if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME
 

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[clang] [ARM] arm_acle.h add Coprocessor Instrinsics (PR #75440)

2023-12-18 Thread via cfe-commits 

https://github.com/hstk30-hw edited 
https://github.com/llvm/llvm-project/pull/75440
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