[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/nemanjai updated https://github.com/llvm/llvm-project/pull/68919 >From 65c84f2ba78efcbf92ce9c8232fc40f493414930 Mon Sep 17 00:00:00 2001 From: Nemanja Ivanovic Date: Thu, 12 Oct 2023 14:08:42 -0400 Subject: [PATCH 1/5] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. --- clang/include/clang/Basic/Builtins.td | 20 +++ clang/include/clang/Basic/BuiltinsX86.def | 7 - clang/include/clang/Basic/TargetInfo.h| 6 + clang/lib/Basic/Targets/PPC.cpp | 14 ++ clang/lib/Basic/Targets/PPC.h | 7 + clang/lib/Basic/Targets/X86.h | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 42 +- clang/lib/Sema/SemaChecking.cpp | 124 +++--- clang/test/CodeGen/builtin-cpu-supports.c | 68 ++ clang/test/Sema/builtin-cpu-supports.c| 8 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 6 + .../llvm/TargetParser/PPCTargetParser.def | 80 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 33 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 3 + llvm/lib/Target/PowerPC/PPCTargetMachine.h| 3 + llvm/test/CodeGen/PowerPC/cpu-supports.ll | 111 17 files changed, 458 insertions(+), 82 deletions(-) create mode 100644 llvm/include/llvm/TargetParser/PPCTargetParser.def create mode 100644 llvm/test/CodeGen/PowerPC/cpu-supports.ll diff --git a/clang/include/clang/Basic/Builtins.td b/clang/include/clang/Basic/Builtins.td index 22e616e6cde599..1af01fe0d700c9 100644 --- a/clang/include/clang/Basic/Builtins.td +++ b/clang/include/clang/Basic/Builtins.td @@ -727,6 +727,26 @@ def RotateRight : BitInt8_16_32_64BuiltinsTemplate, Builtin { // FIXME: The builtins marked FunctionWithBuiltinPrefix below should be //merged with the library definitions. They are currently not because //the attributes are different. + +// Builtins for checking CPU features based on the GCC builtins. +def BuiltinCPUIs : Builtin { + let Spellings = ["__builtin_cpu_is"]; + let Attributes = [NoThrow, Const]; + let Prototype = "bool(char const*)"; +} + +def BuiltinCPUSupports : Builtin { + let Spellings = ["__builtin_cpu_supports"]; + let Attributes = [NoThrow, Const]; + let Prototype = "bool(char const*)"; +} + +def BuiltinCPUInit : Builtin { + let Spellings = ["__builtin_cpu_init"]; + let Attributes = [NoThrow]; + let Prototype = "void()"; +} + def BuiltinCalloc : Builtin { let Spellings = ["__builtin_calloc"]; let Attributes = [FunctionWithBuiltinPrefix, NoThrow]; diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index 60b752ad48548f..207cde0414b54e 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -26,13 +26,6 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -// Miscellaneous builtin for checking x86 cpu features. -// TODO: Make this somewhat generic so that other backends -// can use it? -BUILTIN(__builtin_cpu_init, "v", "n") -BUILTIN(__builtin_cpu_supports, "bcC*", "nc") -BUILTIN(__builtin_cpu_is, "bcC*", "nc") - // Undefined Values // TARGET_BUILTIN(__builtin_ia32_undef128, "V2d", "ncV:128:", "") diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 3eb23ebdacf0ed..9432154d5063ce 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1432,6 +1432,12 @@ class TargetInfo : public TransferrableTargetInfo, getTriple().isOSFreeBSD()); } + // Identify whether this target supports __builtin_cpu_supports and + // __builtin_cpu_is. + virtual bool supportsCpuSupports() const { return false; } + virtual bool supportsCpuIs() const { return false; } + virtual bool supportsCpuInit() const { return false; } + // Validate the contents of the __builtin_cpu_supports(const char*) // argument. virtual bool validateCpuSupports(StringRef Name) const { return false; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 41935abfb65d3b..2cf1bacd95fd95 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -878,3 +878,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { +#define PPC_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true) + return llvm::StringSwitch(FeatureStr) +#include
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -16086,6 +16086,41 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, switch (BuiltinID) { default: return nullptr; + case Builtin::BI__builtin_cpu_is: { +const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); +StringRef CPUStr = cast(CPUExpr)->getString(); +unsigned NumCPUID = StringSwitch(CPUStr) +#define PPC_LNX_CPU(Name, NumericID) .Case(Name, NumericID) +#include "llvm/TargetParser/PPCTargetParser.def" +.Default(-1U); +Value *Op0 = llvm::ConstantInt::get(Int32Ty, PPC_FAWORD_CPUID); +llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_fixed_addr_ld); +Value *TheCall = Builder.CreateCall(F, {Op0}, "cpu_is"); +return Builder.CreateICmpEQ(TheCall, +llvm::ConstantInt::get(Int32Ty, NumCPUID)); + } + case Builtin::BI__builtin_cpu_supports: { +unsigned FeatureWord; +unsigned BitMask; +const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); +StringRef CPUStr = cast(CPUExpr)->getString(); +std::tie(FeatureWord, BitMask) = +StringSwitch>(CPUStr) +#define PPC_LNX_FEATURE(Name, Description, EnumName, Bitmask, FA_WORD) \ + .Case(Name, {FA_WORD, Bitmask}) +#include "llvm/TargetParser/PPCTargetParser.def" +.Default({0, 0}); nemanjai wrote: I think this is a good point. If we somehow have a string argument that would produce the `default` case and it has made it past Sema checking, it would be good to crash here rather than produce an invalid call to the intrinsic (or an invalid mask). Of course, that assert is not all that friendly and it might be better to assert within this function. What do you think about keeping the `default` and adding an assert below such as: ``` assert(BitMask && "Invalid target feature string. Missed by SemaChecking?"); ``` https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -210,6 +210,15 @@ let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.". [llvm_float_ty], [llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_vararg_ty], [IntrNoMem]>; + // Load of a value provided by the system library at a fixed address. Used for + // accessing things like HWCAP word provided by GLIBC. The immediate argument nemanjai wrote: I'm fine with both of these suggestions. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan approved this pull request. I meant to approve this before but forgot. I think LGTM once the comments are addressed. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan commented: I think I primarily have minor nit comments. Thank you for the update, Nemanja. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -1,11 +1,16 @@ -// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s| FileCheck %s +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s | FileCheck %s \ +// RUN: --check-prefix=CHECK-X86 +// RUN: %clang_cc1 -triple ppc64le-linux-gnu -emit-llvm < %s | FileCheck %s \ +// RUN: --check-prefix=CHECK-PPC + +#ifndef __PPC__ amy-kwan wrote: Ok sure, fair enough. Thanks for elaborating, Nemanja. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -16086,6 +16086,41 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, switch (BuiltinID) { default: return nullptr; + case Builtin::BI__builtin_cpu_is: { +const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); +StringRef CPUStr = cast(CPUExpr)->getString(); +unsigned NumCPUID = StringSwitch(CPUStr) +#define PPC_LNX_CPU(Name, NumericID) .Case(Name, NumericID) +#include "llvm/TargetParser/PPCTargetParser.def" +.Default(-1U); +Value *Op0 = llvm::ConstantInt::get(Int32Ty, PPC_FAWORD_CPUID); +llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_fixed_addr_ld); +Value *TheCall = Builder.CreateCall(F, {Op0}, "cpu_is"); +return Builder.CreateICmpEQ(TheCall, +llvm::ConstantInt::get(Int32Ty, NumCPUID)); + } + case Builtin::BI__builtin_cpu_supports: { +unsigned FeatureWord; +unsigned BitMask; +const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts(); +StringRef CPUStr = cast(CPUExpr)->getString(); +std::tie(FeatureWord, BitMask) = +StringSwitch>(CPUStr) +#define PPC_LNX_FEATURE(Name, Description, EnumName, Bitmask, FA_WORD) \ + .Case(Name, {FA_WORD, Bitmask}) +#include "llvm/TargetParser/PPCTargetParser.def" +.Default({0, 0}); diggerlin wrote: we do not want a default here, without a default it will hit an assert here if fell off the end of the string-switch. in the class of StringSwitch , there is function as ``` [[nodiscard]] operator R() { assert(Result && "Fell off the end of a string-switch"); return std::move(*Result); } ``` https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/nemanjai updated https://github.com/llvm/llvm-project/pull/68919 >From 71f1352bf00d6a9eefa3f199859d47d093f272f8 Mon Sep 17 00:00:00 2001 From: Nemanja Ivanovic Date: Thu, 12 Oct 2023 14:08:42 -0400 Subject: [PATCH 1/4] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. --- clang/include/clang/Basic/Builtins.def| 5 + clang/include/clang/Basic/BuiltinsX86.def | 7 - clang/include/clang/Basic/TargetInfo.h| 6 + clang/lib/Basic/Targets/PPC.cpp | 14 ++ clang/lib/Basic/Targets/PPC.h | 7 + clang/lib/Basic/Targets/X86.h | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 42 +- clang/lib/Sema/SemaChecking.cpp | 124 +++--- clang/test/CodeGen/builtin-cpu-supports.c | 68 ++ clang/test/Sema/builtin-cpu-supports.c| 8 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 6 + .../llvm/TargetParser/PPCTargetParser.def | 80 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 33 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 3 + llvm/lib/Target/PowerPC/PPCTargetMachine.h| 3 + llvm/test/CodeGen/PowerPC/cpu-supports.ll | 111 17 files changed, 443 insertions(+), 82 deletions(-) create mode 100644 llvm/include/llvm/TargetParser/PPCTargetParser.def create mode 100644 llvm/test/CodeGen/PowerPC/cpu-supports.ll diff --git a/clang/include/clang/Basic/Builtins.def b/clang/include/clang/Basic/Builtins.def index 6ea8484606cfd5..5e1f4088ff63f8 100644 --- a/clang/include/clang/Basic/Builtins.def +++ b/clang/include/clang/Basic/Builtins.def @@ -118,6 +118,11 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +// Builtins for checking CPU features based on the GCC builtins. +BUILTIN(__builtin_cpu_supports, "bcC*", "nc") +BUILTIN(__builtin_cpu_is, "bcC*", "nc") +BUILTIN(__builtin_cpu_init, "v", "n") + // Standard libc/libm functions: BUILTIN(__builtin_atan2 , "ddd" , "Fne") BUILTIN(__builtin_atan2f, "fff" , "Fne") diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index e4802f8ab1c156..2acc5ce0f4a365 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -26,13 +26,6 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -// Miscellaneous builtin for checking x86 cpu features. -// TODO: Make this somewhat generic so that other backends -// can use it? -BUILTIN(__builtin_cpu_init, "v", "n") -BUILTIN(__builtin_cpu_supports, "bcC*", "nc") -BUILTIN(__builtin_cpu_is, "bcC*", "nc") - // Undefined Values // TARGET_BUILTIN(__builtin_ia32_undef128, "V2d", "ncV:128:", "") diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 9d56e97a3d4bb8..3d83b387aac093 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1415,6 +1415,12 @@ class TargetInfo : public TransferrableTargetInfo, getTriple().isOSFreeBSD()); } + // Identify whether this target supports __builtin_cpu_supports and + // __builtin_cpu_is. + virtual bool supportsCpuSupports() const { return false; } + virtual bool supportsCpuIs() const { return false; } + virtual bool supportsCpuInit() const { return false; } + // Validate the contents of the __builtin_cpu_supports(const char*) // argument. virtual bool validateCpuSupports(StringRef Name) const { return false; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 0d87a3a4e8c20f..d8759c86c9932c 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { +#define PPC_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true) + return llvm::StringSwitch(FeatureStr) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} + +bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const { +#define PPC_CPU(NAME, NUM) .Case(NAME, true) + return llvm::StringSwitch(CPUName) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index 4d62673ba7fb8c..f700b625b79030 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -359,6 +359,13 @@ class
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema , SourceLocation Loc, return false; } +/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *). +/// This checks that the target supports __builtin_cpu_supports and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuSupports(Sema , const TargetInfo , nemanjai wrote: Makes sense. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -3124,6 +3125,36 @@ bool PPCInstrInfo::expandPostRAPseudo(MachineInstr ) const { .addReg(Reg); return true; } + case PPC::PPCLdFixedAddr: { +assert(Subtarget.isTargetLinux() && + "Only Linux target is expected to contain PPCLdFixedAddr"); +int64_t Offset = 0; +const unsigned Reg = Subtarget.isPPC64() ? PPC::X13 : PPC::R2; +MI.setDesc(get(PPC::LWZ)); +uint64_t FAType = MI.getOperand(1).getImm(); +#undef PPC_FEATURE +#undef PPC_CPU +#include "llvm/TargetParser/PPCTargetParser.def" +// The HWCAP and HWCAP2 word offsets are reversed on big endian Linux. +if ((FAType == PPC_FAWORD_HWCAP && Subtarget.isLittleEndian()) || +(FAType == PPC_FAWORD_HWCAP2 && !Subtarget.isLittleEndian())) + Offset = Subtarget.isPPC64() ? -0x7064 : -0x703C; nemanjai wrote: That is a good point. These aren't externally documented- by Glibc, but they should be documented here in the code. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { nemanjai wrote: These are existing names that I didn't see a compelling reason to change. There may be out of tree users of these interfaces, so I opt to not change API's without a strong reason. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema , SourceLocation Loc, return false; } +/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *). +/// This checks that the target supports __builtin_cpu_supports and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuSupports(Sema , const TargetInfo , + const TargetInfo *AuxTI, CallExpr *TheCall) { + Expr *Arg = TheCall->getArg(0); + + const TargetInfo *TheTI = nullptr; + if (TI.supportsCpuSupports()) +TheTI = + else if (AuxTI && AuxTI->supportsCpuSupports()) +TheTI = AuxTI; + else +return S.Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported) + << SourceRange(TheCall->getBeginLoc(), TheCall->getEndLoc()); + + // Check if the argument is a string literal. + if (!isa(Arg->IgnoreParenImpCasts())) +return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal) + << Arg->getSourceRange(); + + // Check the contents of the string. + StringRef Feature = + cast(Arg->IgnoreParenImpCasts())->getString(); + if (!TheTI->validateCpuSupports(Feature)) +return S.Diag(TheCall->getBeginLoc(), diag::err_invalid_cpu_supports) + << Arg->getSourceRange(); + return false; +} + +/// SemaBuiltinCpuIs - Handle __builtin_cpu_is(char *). +/// This checks that the target supports __builtin_cpu_is and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuIs(Sema , const TargetInfo , + const TargetInfo *AuxTI, CallExpr *TheCall) { + Expr *Arg = TheCall->getArg(0); + + const TargetInfo *TheTI = nullptr; + if (TI.supportsCpuIs()) +TheTI = + else if (AuxTI && AuxTI->supportsCpuIs()) +TheTI = AuxTI; + else +return S.Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported) + << SourceRange(TheCall->getBeginLoc(), TheCall->getEndLoc()); + + // Check if the argument is a string literal. + if (!isa(Arg->IgnoreParenImpCasts())) +return S.Diag(TheCall->getBeginLoc(), diag::err_expr_not_string_literal) + << Arg->getSourceRange(); + + // Check the contents of the string. + StringRef Feature = nemanjai wrote: Sure. But I ended up merging the two. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -0,0 +1,80 @@ +#ifndef PPC_FEATURE diggerlin wrote: we will support these feature in AIX OS soon. can we change `PPC_FEATURE` to `PPC_LINUX_FEATURE` and `PPC_CPU` to `PPC_LINUX_CPU` and when implement the __builtin_cpu_is and __builtin_cpu_supports in AIX OD we can `PPC_AIX_FEATURE` and `PPC_AIX_CPU` https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -15,38 +20,57 @@ int main(void) { if (__builtin_cpu_supports("sse4.2")) a("sse4.2"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 - // CHECK: = icmp eq i32 [[AND]], 256 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 + // CHECK-X86: = icmp eq i32 [[AND]], 256 if (__builtin_cpu_supports("gfni")) a("gfni"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 - // CHECK: = icmp eq i32 [[AND]], 1 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 + // CHECK-X86: = icmp eq i32 [[AND]], 1 return 0; } -// CHECK: declare dso_local void @__cpu_indicator_init() +// CHECK-X86: declare dso_local void @__cpu_indicator_init() -// CHECK-LABEL: define{{.*}} @baseline( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) -// CHECK-NEXT:and i32 [[LOAD]], -2147483648 +// CHECK-X86-LABEL: define{{.*}} @baseline( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) +// CHECK-X86-NEXT:and i32 [[LOAD]], -2147483648 int baseline() { return __builtin_cpu_supports("x86-64"); } -// CHECK-LABEL: define{{.*}} @v2( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 1 +// CHECK-X86-LABEL: define{{.*}} @v2( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 1 int v2() { return __builtin_cpu_supports("x86-64-v2"); } -// CHECK-LABEL: define{{.*}} @v3( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 2 +// CHECK-X86-LABEL: define{{.*}} @v3( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 2 int v3() { return __builtin_cpu_supports("x86-64-v3"); } -// CHECK-LABEL: define{{.*}} @v4( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 4 +// CHECK-X86-LABEL: define{{.*}} @v4( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 4 int v4() { return __builtin_cpu_supports("x86-64-v4"); } +#else +int test(int a) { +// CHECK-PPC: [[CPUSUP:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 2) +// CHECK-PPC: [[AND:%[^ ]+]] = and i32 [[CPUSUP]], 8388608 +// CHECK-PPC: icmp ne i32 [[AND]], 0 diggerlin wrote: change to CHECK-PPC-NEXT: https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -15,38 +20,57 @@ int main(void) { if (__builtin_cpu_supports("sse4.2")) a("sse4.2"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 - // CHECK: = icmp eq i32 [[AND]], 256 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 + // CHECK-X86: = icmp eq i32 [[AND]], 256 if (__builtin_cpu_supports("gfni")) a("gfni"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 - // CHECK: = icmp eq i32 [[AND]], 1 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 + // CHECK-X86: = icmp eq i32 [[AND]], 1 return 0; } -// CHECK: declare dso_local void @__cpu_indicator_init() +// CHECK-X86: declare dso_local void @__cpu_indicator_init() -// CHECK-LABEL: define{{.*}} @baseline( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) -// CHECK-NEXT:and i32 [[LOAD]], -2147483648 +// CHECK-X86-LABEL: define{{.*}} @baseline( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) +// CHECK-X86-NEXT:and i32 [[LOAD]], -2147483648 int baseline() { return __builtin_cpu_supports("x86-64"); } -// CHECK-LABEL: define{{.*}} @v2( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 1 +// CHECK-X86-LABEL: define{{.*}} @v2( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 1 int v2() { return __builtin_cpu_supports("x86-64-v2"); } -// CHECK-LABEL: define{{.*}} @v3( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 2 +// CHECK-X86-LABEL: define{{.*}} @v3( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 2 int v3() { return __builtin_cpu_supports("x86-64-v3"); } -// CHECK-LABEL: define{{.*}} @v4( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 4 +// CHECK-X86-LABEL: define{{.*}} @v4( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 4 int v4() { return __builtin_cpu_supports("x86-64-v4"); } +#else +int test(int a) { +// CHECK-PPC: [[CPUSUP:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 2) +// CHECK-PPC: [[AND:%[^ ]+]] = and i32 [[CPUSUP]], 8388608 +// CHECK-PPC: icmp ne i32 [[AND]], 0 +// CHECK-PPC: [[CPUSUP2:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 1) +// CHECK-PPC: [[AND2:%[^ ]+]] = and i32 [[CPUSUP2]], 67108864 +// CHECK-PPC: icmp ne i32 [[AND2]], 0 +// CHECK-PPC: [[CPUID:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3) +// CHECK-PPC: icmp eq i32 [[CPUID]], 39 diggerlin wrote: ditto https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -15,38 +20,57 @@ int main(void) { if (__builtin_cpu_supports("sse4.2")) a("sse4.2"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 - // CHECK: = icmp eq i32 [[AND]], 256 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 + // CHECK-X86: = icmp eq i32 [[AND]], 256 if (__builtin_cpu_supports("gfni")) a("gfni"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 - // CHECK: = icmp eq i32 [[AND]], 1 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 + // CHECK-X86: = icmp eq i32 [[AND]], 1 return 0; } -// CHECK: declare dso_local void @__cpu_indicator_init() +// CHECK-X86: declare dso_local void @__cpu_indicator_init() -// CHECK-LABEL: define{{.*}} @baseline( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) -// CHECK-NEXT:and i32 [[LOAD]], -2147483648 +// CHECK-X86-LABEL: define{{.*}} @baseline( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) +// CHECK-X86-NEXT:and i32 [[LOAD]], -2147483648 int baseline() { return __builtin_cpu_supports("x86-64"); } -// CHECK-LABEL: define{{.*}} @v2( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 1 +// CHECK-X86-LABEL: define{{.*}} @v2( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 1 int v2() { return __builtin_cpu_supports("x86-64-v2"); } -// CHECK-LABEL: define{{.*}} @v3( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 2 +// CHECK-X86-LABEL: define{{.*}} @v3( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 2 int v3() { return __builtin_cpu_supports("x86-64-v3"); } -// CHECK-LABEL: define{{.*}} @v4( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 4 +// CHECK-X86-LABEL: define{{.*}} @v4( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 4 int v4() { return __builtin_cpu_supports("x86-64-v4"); } +#else +int test(int a) { +// CHECK-PPC: [[CPUSUP:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 2) +// CHECK-PPC: [[AND:%[^ ]+]] = and i32 [[CPUSUP]], 8388608 +// CHECK-PPC: icmp ne i32 [[AND]], 0 +// CHECK-PPC: [[CPUSUP2:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 1) +// CHECK-PPC: [[AND2:%[^ ]+]] = and i32 [[CPUSUP2]], 67108864 diggerlin wrote: change to CHECK-PPC-NEXT: https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -15,38 +20,57 @@ int main(void) { if (__builtin_cpu_supports("sse4.2")) a("sse4.2"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 - // CHECK: = icmp eq i32 [[AND]], 256 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0) + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 + // CHECK-X86: = icmp eq i32 [[AND]], 256 if (__builtin_cpu_supports("gfni")) a("gfni"); - // CHECK: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 - // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 - // CHECK: = icmp eq i32 [[AND]], 1 + // CHECK-X86: [[LOAD:%[^ ]+]] = load i32, ptr @__cpu_features2 + // CHECK-X86: [[AND:%[^ ]+]] = and i32 [[LOAD]], 1 + // CHECK-X86: = icmp eq i32 [[AND]], 1 return 0; } -// CHECK: declare dso_local void @__cpu_indicator_init() +// CHECK-X86: declare dso_local void @__cpu_indicator_init() -// CHECK-LABEL: define{{.*}} @baseline( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) -// CHECK-NEXT:and i32 [[LOAD]], -2147483648 +// CHECK-X86-LABEL: define{{.*}} @baseline( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 1) +// CHECK-X86-NEXT:and i32 [[LOAD]], -2147483648 int baseline() { return __builtin_cpu_supports("x86-64"); } -// CHECK-LABEL: define{{.*}} @v2( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 1 +// CHECK-X86-LABEL: define{{.*}} @v2( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 1 int v2() { return __builtin_cpu_supports("x86-64-v2"); } -// CHECK-LABEL: define{{.*}} @v3( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 2 +// CHECK-X86-LABEL: define{{.*}} @v3( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 2 int v3() { return __builtin_cpu_supports("x86-64-v3"); } -// CHECK-LABEL: define{{.*}} @v4( -// CHECK: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) -// CHECK-NEXT:and i32 [[LOAD]], 4 +// CHECK-X86-LABEL: define{{.*}} @v4( +// CHECK-X86: [[LOAD:%.*]] = load i32, ptr getelementptr inbounds ([[[#]] x i32], ptr @__cpu_features2, i32 0, i32 2) +// CHECK-X86-NEXT:and i32 [[LOAD]], 4 int v4() { return __builtin_cpu_supports("x86-64-v4"); } +#else +int test(int a) { +// CHECK-PPC: [[CPUSUP:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 2) +// CHECK-PPC: [[AND:%[^ ]+]] = and i32 [[CPUSUP]], 8388608 +// CHECK-PPC: icmp ne i32 [[AND]], 0 +// CHECK-PPC: [[CPUSUP2:%[^ ]+]] = call i32 @llvm.ppc.fixed.addr.ld(i32 1) +// CHECK-PPC: [[AND2:%[^ ]+]] = and i32 [[CPUSUP2]], 67108864 +// CHECK-PPC: icmp ne i32 [[AND2]], 0 diggerlin wrote: ditto https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan commented: Additional group review comments. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -32,6 +32,7 @@ class PPCTargetMachine final : public LLVMTargetMachine { std::unique_ptr TLOF; PPCABI TargetABI; Endian Endianness = Endian::NOT_DETECTED; + mutable bool HasGlibcHWCAPAccess = false; amy-kwan wrote: Question: Why does this need to be mutable? https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan commented: Additional group review comments. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan edited https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/amy-kwan commented: Additional group code review comments. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -359,6 +359,13 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo { bool isSPRegName(StringRef RegName) const override { return RegName.equals("r1") || RegName.equals("x1"); } + + // We support __builtin_cpu_supports/__builtin_cpu_is on targets that amy-kwan wrote: Is it possible for `isOSGlibc()` to return true, but not have access to glibc? The implementation for this function is as follows: ``` C++ /// Tests whether the OS uses glibc. bool isOSGlibc() const { return (getOS() == Triple::Linux || getOS() == Triple::KFreeBSD || getOS() == Triple::Hurd) && !isAndroid(); } ``` But for example, Alpine Linux doesn't have glibc. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema , SourceLocation Loc, return false; } +/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *). +/// This checks that the target supports __builtin_cpu_supports and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuSupports(Sema , const TargetInfo , + const TargetInfo *AuxTI, CallExpr *TheCall) { amy-kwan wrote: Question: Just wondering, what is and why are we checking an auxiliary target? https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[llvm] [clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema , SourceLocation Loc, return false; } +/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *). +/// This checks that the target supports __builtin_cpu_supports and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuSupports(Sema , const TargetInfo , + const TargetInfo *AuxTI, CallExpr *TheCall) { + Expr *Arg = TheCall->getArg(0); + + const TargetInfo *TheTI = nullptr; + if (TI.supportsCpuSupports()) +TheTI = + else if (AuxTI && AuxTI->supportsCpuSupports()) +TheTI = AuxTI; + else +return S.Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported) + << SourceRange(TheCall->getBeginLoc(), TheCall->getEndLoc()); + + // Check if the argument is a string literal. + if (!isa(Arg->IgnoreParenImpCasts())) amy-kwan wrote: It seems like we can pull out some of the calls are are repeated, such as `Arg->IgnoreParenImpCasts()`. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
@@ -2110,6 +2110,66 @@ static bool checkFPMathBuiltinElementType(Sema , SourceLocation Loc, return false; } +/// SemaBuiltinCpuSupports - Handle __builtin_cpu_supports(char *). +/// This checks that the target supports __builtin_cpu_supports and +/// that the string argument is constant and valid. +static bool SemaBuiltinCpuSupports(Sema , const TargetInfo , + const TargetInfo *AuxTI, CallExpr *TheCall) { + Expr *Arg = TheCall->getArg(0); + + const TargetInfo *TheTI = nullptr; + if (TI.supportsCpuSupports()) +TheTI = + else if (AuxTI && AuxTI->supportsCpuSupports()) +TheTI = AuxTI; ilinpv wrote: If these builtins are needed for auxiliary target ( are they ? ) it would good to have tests for that. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/ilinpv edited https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/ilinpv commented: Except for the AuxTarget question, target independent part looks good to me. Thank you for the patch. https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/nemanjai updated https://github.com/llvm/llvm-project/pull/68919 >From 71f1352bf00d6a9eefa3f199859d47d093f272f8 Mon Sep 17 00:00:00 2001 From: Nemanja Ivanovic Date: Thu, 12 Oct 2023 14:08:42 -0400 Subject: [PATCH 1/2] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. --- clang/include/clang/Basic/Builtins.def| 5 + clang/include/clang/Basic/BuiltinsX86.def | 7 - clang/include/clang/Basic/TargetInfo.h| 6 + clang/lib/Basic/Targets/PPC.cpp | 14 ++ clang/lib/Basic/Targets/PPC.h | 7 + clang/lib/Basic/Targets/X86.h | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 42 +- clang/lib/Sema/SemaChecking.cpp | 124 +++--- clang/test/CodeGen/builtin-cpu-supports.c | 68 ++ clang/test/Sema/builtin-cpu-supports.c| 8 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 6 + .../llvm/TargetParser/PPCTargetParser.def | 80 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 33 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 3 + llvm/lib/Target/PowerPC/PPCTargetMachine.h| 3 + llvm/test/CodeGen/PowerPC/cpu-supports.ll | 111 17 files changed, 443 insertions(+), 82 deletions(-) create mode 100644 llvm/include/llvm/TargetParser/PPCTargetParser.def create mode 100644 llvm/test/CodeGen/PowerPC/cpu-supports.ll diff --git a/clang/include/clang/Basic/Builtins.def b/clang/include/clang/Basic/Builtins.def index 6ea8484606cfd5d..5e1f4088ff63f8a 100644 --- a/clang/include/clang/Basic/Builtins.def +++ b/clang/include/clang/Basic/Builtins.def @@ -118,6 +118,11 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +// Builtins for checking CPU features based on the GCC builtins. +BUILTIN(__builtin_cpu_supports, "bcC*", "nc") +BUILTIN(__builtin_cpu_is, "bcC*", "nc") +BUILTIN(__builtin_cpu_init, "v", "n") + // Standard libc/libm functions: BUILTIN(__builtin_atan2 , "ddd" , "Fne") BUILTIN(__builtin_atan2f, "fff" , "Fne") diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index e4802f8ab1c1562..2acc5ce0f4a3653 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -26,13 +26,6 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -// Miscellaneous builtin for checking x86 cpu features. -// TODO: Make this somewhat generic so that other backends -// can use it? -BUILTIN(__builtin_cpu_init, "v", "n") -BUILTIN(__builtin_cpu_supports, "bcC*", "nc") -BUILTIN(__builtin_cpu_is, "bcC*", "nc") - // Undefined Values // TARGET_BUILTIN(__builtin_ia32_undef128, "V2d", "ncV:128:", "") diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 9d56e97a3d4bb88..3d83b387aac0931 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1415,6 +1415,12 @@ class TargetInfo : public TransferrableTargetInfo, getTriple().isOSFreeBSD()); } + // Identify whether this target supports __builtin_cpu_supports and + // __builtin_cpu_is. + virtual bool supportsCpuSupports() const { return false; } + virtual bool supportsCpuIs() const { return false; } + virtual bool supportsCpuInit() const { return false; } + // Validate the contents of the __builtin_cpu_supports(const char*) // argument. virtual bool validateCpuSupports(StringRef Name) const { return false; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 0d87a3a4e8c20f3..d8759c86c9932ca 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { +#define PPC_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true) + return llvm::StringSwitch(FeatureStr) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} + +bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const { +#define PPC_CPU(NAME, NUM) .Case(NAME, true) + return llvm::StringSwitch(CPUName) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index 4d62673ba7fb8c5..f700b625b790309 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -359,6 +359,13
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff dd0f642e6ec5049ccabe3f462cc427ffe213829b 71f1352bf00d6a9eefa3f199859d47d093f272f8 -- clang/include/clang/Basic/TargetInfo.h clang/lib/Basic/Targets/PPC.cpp clang/lib/Basic/Targets/PPC.h clang/lib/Basic/Targets/X86.h clang/lib/CodeGen/CGBuiltin.cpp clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/builtin-cpu-supports.c clang/test/Sema/builtin-cpu-supports.c llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp llvm/lib/Target/PowerPC/PPCInstrInfo.cpp llvm/lib/Target/PowerPC/PPCTargetMachine.h `` View the diff from clang-format here. ``diff diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 583b2be69..c5920216e 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -16093,8 +16093,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, #define PPC_CPU(Name, NumericID) .Case(Name, NumericID) #include "llvm/TargetParser/PPCTargetParser.def" .Default(-1U); -Value *Op0 = -llvm::ConstantInt::get(Int32Ty, PPC_FAWORD_CPUID); +Value *Op0 = llvm::ConstantInt::get(Int32Ty, PPC_FAWORD_CPUID); llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_fixed_addr_ld); Value *TheCall = Builder.CreateCall(F, {Op0}, "cpu_is"); return Builder.CreateICmpEQ(TheCall, diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 7d4cdd8be..79123cedd 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -3139,10 +3139,8 @@ bool PPCInstrInfo::expandPostRAPseudo(MachineInstr ) const { if ((FAType == PPC_FAWORD_HWCAP && Subtarget.isLittleEndian()) || (FAType == PPC_FAWORD_HWCAP2 && !Subtarget.isLittleEndian())) Offset = Subtarget.isPPC64() ? -0x7064 : -0x703C; -else if ((FAType == PPC_FAWORD_HWCAP2 && - Subtarget.isLittleEndian()) || - (FAType == PPC_FAWORD_HWCAP && - !Subtarget.isLittleEndian())) +else if ((FAType == PPC_FAWORD_HWCAP2 && Subtarget.isLittleEndian()) || + (FAType == PPC_FAWORD_HWCAP && !Subtarget.isLittleEndian())) Offset = Subtarget.isPPC64() ? -0x7068 : -0x7040; else if (FAType == PPC_FAWORD_CPUID) Offset = Subtarget.isPPC64() ? -0x705C : -0x7034; `` https://github.com/llvm/llvm-project/pull/68919 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Nemanja Ivanovic (nemanjai) Changes Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. I originally proposed this in https://reviews.llvm.org/D152914 and this addresses the comments I received there. --- Patch is 34.63 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/68919.diff 17 Files Affected: - (modified) clang/include/clang/Basic/Builtins.def (+5) - (modified) clang/include/clang/Basic/BuiltinsX86.def (-7) - (modified) clang/include/clang/Basic/TargetInfo.h (+6) - (modified) clang/lib/Basic/Targets/PPC.cpp (+14) - (modified) clang/lib/Basic/Targets/PPC.h (+7) - (modified) clang/lib/Basic/Targets/X86.h (+4) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+39-3) - (modified) clang/lib/Sema/SemaChecking.cpp (+77-47) - (modified) clang/test/CodeGen/builtin-cpu-supports.c (+46-22) - (modified) clang/test/Sema/builtin-cpu-supports.c (+5-3) - (modified) llvm/include/llvm/IR/IntrinsicsPowerPC.td (+6) - (added) llvm/include/llvm/TargetParser/PPCTargetParser.def (+80) - (modified) llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (+4) - (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.cpp (+33) - (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.td (+3) - (modified) llvm/lib/Target/PowerPC/PPCTargetMachine.h (+3) - (added) llvm/test/CodeGen/PowerPC/cpu-supports.ll (+111) ``diff diff --git a/clang/include/clang/Basic/Builtins.def b/clang/include/clang/Basic/Builtins.def index 6ea8484606cfd5d..5e1f4088ff63f8a 100644 --- a/clang/include/clang/Basic/Builtins.def +++ b/clang/include/clang/Basic/Builtins.def @@ -118,6 +118,11 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +// Builtins for checking CPU features based on the GCC builtins. +BUILTIN(__builtin_cpu_supports, "bcC*", "nc") +BUILTIN(__builtin_cpu_is, "bcC*", "nc") +BUILTIN(__builtin_cpu_init, "v", "n") + // Standard libc/libm functions: BUILTIN(__builtin_atan2 , "ddd" , "Fne") BUILTIN(__builtin_atan2f, "fff" , "Fne") diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index e4802f8ab1c1562..2acc5ce0f4a3653 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -26,13 +26,6 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -// Miscellaneous builtin for checking x86 cpu features. -// TODO: Make this somewhat generic so that other backends -// can use it? -BUILTIN(__builtin_cpu_init, "v", "n") -BUILTIN(__builtin_cpu_supports, "bcC*", "nc") -BUILTIN(__builtin_cpu_is, "bcC*", "nc") - // Undefined Values // TARGET_BUILTIN(__builtin_ia32_undef128, "V2d", "ncV:128:", "") diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 9d56e97a3d4bb88..3d83b387aac0931 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1415,6 +1415,12 @@ class TargetInfo : public TransferrableTargetInfo, getTriple().isOSFreeBSD()); } + // Identify whether this target supports __builtin_cpu_supports and + // __builtin_cpu_is. + virtual bool supportsCpuSupports() const { return false; } + virtual bool supportsCpuIs() const { return false; } + virtual bool supportsCpuInit() const { return false; } + // Validate the contents of the __builtin_cpu_supports(const char*) // argument. virtual bool validateCpuSupports(StringRef Name) const { return false; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 0d87a3a4e8c20f3..d8759c86c9932ca 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { +#define PPC_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true) + return llvm::StringSwitch(FeatureStr) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} + +bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const { +#define PPC_CPU(NAME, NUM) .Case(NAME, true) + return llvm::StringSwitch(CPUName) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index 4d62673ba7fb8c5..f700b625b790309 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -359,6 +359,13 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo { bool isSPRegName(StringRef RegName) const override { return
[clang] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC (PR #68919)
https://github.com/nemanjai created https://github.com/llvm/llvm-project/pull/68919 Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. I originally proposed this in https://reviews.llvm.org/D152914 and this addresses the comments I received there. >From 71f1352bf00d6a9eefa3f199859d47d093f272f8 Mon Sep 17 00:00:00 2001 From: Nemanja Ivanovic Date: Thu, 12 Oct 2023 14:08:42 -0400 Subject: [PATCH] [PowerPC][X86] Make cpu id builtins target independent and lower for PPC Make __builtin_cpu_{init|supports|is} target independent and provide an opt-in query for targets that want to support it. Each target is still responsible for their specific lowering/code-gen. Also provide code-gen for PowerPC. --- clang/include/clang/Basic/Builtins.def| 5 + clang/include/clang/Basic/BuiltinsX86.def | 7 - clang/include/clang/Basic/TargetInfo.h| 6 + clang/lib/Basic/Targets/PPC.cpp | 14 ++ clang/lib/Basic/Targets/PPC.h | 7 + clang/lib/Basic/Targets/X86.h | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 42 +- clang/lib/Sema/SemaChecking.cpp | 124 +++--- clang/test/CodeGen/builtin-cpu-supports.c | 68 ++ clang/test/Sema/builtin-cpu-supports.c| 8 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 6 + .../llvm/TargetParser/PPCTargetParser.def | 80 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 33 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 3 + llvm/lib/Target/PowerPC/PPCTargetMachine.h| 3 + llvm/test/CodeGen/PowerPC/cpu-supports.ll | 111 17 files changed, 443 insertions(+), 82 deletions(-) create mode 100644 llvm/include/llvm/TargetParser/PPCTargetParser.def create mode 100644 llvm/test/CodeGen/PowerPC/cpu-supports.ll diff --git a/clang/include/clang/Basic/Builtins.def b/clang/include/clang/Basic/Builtins.def index 6ea8484606cfd5d..5e1f4088ff63f8a 100644 --- a/clang/include/clang/Basic/Builtins.def +++ b/clang/include/clang/Basic/Builtins.def @@ -118,6 +118,11 @@ # define LANGBUILTIN(ID, TYPE, ATTRS, BUILTIN_LANG) BUILTIN(ID, TYPE, ATTRS) #endif +// Builtins for checking CPU features based on the GCC builtins. +BUILTIN(__builtin_cpu_supports, "bcC*", "nc") +BUILTIN(__builtin_cpu_is, "bcC*", "nc") +BUILTIN(__builtin_cpu_init, "v", "n") + // Standard libc/libm functions: BUILTIN(__builtin_atan2 , "ddd" , "Fne") BUILTIN(__builtin_atan2f, "fff" , "Fne") diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def index e4802f8ab1c1562..2acc5ce0f4a3653 100644 --- a/clang/include/clang/Basic/BuiltinsX86.def +++ b/clang/include/clang/Basic/BuiltinsX86.def @@ -26,13 +26,6 @@ # define TARGET_HEADER_BUILTIN(ID, TYPE, ATTRS, HEADER, LANG, FEATURE) BUILTIN(ID, TYPE, ATTRS) #endif -// Miscellaneous builtin for checking x86 cpu features. -// TODO: Make this somewhat generic so that other backends -// can use it? -BUILTIN(__builtin_cpu_init, "v", "n") -BUILTIN(__builtin_cpu_supports, "bcC*", "nc") -BUILTIN(__builtin_cpu_is, "bcC*", "nc") - // Undefined Values // TARGET_BUILTIN(__builtin_ia32_undef128, "V2d", "ncV:128:", "") diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index 9d56e97a3d4bb88..3d83b387aac0931 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1415,6 +1415,12 @@ class TargetInfo : public TransferrableTargetInfo, getTriple().isOSFreeBSD()); } + // Identify whether this target supports __builtin_cpu_supports and + // __builtin_cpu_is. + virtual bool supportsCpuSupports() const { return false; } + virtual bool supportsCpuIs() const { return false; } + virtual bool supportsCpuInit() const { return false; } + // Validate the contents of the __builtin_cpu_supports(const char*) // argument. virtual bool validateCpuSupports(StringRef Name) const { return false; } diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 0d87a3a4e8c20f3..d8759c86c9932ca 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -873,3 +873,17 @@ ArrayRef PPCTargetInfo::getTargetBuiltins() const { return llvm::ArrayRef(BuiltinInfo, clang::PPC::LastTSBuiltin - Builtin::FirstTSBuiltin); } + +bool PPCTargetInfo::validateCpuSupports(StringRef FeatureStr) const { +#define PPC_FEATURE(NAME, DESC, ENUMNAME, ENUMVAL, HWCAPN) .Case(NAME, true) + return llvm::StringSwitch(FeatureStr) +#include "llvm/TargetParser/PPCTargetParser.def" + .Default(false); +} + +bool PPCTargetInfo::validateCpuIs(StringRef CPUName) const { +#define PPC_CPU(NAME, NUM)