[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-22 Thread Wang Pengcheng via cfe-commits

wangpc-pp wrote:

> Can we split the CodeGen part out of this patch?

MC part is https://github.com/llvm/llvm-project/pull/78970.
This PR will be the CodeGen part and I will update this PR later.

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-18 Thread Craig Topper via cfe-commits

topperc wrote:

> > I guess Zaamo + Zacas is technically a way one could implement atomics 
> > without LR/SC?
> 
> The Zacas extension depends upon the A extension.

I filed an issue asking about that 
https://github.com/riscv/riscv-zaamo-zalrsc/issues/5

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-18 Thread Yingwei Zheng via cfe-commits

dtcxzyw wrote:

> I guess Zaamo + Zacas is technically a way one could implement atomics 
> without LR/SC?

The Zacas extension depends upon the A extension.


https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-18 Thread Jessica Clarke via cfe-commits

jrtc27 wrote:

I guess Zaamo + Zacas is technically a way one could implement atomics without 
LR/SC?

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-18 Thread Alex Bradbury via cfe-commits

asb wrote:

Thanks James, that matches what I'd understood. Just one comment on this though:

> If Zaamo is present, but neither Zalrsc nor Zacas are present, I think 
> there's no way to implement a cmpxchg operation. This means lock-free atomics 
> cannot be supported, so it should `setMaxAtomicSizeInBitsSupported(0)`.

Especially given that Zaamo is 
[documented](https://github.com/riscv/riscv-zaamo-zalrsc/blob/main/zaamo-zalrsc.adoc)
 as targeting embedded systems, emitting __sync calls for the non-AMO atomics 
(as would be done with +forced-atomics, presumably they'd be implemented by 
turning off interrupts) seems defensible doesn't it? Or is there a correctness 
issue with that I'm missing?

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-17 Thread James Y Knight via cfe-commits

jyknight wrote:

There's two sets of atomic functions:
`__atomic_*` are provided by libatomic, and might use locking, or not.
`__sync_*` should always be lock-free. These are only used on certain 
architectures where it's guaranteed that the operation _can_ be implemented 
lock-free, but it's desirable for whatever reason to not do so inline.

For this patch, I think the correct behavior is:
- If Zalrsc is present, but Zaamo is not, you may either emit an LR/SC loop 
(what I'd recommend), or emit an out-of-line call to `__sync_*` (which needs to 
be implemented with that LR/SC loop.)
- If Zaamo is present, but neither Zalrsc nor Zacas are present, I think 
there's no way to implement a cmpxchg operation. This means lock-free atomics 
cannot be supported, so it should `setMaxAtomicSizeInBitsSupported(0)`.

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-17 Thread Alex Bradbury via cfe-commits

asb wrote:

CC @jyknight who can hopefully confirm if my interpretation is correct. Based 
on your comment on #77814, perhaps the expectation is that libatomic would have 
a lock-free implementation for any __sync calls used up to the max atomic width 
(e.g. lr/sc based if there's no AMO instructions)?

https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-09 Thread Yingwei Zheng via cfe-commits


@@ -0,0 +1,11 @@
+# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zaamo < %s 2>&1 | 
FileCheck %s

dtcxzyw wrote:

Can we split `rv32a-invalid.s` into two files? I think it is better than 
duplicating tests for new extensions.


https://github.com/llvm/llvm-project/pull/77424
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[clang] [llvm] [RISCV] Add experimental support of Zaamo and Zalrsc (PR #77424)

2024-01-09 Thread via cfe-commits

llvmbot wrote:



@llvm/pr-subscribers-clang

@llvm/pr-subscribers-mc

Author: Wang Pengcheng (wangpc-pp)


Changes

`A` extension has been split into two parts: Zaamo (Atomic Memory
Operations) and Zalrsc (Load-Reserved/Store-Conditional). See also
https://github.com/riscv/riscv-zaamo-zalrsc.

This patch adds the basic compiler support.

Tests for `A` extension are reused.


---

Patch is 47.75 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/77424.diff


26 Files Affected:

- (modified) clang/lib/Basic/Targets/RISCV.cpp (+1-1) 
- (modified) clang/test/Preprocessor/riscv-target-features.c (+19) 
- (modified) llvm/docs/RISCVUsage.rst (+2) 
- (modified) llvm/lib/Support/RISCVISAInfo.cpp (+2) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+25-1) 
- (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+4-3) 
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoA.td (+20-12) 
- (modified) llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll (+4) 
- (modified) llvm/test/CodeGen/RISCV/atomic-cmpxchg-flag.ll (+2) 
- (modified) llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll (+8) 
- (modified) llvm/test/CodeGen/RISCV/atomic-rmw-discard.ll (+4) 
- (modified) llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll (+4) 
- (modified) llvm/test/CodeGen/RISCV/atomic-rmw.ll (+8) 
- (modified) llvm/test/CodeGen/RISCV/atomic-signext.ll (+4) 
- (modified) llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll (+4) 
- (modified) llvm/test/CodeGen/RISCV/attributes.ll (+8) 
- (modified) llvm/test/MC/RISCV/rv32i-invalid.s (+1-1) 
- (added) llvm/test/MC/RISCV/rv32zaamo-invalid.s (+11) 
- (added) llvm/test/MC/RISCV/rv32zaamo-valid.s (+122) 
- (added) llvm/test/MC/RISCV/rv32zalrsc-invalid.s (+7) 
- (added) llvm/test/MC/RISCV/rv32zalrsc-valid.s (+36) 
- (added) llvm/test/MC/RISCV/rv64zaamo-invalid.s (+11) 
- (added) llvm/test/MC/RISCV/rv64zaamo-valid.s (+157) 
- (added) llvm/test/MC/RISCV/rv64zalrsc-invalid.s (+7) 
- (added) llvm/test/MC/RISCV/rv64zalrsc-valid.s (+42) 
- (modified) llvm/unittests/Support/RISCVISAInfoTest.cpp (+2) 


``diff
diff --git a/clang/lib/Basic/Targets/RISCV.cpp 
b/clang/lib/Basic/Targets/RISCV.cpp
index daaa8639ae8358..7aff435b715ca1 100644
--- a/clang/lib/Basic/Targets/RISCV.cpp
+++ b/clang/lib/Basic/Targets/RISCV.cpp
@@ -176,7 +176,7 @@ void RISCVTargetInfo::getTargetDefines(const LangOptions 
,
 Builder.defineMacro("__riscv_muldiv");
   }
 
-  if (ISAInfo->hasExtension("a")) {
+  if (ISAInfo->hasExtension("a") || ISAInfo->hasExtension("zaamo")) {
 Builder.defineMacro("__riscv_atomic");
 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index 02d8d34116f804..69ba912880f800 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -114,7 +114,9 @@
 
 // CHECK-NOT: __riscv_smaia {{.*$}}
 // CHECK-NOT: __riscv_ssaia {{.*$}}
+// CHECK-NOT: __riscv_zaamo {{.*$}}
 // CHECK-NOT: __riscv_zacas {{.*$}}
+// CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zfa {{.*$}}
 // CHECK-NOT: __riscv_zfbfmin {{.*$}}
 // CHECK-NOT: __riscv_zicfilp {{.*$}}
@@ -1025,6 +1027,15 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-SSAIA-EXT %s
 // CHECK-SSAIA-EXT: __riscv_ssaia  100{{$}}
 
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zaamo0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN: -march=rv64i_zaamo0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
+// CHECK-ZAAMO-EXT: __riscv_atomic 1
+// CHECK-ZAAMO-EXT: __riscv_zaamo 1000{{$}}
+
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN: -march=rv32i_zacas1p0 -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
@@ -1033,6 +1044,14 @@
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
 // CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
 
+// RUN: %clang --target=riscv32 -menable-experimental-extensions \
+// RUN: -march=rv32i_zalrsc0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s
+// RUN: %clang --target=riscv64 -menable-experimental-extensions \
+// RUN: -march=rv64i_zalrsc0p1 -x c -E -dM %s \
+// RUN: -o - | FileCheck --check-prefix=CHECK-ZALRSC-EXT %s
+// CHECK-ZALRSC-EXT: __riscv_zalrsc 1000{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN: -march=rv32izfa -x c -E -dM %s \
 // RUN: -o - | FileCheck --check-prefix=CHECK-ZFA-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 99c7146825f5ee..1eb1823faebac1 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -96,6 +96,8 @@ on support follow.
  ``Svnapot``  Assembly Support
  ``Svpbmt``