[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Craig Topper via cfe-commits 

https://github.com/topperc closed 
https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Craig Topper via cfe-commits 

https://github.com/topperc updated 
https://github.com/llvm/llvm-project/pull/83195

>From 8ed68475b43008d9c7baff7f275026cc7ada5993 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Tue, 27 Feb 2024 14:01:52 -0800
Subject: [PATCH 1/4] [RISCV] Remove experimental from Zacas.

Document that we don't use the double compare and swap instructions due
to ABI concerns.
---
 .../test/Preprocessor/riscv-target-features.c  | 18 +-
 llvm/docs/RISCVUsage.rst   |  9 ++---
 llvm/docs/ReleaseNotes.rst |  1 +
 llvm/lib/Support/RISCVISAInfo.cpp  |  2 +-
 llvm/lib/Target/RISCV/RISCVFeatures.td |  2 +-
 .../RISCV/atomic-cmpxchg-branch-on-result.ll   |  6 +++---
 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-rmw.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-signext.ll  |  4 ++--
 llvm/test/CodeGen/RISCV/attributes.ll  |  4 ++--
 llvm/test/MC/RISCV/rv32zacas-invalid.s |  2 +-
 llvm/test/MC/RISCV/rv32zacas-valid.s   | 12 ++--
 llvm/test/MC/RISCV/rv64zacas-valid.s   |  6 +++---
 llvm/test/MC/RISCV/rvzabha-zacas-valid.s   | 12 ++--
 llvm/unittests/Support/RISCVISAInfoTest.cpp|  2 +-
 15 files changed, 54 insertions(+), 50 deletions(-)

diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index ea81c662044306..df13e0beb16326 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -75,6 +75,7 @@
 // CHECK-NOT: __riscv_za128rs {{.*$}}
 // CHECK-NOT: __riscv_za64rs {{.*$}}
 // CHECK-NOT: __riscv_zawrs {{.*$}}
+// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zba {{.*$}}
 // CHECK-NOT: __riscv_zbb {{.*$}}
 // CHECK-NOT: __riscv_zbc {{.*$}}
@@ -166,7 +167,6 @@
 // CHECK-NOT: __riscv_ssqosid{{.*$}}
 // CHECK-NOT: __riscv_supm{{.*$}}
 // CHECK-NOT: __riscv_zaamo {{.*$}}
-// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zalasr {{.*$}}
 // CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zcmop {{.*$}}
@@ -660,6 +660,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
 // CHECK-ZA64RS-EXT: __riscv_za64rs 100{{$}}
 
+// RUN: %clang --target=riscv32 \
+// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// RUN: %clang --target=riscv64 \
+// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izawrs -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -1485,14 +1493,6 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
 // CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}}
 
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
-
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN:   -march=rv32i_zalasr0p1 -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index ed443596897aea..26bcf7fbf5490c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -117,6 +117,7 @@ on support follow.
  ``V`` Supported
  ``Za128rs``   Supported (`See note 
<#riscv-profiles-extensions-note>`__)
  ``Za64rs``Supported (`See note 
<#riscv-profiles-extensions-note>`__)
+ ``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
  ``Zawrs`` Assembly Support
  ``Zba``   Supported
  ``Zbb``   Supported
@@ -236,6 +237,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, 
``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, 
``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, 
``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification 
`__.  They do not 
introduce any new features themselves, but instead describe existing hardware 
features.
 
+  .. _riscv-zacas-note:
+
+``Zacas``
+  amocas.w will be used for i32 cmpxchg on RV32. amocas.d will be used i64 
cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on 
RV64 due to ABI compatibilty. These can only be used in the assembler.
+
 Experimental Extensions
 ===
 
@@ -252,9

[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Fangrui Song via cfe-commits 

https://github.com/MaskRay approved this pull request.


https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Fangrui Song via cfe-commits 


@@ -103,6 +103,7 @@ Changes to the RISC-V Backend
 * Codegen support was added for the Zimop (May-Be-Operations) extension.
 * The experimental Ssnpm, Smnpm, Smmpm, Sspm, and Supm 0.8.1 Pointer Masking 
extensions are supported.
 * The experimental Ssqosid extension is supported.
+* Zacas is is no longer experimental.

MaskRay wrote:

typo: `is`

https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Craig Topper via cfe-commits 

https://github.com/topperc updated 
https://github.com/llvm/llvm-project/pull/83195

>From 8ed68475b43008d9c7baff7f275026cc7ada5993 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Tue, 27 Feb 2024 14:01:52 -0800
Subject: [PATCH 1/3] [RISCV] Remove experimental from Zacas.

Document that we don't use the double compare and swap instructions due
to ABI concerns.
---
 .../test/Preprocessor/riscv-target-features.c  | 18 +-
 llvm/docs/RISCVUsage.rst   |  9 ++---
 llvm/docs/ReleaseNotes.rst |  1 +
 llvm/lib/Support/RISCVISAInfo.cpp  |  2 +-
 llvm/lib/Target/RISCV/RISCVFeatures.td |  2 +-
 .../RISCV/atomic-cmpxchg-branch-on-result.ll   |  6 +++---
 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-rmw.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-signext.ll  |  4 ++--
 llvm/test/CodeGen/RISCV/attributes.ll  |  4 ++--
 llvm/test/MC/RISCV/rv32zacas-invalid.s |  2 +-
 llvm/test/MC/RISCV/rv32zacas-valid.s   | 12 ++--
 llvm/test/MC/RISCV/rv64zacas-valid.s   |  6 +++---
 llvm/test/MC/RISCV/rvzabha-zacas-valid.s   | 12 ++--
 llvm/unittests/Support/RISCVISAInfoTest.cpp|  2 +-
 15 files changed, 54 insertions(+), 50 deletions(-)

diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index ea81c662044306..df13e0beb16326 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -75,6 +75,7 @@
 // CHECK-NOT: __riscv_za128rs {{.*$}}
 // CHECK-NOT: __riscv_za64rs {{.*$}}
 // CHECK-NOT: __riscv_zawrs {{.*$}}
+// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zba {{.*$}}
 // CHECK-NOT: __riscv_zbb {{.*$}}
 // CHECK-NOT: __riscv_zbc {{.*$}}
@@ -166,7 +167,6 @@
 // CHECK-NOT: __riscv_ssqosid{{.*$}}
 // CHECK-NOT: __riscv_supm{{.*$}}
 // CHECK-NOT: __riscv_zaamo {{.*$}}
-// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zalasr {{.*$}}
 // CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zcmop {{.*$}}
@@ -660,6 +660,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
 // CHECK-ZA64RS-EXT: __riscv_za64rs 100{{$}}
 
+// RUN: %clang --target=riscv32 \
+// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// RUN: %clang --target=riscv64 \
+// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izawrs -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -1485,14 +1493,6 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
 // CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}}
 
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
-
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN:   -march=rv32i_zalasr0p1 -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index ed443596897aea..26bcf7fbf5490c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -117,6 +117,7 @@ on support follow.
  ``V`` Supported
  ``Za128rs``   Supported (`See note 
<#riscv-profiles-extensions-note>`__)
  ``Za64rs``Supported (`See note 
<#riscv-profiles-extensions-note>`__)
+ ``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
  ``Zawrs`` Assembly Support
  ``Zba``   Supported
  ``Zbb``   Supported
@@ -236,6 +237,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, 
``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, 
``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, 
``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification 
`__.  They do not 
introduce any new features themselves, but instead describe existing hardware 
features.
 
+  .. _riscv-zacas-note:
+
+``Zacas``
+  amocas.w will be used for i32 cmpxchg on RV32. amocas.d will be used i64 
cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on 
RV64 due to ABI compatibilty. These can only be used in the assembler.
+
 Experimental Extensions
 ===
 
@@ -252,9

[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Craig Topper via cfe-commits 

https://github.com/topperc updated 
https://github.com/llvm/llvm-project/pull/83195

>From 8ed68475b43008d9c7baff7f275026cc7ada5993 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Tue, 27 Feb 2024 14:01:52 -0800
Subject: [PATCH 1/2] [RISCV] Remove experimental from Zacas.

Document that we don't use the double compare and swap instructions due
to ABI concerns.
---
 .../test/Preprocessor/riscv-target-features.c  | 18 +-
 llvm/docs/RISCVUsage.rst   |  9 ++---
 llvm/docs/ReleaseNotes.rst |  1 +
 llvm/lib/Support/RISCVISAInfo.cpp  |  2 +-
 llvm/lib/Target/RISCV/RISCVFeatures.td |  2 +-
 .../RISCV/atomic-cmpxchg-branch-on-result.ll   |  6 +++---
 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-rmw.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-signext.ll  |  4 ++--
 llvm/test/CodeGen/RISCV/attributes.ll  |  4 ++--
 llvm/test/MC/RISCV/rv32zacas-invalid.s |  2 +-
 llvm/test/MC/RISCV/rv32zacas-valid.s   | 12 ++--
 llvm/test/MC/RISCV/rv64zacas-valid.s   |  6 +++---
 llvm/test/MC/RISCV/rvzabha-zacas-valid.s   | 12 ++--
 llvm/unittests/Support/RISCVISAInfoTest.cpp|  2 +-
 15 files changed, 54 insertions(+), 50 deletions(-)

diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index ea81c662044306..df13e0beb16326 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -75,6 +75,7 @@
 // CHECK-NOT: __riscv_za128rs {{.*$}}
 // CHECK-NOT: __riscv_za64rs {{.*$}}
 // CHECK-NOT: __riscv_zawrs {{.*$}}
+// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zba {{.*$}}
 // CHECK-NOT: __riscv_zbb {{.*$}}
 // CHECK-NOT: __riscv_zbc {{.*$}}
@@ -166,7 +167,6 @@
 // CHECK-NOT: __riscv_ssqosid{{.*$}}
 // CHECK-NOT: __riscv_supm{{.*$}}
 // CHECK-NOT: __riscv_zaamo {{.*$}}
-// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zalasr {{.*$}}
 // CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zcmop {{.*$}}
@@ -660,6 +660,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
 // CHECK-ZA64RS-EXT: __riscv_za64rs 100{{$}}
 
+// RUN: %clang --target=riscv32 \
+// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// RUN: %clang --target=riscv64 \
+// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izawrs -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -1485,14 +1493,6 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
 // CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}}
 
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
-
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN:   -march=rv32i_zalasr0p1 -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index ed443596897aea..26bcf7fbf5490c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -117,6 +117,7 @@ on support follow.
  ``V`` Supported
  ``Za128rs``   Supported (`See note 
<#riscv-profiles-extensions-note>`__)
  ``Za64rs``Supported (`See note 
<#riscv-profiles-extensions-note>`__)
+ ``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
  ``Zawrs`` Assembly Support
  ``Zba``   Supported
  ``Zbb``   Supported
@@ -236,6 +237,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, 
``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, 
``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, 
``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification 
`__.  They do not 
introduce any new features themselves, but instead describe existing hardware 
features.
 
+  .. _riscv-zacas-note:
+
+``Zacas``
+  amocas.w will be used for i32 cmpxchg on RV32. amocas.d will be used i64 
cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on 
RV64 due to ABI compatibilty. These can only be used in the assembler.
+
 Experimental Extensions
 ===
 
@@ -252,9

[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-28 Thread Yingwei Zheng via cfe-commits 

https://github.com/dtcxzyw approved this pull request.

LGTM.

https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-27 Thread Craig Topper via cfe-commits 

topperc wrote:

> LGTM.
> 
> Will it be in LLVM 18? Or we need more time to examine its robustness?

The bar for LLVM 18 is pretty high at this point. I doubt this qualifies.

https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-27 Thread Wang Pengcheng via cfe-commits 

https://github.com/wangpc-pp approved this pull request.

LGTM.
Will it be in LLVM 18? Or we need more time to examine its robustness?

https://github.com/llvm/llvm-project/pull/83195
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[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-27 Thread via cfe-commits 

llvmbot wrote:




@llvm/pr-subscribers-llvm-support

Author: Craig Topper (topperc)


Changes

Document that we don't use the double compare and swap instructions due to ABI 
concerns.

---

Patch is 21.20 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/83195.diff


15 Files Affected:

- (modified) clang/test/Preprocessor/riscv-target-features.c (+9-9) 
- (modified) llvm/docs/RISCVUsage.rst (+6-3) 
- (modified) llvm/docs/ReleaseNotes.rst (+1) 
- (modified) llvm/lib/Support/RISCVISAInfo.cpp (+1-1) 
- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+1-1) 
- (modified) llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll (+3-3) 
- (modified) llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll (+6-6) 
- (modified) llvm/test/CodeGen/RISCV/atomic-rmw.ll (+6-6) 
- (modified) llvm/test/CodeGen/RISCV/atomic-signext.ll (+2-2) 
- (modified) llvm/test/CodeGen/RISCV/attributes.ll (+2-2) 
- (modified) llvm/test/MC/RISCV/rv32zacas-invalid.s (+1-1) 
- (modified) llvm/test/MC/RISCV/rv32zacas-valid.s (+6-6) 
- (modified) llvm/test/MC/RISCV/rv64zacas-valid.s (+3-3) 
- (modified) llvm/test/MC/RISCV/rvzabha-zacas-valid.s (+6-6) 
- (modified) llvm/unittests/Support/RISCVISAInfoTest.cpp (+1-1) 


``diff
diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index ea81c662044306..df13e0beb16326 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -75,6 +75,7 @@
 // CHECK-NOT: __riscv_za128rs {{.*$}}
 // CHECK-NOT: __riscv_za64rs {{.*$}}
 // CHECK-NOT: __riscv_zawrs {{.*$}}
+// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zba {{.*$}}
 // CHECK-NOT: __riscv_zbb {{.*$}}
 // CHECK-NOT: __riscv_zbc {{.*$}}
@@ -166,7 +167,6 @@
 // CHECK-NOT: __riscv_ssqosid{{.*$}}
 // CHECK-NOT: __riscv_supm{{.*$}}
 // CHECK-NOT: __riscv_zaamo {{.*$}}
-// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zalasr {{.*$}}
 // CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zcmop {{.*$}}
@@ -660,6 +660,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
 // CHECK-ZA64RS-EXT: __riscv_za64rs 100{{$}}
 
+// RUN: %clang --target=riscv32 \
+// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// RUN: %clang --target=riscv64 \
+// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izawrs -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -1485,14 +1493,6 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
 // CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}}
 
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
-
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN:   -march=rv32i_zalasr0p1 -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index ed443596897aea..26bcf7fbf5490c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -117,6 +117,7 @@ on support follow.
  ``V`` Supported
  ``Za128rs``   Supported (`See note 
<#riscv-profiles-extensions-note>`__)
  ``Za64rs``Supported (`See note 
<#riscv-profiles-extensions-note>`__)
+ ``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
  ``Zawrs`` Assembly Support
  ``Zba``   Supported
  ``Zbb``   Supported
@@ -236,6 +237,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, 
``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, 
``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, 
``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification 
`__.  They do not 
introduce any new features themselves, but instead describe existing hardware 
features.
 
+  .. _riscv-zacas-note:
+
+``Zacas``
+  amocas.w will be used for i32 cmpxchg on RV32. amocas.d will be used i64 
cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on 
RV64 due to ABI compatibilty. These can only be used in the assembler.
+
 Experimental Extensions
 ===
 
@@ -252,9 +258,6 @@ The primary goal of experimental support is to assist in 
the process of

[clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)

2024-02-27 Thread Craig Topper via cfe-commits 

https://github.com/topperc created 
https://github.com/llvm/llvm-project/pull/83195

Document that we don't use the double compare and swap instructions due to ABI 
concerns.

>From 8ed68475b43008d9c7baff7f275026cc7ada5993 Mon Sep 17 00:00:00 2001
From: Craig Topper 
Date: Tue, 27 Feb 2024 14:01:52 -0800
Subject: [PATCH] [RISCV] Remove experimental from Zacas.

Document that we don't use the double compare and swap instructions due
to ABI concerns.
---
 .../test/Preprocessor/riscv-target-features.c  | 18 +-
 llvm/docs/RISCVUsage.rst   |  9 ++---
 llvm/docs/ReleaseNotes.rst |  1 +
 llvm/lib/Support/RISCVISAInfo.cpp  |  2 +-
 llvm/lib/Target/RISCV/RISCVFeatures.td |  2 +-
 .../RISCV/atomic-cmpxchg-branch-on-result.ll   |  6 +++---
 llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-rmw.ll  | 12 ++--
 llvm/test/CodeGen/RISCV/atomic-signext.ll  |  4 ++--
 llvm/test/CodeGen/RISCV/attributes.ll  |  4 ++--
 llvm/test/MC/RISCV/rv32zacas-invalid.s |  2 +-
 llvm/test/MC/RISCV/rv32zacas-valid.s   | 12 ++--
 llvm/test/MC/RISCV/rv64zacas-valid.s   |  6 +++---
 llvm/test/MC/RISCV/rvzabha-zacas-valid.s   | 12 ++--
 llvm/unittests/Support/RISCVISAInfoTest.cpp|  2 +-
 15 files changed, 54 insertions(+), 50 deletions(-)

diff --git a/clang/test/Preprocessor/riscv-target-features.c 
b/clang/test/Preprocessor/riscv-target-features.c
index ea81c662044306..df13e0beb16326 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -75,6 +75,7 @@
 // CHECK-NOT: __riscv_za128rs {{.*$}}
 // CHECK-NOT: __riscv_za64rs {{.*$}}
 // CHECK-NOT: __riscv_zawrs {{.*$}}
+// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zba {{.*$}}
 // CHECK-NOT: __riscv_zbb {{.*$}}
 // CHECK-NOT: __riscv_zbc {{.*$}}
@@ -166,7 +167,6 @@
 // CHECK-NOT: __riscv_ssqosid{{.*$}}
 // CHECK-NOT: __riscv_supm{{.*$}}
 // CHECK-NOT: __riscv_zaamo {{.*$}}
-// CHECK-NOT: __riscv_zacas {{.*$}}
 // CHECK-NOT: __riscv_zalasr {{.*$}}
 // CHECK-NOT: __riscv_zalrsc {{.*$}}
 // CHECK-NOT: __riscv_zcmop {{.*$}}
@@ -660,6 +660,14 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZA64RS-EXT %s
 // CHECK-ZA64RS-EXT: __riscv_za64rs 100{{$}}
 
+// RUN: %clang --target=riscv32 \
+// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// RUN: %clang --target=riscv64 \
+// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
+// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
+// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
+
 // RUN: %clang --target=riscv32-unknown-linux-gnu \
 // RUN:   -march=rv32izawrs -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAWRS-EXT %s
@@ -1485,14 +1493,6 @@
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZAAMO-EXT %s
 // CHECK-ZAAMO-EXT: __riscv_zaamo 2000{{$}}
 
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN:   -march=rv32i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN:   -march=rv64i_zacas1p0 -E -dM %s \
-// RUN:   -o - | FileCheck --check-prefix=CHECK-ZACAS-EXT %s
-// CHECK-ZACAS-EXT: __riscv_zacas 100{{$}}
-
 // RUN: %clang --target=riscv32 -menable-experimental-extensions \
 // RUN:   -march=rv32i_zalasr0p1 -E -dM %s \
 // RUN:   -o - | FileCheck --check-prefix=CHECK-ZALASR-EXT %s
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index ed443596897aea..26bcf7fbf5490c 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -117,6 +117,7 @@ on support follow.
  ``V`` Supported
  ``Za128rs``   Supported (`See note 
<#riscv-profiles-extensions-note>`__)
  ``Za64rs``Supported (`See note 
<#riscv-profiles-extensions-note>`__)
+ ``Zacas`` Supported (`See note <#riscv-zacas-note>`__)
  ``Zawrs`` Assembly Support
  ``Zba``   Supported
  ``Zbb``   Supported
@@ -236,6 +237,11 @@ Supported
 ``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, 
``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, 
``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, 
``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare``
   These extensions are defined as part of the `RISC-V Profiles specification 
`__.  They do not 
introduce any new features themselves, but instead describe existing hardware 
features.
 
+  .. _riscv-zacas-note:
+
+``Zacas``
+  amocas.w will be used for i32 cmpxchg on RV32. amocas.d will be used i64 
cmpxchg on RV64. The compiler will not generate amocas.d on RV32 or amocas.q on 
RV64 due to ABI compatibilty. These can only be