[llvm] [clang] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp" (PR #76338)

2024-02-06 Thread Yingwei Zheng via cfe-commits 

dtcxzyw wrote:

> @dtcxzyw are you planning on a codegen patch to improve the backend handling?

I will post a patch this week.


https://github.com/llvm/llvm-project/pull/76338
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[llvm] [clang] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp" (PR #76338)

2024-02-06 Thread Matt Arsenault via cfe-commits 

arsenm wrote:

@dtcxzyw are you planning on a codegen patch to improve the backend handling? 

https://github.com/llvm/llvm-project/pull/76338
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[llvm] [clang] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp" (PR #76338)

2023-12-26 Thread Matt Arsenault via cfe-commits 

arsenm wrote:

I still think fabs+fcmp is a better canonical form. Between some targets 
offering free fabs, and other combines between fabs and sources/sinks, I think 
it's better to split out this way. Any codegen regression should be addressed 
in the backend.

https://github.com/llvm/llvm-project/pull/76338
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[llvm] [clang] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp" (PR #76338)

2023-12-24 Thread Yingwei Zheng via cfe-commits 

https://github.com/dtcxzyw updated 
https://github.com/llvm/llvm-project/pull/76338

>From a646e872e72bab7b143db7496adfeb633b882dc4 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng 
Date: Mon, 25 Dec 2023 01:39:27 +0800
Subject: [PATCH] Revert "InstCombine: Fold is.fpclass(x, fcInf) to fabs+fcmp"

This reverts commit 2b582440c16c72b6b021ea5c212ceda3bdfb2b9b.
---
 clang/test/CodeGen/isfpclass.c| 23 -
 clang/test/Headers/__clang_hip_math.hip   | 40 ++-
 .../InstCombine/InstCombineCalls.cpp  | 18 ---
 llvm/test/Transforms/InstCombine/and-fcmp.ll  |  9 ++--
 .../combine-is.fpclass-and-fcmp.ll| 26 --
 .../create-class-from-logic-fcmp.ll   | 30 ---
 .../test/Transforms/InstCombine/is_fpclass.ll | 51 ---
 7 files changed, 72 insertions(+), 125 deletions(-)

diff --git a/clang/test/CodeGen/isfpclass.c b/clang/test/CodeGen/isfpclass.c
index 34873c08e04f87..08c2633266dbd5 100644
--- a/clang/test/CodeGen/isfpclass.c
+++ b/clang/test/CodeGen/isfpclass.c
@@ -4,9 +4,8 @@
 // CHECK-LABEL: define dso_local i1 @check_isfpclass_finite
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call float @llvm.fabs.f32(float [[X]])
-// CHECK-NEXT:[[TMP1:%.*]] = fcmp one float [[TMP0]], 0x7FF0
-// CHECK-NEXT:ret i1 [[TMP1]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 504)
+// CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isfpclass_finite(float x) {
   return __builtin_isfpclass(x, 504 /*Finite*/);
@@ -15,7 +14,7 @@ _Bool check_isfpclass_finite(float x) {
 // CHECK-LABEL: define dso_local i1 @check_isfpclass_finite_strict
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 504) #[[ATTR6:[0-9]+]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 504) #[[ATTR5:[0-9]+]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isfpclass_finite_strict(float x) {
@@ -36,7 +35,7 @@ _Bool check_isfpclass_nan_f32(float x) {
 // CHECK-LABEL: define dso_local i1 @check_isfpclass_nan_f32_strict
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 3) #[[ATTR6]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 3) #[[ATTR5]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isfpclass_nan_f32_strict(float x) {
@@ -57,7 +56,7 @@ _Bool check_isfpclass_snan_f64(double x) {
 // CHECK-LABEL: define dso_local i1 @check_isfpclass_snan_f64_strict
 // CHECK-SAME: (double noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double 
[[X]], i32 1) #[[ATTR6]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f64(double 
[[X]], i32 1) #[[ATTR5]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isfpclass_snan_f64_strict(double x) {
@@ -78,7 +77,7 @@ _Bool check_isfpclass_zero_f16(_Float16 x) {
 // CHECK-LABEL: define dso_local i1 @check_isfpclass_zero_f16_strict
 // CHECK-SAME: (half noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f16(half [[X]], 
i32 96) #[[ATTR6]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f16(half [[X]], 
i32 96) #[[ATTR5]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isfpclass_zero_f16_strict(_Float16 x) {
@@ -89,7 +88,7 @@ _Bool check_isfpclass_zero_f16_strict(_Float16 x) {
 // CHECK-LABEL: define dso_local i1 @check_isnan
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 3) #[[ATTR6]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 3) #[[ATTR5]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isnan(float x) {
@@ -100,7 +99,7 @@ _Bool check_isnan(float x) {
 // CHECK-LABEL: define dso_local i1 @check_isinf
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 516) #[[ATTR6]]
+// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 516) #[[ATTR5]]
 // CHECK-NEXT:ret i1 [[TMP0]]
 //
 _Bool check_isinf(float x) {
@@ -111,7 +110,7 @@ _Bool check_isinf(float x) {
 // CHECK-LABEL: define dso_local i1 @check_isfinite
 // CHECK-SAME: (float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR2]] {
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:[[TMP0:%.*]] = tail call i1 @llvm.is.fpclass.f32(float 
[[X]], i32 504) #[[ATTR