Author: psmith Date: Thu May 17 06:17:33 2018 New Revision: 332606 URL: http://llvm.org/viewvc/llvm-project?rev=332606&view=rev Log: [AArch64] Correct inline assembly test case for S modifier [NFC]
The existing test for the AArch64 inline assembly constraint S uses the A and L modifiers. These modifiers were implemented in the original AArch64 backend but were not carried forward to the merged backend. The A is associated with ADRP and does nothing, the L is associated with :lo12: . Given that A and L are not supported by GCC and not supported by the new implementation of constraint S in LLVM (see D46745) I've altered the test to put :lo12: directly in the string so that A and L are not needed. Differential Revision: https://reviews.llvm.org/D46932 Modified: cfe/trunk/test/CodeGen/aarch64-inline-asm.c Modified: cfe/trunk/test/CodeGen/aarch64-inline-asm.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-inline-asm.c?rev=332606&r1=332605&r2=332606&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/aarch64-inline-asm.c (original) +++ cfe/trunk/test/CodeGen/aarch64-inline-asm.c Thu May 17 06:17:33 2018 @@ -44,9 +44,9 @@ void test_constraints_immed(void) { void test_constraint_S(void) { int *addr; - asm("adrp %0, %A1\n\t" - "add %0, %0, %L1" : "=r"(addr) : "S"(&var)); -// CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* @var) + asm("adrp %0, %1\n\t" + "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var)); +// CHECK: call i32* asm "adrp $0, $1\0A\09add $0, $0, :lo12:$1", "=r,S"(i64* @var) } void test_constraint_Q(void) { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits