r336388 - [X86] Use shufflevector instead of a select with a constant mask for fmaddsub/fmsubadd IR emission.

[Craig Topper via cfe-commits]

Author: ctopper
Date: Thu Jul  5 13:38:31 2018
New Revision: 336388

URL: http://llvm.org/viewvc/llvm-project?rev=336388&view=rev
Log:
[X86] Use shufflevector instead of a select with a constant mask for 
fmaddsub/fmsubadd IR emission.

Shufflevector is easier to generate and matches what the backend pattern 
matches without relying on constant selects being turned into shuffles.

While I was there I also made the IR regular expressions a little stricter to 
ensure operand order on the shuffle.

Modified:
    cfe/trunk/lib/CodeGen/CGBuiltin.cpp
    cfe/trunk/test/CodeGen/avx512f-builtins.c
    cfe/trunk/test/CodeGen/avx512vl-builtins.c
    cfe/trunk/test/CodeGen/fma-builtins.c
    cfe/trunk/test/CodeGen/fma4-builtins.c

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=336388&r1=336387&r2=336388&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Thu Jul  5 13:38:31 2018
@@ -8660,17 +8660,13 @@ static Value *EmitX86FMAExpr(CodeGenFunc
     if (IsAddSub) {
       // Negate even elts in C using a mask.
       unsigned NumElts = Ty->getVectorNumElements();
-      SmallVector<Constant *, 16> NMask;
-      Constant *Zero = ConstantInt::get(CGF.Builder.getInt1Ty(), 0);
-      Constant *One = ConstantInt::get(CGF.Builder.getInt1Ty(), 1);
-      for (unsigned i = 0; i < NumElts; ++i) {
-        NMask.push_back(i % 2 == 0 ? One : Zero);
-      }
-      Value *NegMask = ConstantVector::get(NMask);
+      SmallVector<uint32_t, 16> Indices(NumElts);
+      for (unsigned i = 0; i != NumElts; ++i)
+        Indices[i] = i + (i % 2) * NumElts;
 
       Value *NegC = CGF.Builder.CreateFNeg(C);
       Value *FMSub = CGF.Builder.CreateCall(FMA, {A, B, NegC} );
-      Res = CGF.Builder.CreateSelect(NegMask, FMSub, Res);
+      Res = CGF.Builder.CreateShuffleVector(FMSub, Res, Indices);
     }
   }
 

Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=336388&r1=336387&r2=336388&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512f-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512f-builtins.c Thu Jul  5 13:38:31 2018
@@ -846,66 +846,66 @@ __m512d test_mm512_maskz_fmsubadd_round_
 }
 __m512d test_mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) {
   // CHECK-LABEL: @test_mm512_fmaddsub_pd
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm512_fmaddsub_pd(__A, __B, __C);
 }
 __m512d test_mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, 
__m512d __C) {
   // CHECK-LABEL: @test_mm512_mask_fmaddsub_pd
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
   return _mm512_mask_fmaddsub_pd(__A, __U, __B, __C);
 }
 __m512d test_mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm512_mask3_fmaddsub_pd
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
   return _mm512_mask3_fmaddsub_pd(__A, __B, __C, __U);
 }
 __m512d test_mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, 
__m512d __C) {
   // CHECK-LABEL: @test_mm512_maskz_fmaddsub_pd
-  // check: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // check: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // check: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // check: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: shufflevector <8 x double> [[SUB]], <8 x double> [[ADD]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> 
zeroinitializer
   return _mm512_maskz_fmaddsub_pd(__U, __A, __B, __C);
 }
 __m512d test_mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) {
   // CHECK-LABEL: @test_mm512_fmsubadd_pd
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm512_fmsubadd_pd(__A, __B, __C);
 }
 __m512d test_mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, 
__m512d __C) {
   // CHECK-LABEL: @test_mm512_mask_fmsubadd_pd
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
   return _mm512_mask_fmsubadd_pd(__A, __U, __B, __C);
 }
 __m512d test_mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, 
__m512d __C) {
   // CHECK-LABEL: @test_mm512_maskz_fmsubadd_pd
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> 
zeroinitializer
   return _mm512_maskz_fmsubadd_pd(__U, __A, __B, __C);
@@ -960,66 +960,66 @@ __m512 test_mm512_maskz_fmsubadd_round_p
 }
 __m512 test_mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) {
   // CHECK-LABEL: @test_mm512_fmaddsub_ps
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   return _mm512_fmaddsub_ps(__A, __B, __C);
 }
 __m512 test_mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, 
__m512 __C) {
   // CHECK-LABEL: @test_mm512_mask_fmaddsub_ps
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
%{{.*}}
   return _mm512_mask_fmaddsub_ps(__A, __U, __B, __C);
 }
 __m512 test_mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, 
__mmask16 __U) {
   // CHECK-LABEL: @test_mm512_mask3_fmaddsub_ps
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
%{{.*}}
   return _mm512_mask3_fmaddsub_ps(__A, __B, __C, __U);
 }
 __m512 test_mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, 
__m512 __C) {
   // CHECK-LABEL: @test_mm512_maskz_fmaddsub_ps
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: shufflevector <16 x float> [[SUB]], <16 x float> [[ADD]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
zeroinitializer
   return _mm512_maskz_fmaddsub_ps(__U, __A, __B, __C);
 }
 __m512 test_mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) {
   // CHECK-LABEL: @test_mm512_fmsubadd_ps
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   return _mm512_fmsubadd_ps(__A, __B, __C);
 }
 __m512 test_mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, 
__m512 __C) {
   // CHECK-LABEL: @test_mm512_mask_fmsubadd_ps
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
%{{.*}}
   return _mm512_mask_fmsubadd_ps(__A, __U, __B, __C);
 }
 __m512 test_mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, 
__m512 __C) {
   // CHECK-LABEL: @test_mm512_maskz_fmsubadd_ps
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
zeroinitializer
   return _mm512_maskz_fmsubadd_ps(__U, __A, __B, __C);
@@ -1066,10 +1066,10 @@ __m512d test_mm512_mask3_fmsubadd_round_
 }
 __m512d test_mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm512_mask3_fmsubadd_pd
-  // CHECK: fsub <8 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: call <8 x double> @llvm.fma.v8f64(<8 x double> %{{.*}}, <8 x 
double> %{{.*}}, <8 x double> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x double> %{{.*}}, <8 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00, double 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x double> @llvm.fma.v8f64(<8 x double> 
%{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}})
+  // CHECK: shufflevector <8 x double> [[ADD]], <8 x double> [[SUB]], <8 x 
i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x double> %{{.*}}, <8 x double> %{{.*}}
   return _mm512_mask3_fmsubadd_pd(__A, __B, __C, __U);
@@ -1084,10 +1084,10 @@ __m512 test_mm512_mask3_fmsubadd_round_p
 }
 __m512 test_mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, 
__mmask16 __U) {
   // CHECK-LABEL: @test_mm512_mask3_fmsubadd_ps
-  // CHECK: fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: call <16 x float> @llvm.fma.v16f32(<16 x float> %{{.*}}, <16 x 
float> %{{.*}}, <16 x float> %{{.*}})
-  // CHECK: select <16 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, 
i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <16 x float> %{{.*}}, <16 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <16 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <16 x float> @llvm.fma.v16f32(<16 x float> 
%{{.*}}, <16 x float> %{{.*}}, <16 x float> %{{.*}})
+  // CHECK: shufflevector <16 x float> [[ADD]], <16 x float> [[SUB]], <16 x 
i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23, i32 8, i32 
25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   // CHECK: bitcast i16 %{{.*}} to <16 x i1>
   // CHECK: select <16 x i1> %{{.*}}, <16 x float> %{{.*}}, <16 x float> 
%{{.*}}
   return _mm512_mask3_fmsubadd_ps(__A, __B, __C, __U);

Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=336388&r1=336387&r2=336388&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original)
+++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Thu Jul  5 13:38:31 2018
@@ -3041,10 +3041,10 @@ __m256 test_mm256_maskz_fnmsub_ps(__mmas
 
 __m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, 
__m128d __C) {
   // CHECK-LABEL: @test_mm_mask_fmaddsub_pd
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3053,10 +3053,10 @@ __m128d test_mm_mask_fmaddsub_pd(__m128d
 
 __m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, 
__m128d __C) {
   // CHECK-LABEL: @test_mm_mask_fmsubadd_pd
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3065,10 +3065,10 @@ __m128d test_mm_mask_fmsubadd_pd(__m128d
 
 __m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm_mask3_fmaddsub_pd
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3077,10 +3077,10 @@ __m128d test_mm_mask3_fmaddsub_pd(__m128
 
 __m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, 
__m128d __C) {
   // CHECK-LABEL: @test_mm_maskz_fmaddsub_pd
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3089,10 +3089,10 @@ __m128d test_mm_maskz_fmaddsub_pd(__mmas
 
 __m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, 
__m128d __C) {
   // CHECK-LABEL: @test_mm_maskz_fmsubadd_pd
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3101,10 +3101,10 @@ __m128d test_mm_maskz_fmsubadd_pd(__mmas
 
 __m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, 
__m256d __C) {
   // CHECK-LABEL: @test_mm256_mask_fmaddsub_pd
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3113,10 +3113,10 @@ __m256d test_mm256_mask_fmaddsub_pd(__m2
 
 __m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, 
__m256d __C) {
   // CHECK-LABEL: @test_mm256_mask_fmsubadd_pd
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3125,10 +3125,10 @@ __m256d test_mm256_mask_fmsubadd_pd(__m2
 
 __m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm256_mask3_fmaddsub_pd
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3137,10 +3137,10 @@ __m256d test_mm256_mask3_fmaddsub_pd(__m
 
 __m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, 
__m256d __C) {
   // CHECK-LABEL: @test_mm256_maskz_fmaddsub_pd
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3149,10 +3149,10 @@ __m256d test_mm256_maskz_fmaddsub_pd(__m
 
 __m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, 
__m256d __C) {
   // CHECK-LABEL: @test_mm256_maskz_fmsubadd_pd
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3161,10 +3161,10 @@ __m256d test_mm256_maskz_fmsubadd_pd(__m
 
 __m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 
__C) {
   // CHECK-LABEL: @test_mm_mask_fmaddsub_ps
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3173,10 +3173,10 @@ __m128 test_mm_mask_fmaddsub_ps(__m128 _
 
 __m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 
__C) {
   // CHECK-LABEL: @test_mm_mask_fmsubadd_ps
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3185,10 +3185,10 @@ __m128 test_mm_mask_fmsubadd_ps(__m128 _
 
 __m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 
__U) {
   // CHECK-LABEL: @test_mm_mask3_fmaddsub_ps
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3197,10 +3197,10 @@ __m128 test_mm_mask3_fmaddsub_ps(__m128
 
 __m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 
__C) {
   // CHECK-LABEL: @test_mm_maskz_fmaddsub_ps
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3209,10 +3209,10 @@ __m128 test_mm_maskz_fmaddsub_ps(__mmask
 
 __m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 
__C) {
   // CHECK-LABEL: @test_mm_maskz_fmsubadd_ps
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3221,10 +3221,10 @@ __m128 test_mm_maskz_fmsubadd_ps(__mmask
 
 __m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, 
__m256 __C) {
   // CHECK-LABEL: @test_mm256_mask_fmaddsub_ps
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_mask_fmaddsub_ps(__A, __U, __B, __C);
@@ -3232,10 +3232,10 @@ __m256 test_mm256_mask_fmaddsub_ps(__m25
 
 __m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, 
__m256 __C) {
   // CHECK-LABEL: @test_mm256_mask_fmsubadd_ps
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_mask_fmsubadd_ps(__A, __U, __B, __C);
@@ -3243,10 +3243,10 @@ __m256 test_mm256_mask_fmsubadd_ps(__m25
 
 __m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm256_mask3_fmaddsub_ps
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_mask3_fmaddsub_ps(__A, __B, __C, __U);
@@ -3254,10 +3254,10 @@ __m256 test_mm256_mask3_fmaddsub_ps(__m2
 
 __m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, 
__m256 __C) {
   // CHECK-LABEL: @test_mm256_maskz_fmaddsub_ps
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_maskz_fmaddsub_ps(__U, __A, __B, __C);
@@ -3265,10 +3265,10 @@ __m256 test_mm256_maskz_fmaddsub_ps(__mm
 
 __m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, 
__m256 __C) {
   // CHECK-LABEL: @test_mm256_maskz_fmsubadd_ps
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_maskz_fmsubadd_ps(__U, __A, __B, __C);
@@ -3315,10 +3315,10 @@ __m256 test_mm256_mask3_fmsub_ps(__m256
 
 __m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm_mask3_fmsubadd_pd
-  // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, 
%{{.*}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x 
i32> <i32 0, i32 3>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 
0, i32 1>
   // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}
@@ -3327,10 +3327,10 @@ __m128d test_mm_mask3_fmsubadd_pd(__m128
 
 __m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm256_mask3_fmsubadd_pd
-  // CHECK: fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, 
double -0.000000e+00, double -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}
@@ -3339,10 +3339,10 @@ __m256d test_mm256_mask3_fmsubadd_pd(__m
 
 __m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 
__U) {
   // CHECK-LABEL: @test_mm_mask3_fmsubadd_ps
-  // CHECK: fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 
0, i32 1, i32 2, i32 3>
   // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}
@@ -3351,10 +3351,10 @@ __m128 test_mm_mask3_fmsubadd_ps(__m128
 
 __m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, 
__mmask8 __U) {
   // CHECK-LABEL: @test_mm256_mask3_fmsubadd_ps
-  // CHECK: fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   // CHECK: bitcast i8 %{{.*}} to <8 x i1>
   // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}
   return _mm256_mask3_fmsubadd_ps(__A, __B, __C, __U);

Modified: cfe/trunk/test/CodeGen/fma-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/fma-builtins.c?rev=336388&r1=336387&r2=336388&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/fma-builtins.c (original)
+++ cfe/trunk/test/CodeGen/fma-builtins.c Thu Jul  5 13:38:31 2018
@@ -149,37 +149,37 @@ __m128d test_mm_fnmsub_sd(__m128d a, __m
 
 __m128 test_mm_fmaddsub_ps(__m128 a, __m128 b, __m128 c) {
   // CHECK-LABEL: test_mm_fmaddsub_ps
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   return _mm_fmaddsub_ps(a, b, c);
 }
 
 __m128d test_mm_fmaddsub_pd(__m128d a, __m128d b, __m128d c) {
   // CHECK-LABEL: test_mm_fmaddsub_pd
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x 
i32> <i32 0, i32 3>
   return _mm_fmaddsub_pd(a, b, c);
 }
 
 __m128 test_mm_fmsubadd_ps(__m128 a, __m128 b, __m128 c) {
   // CHECK-LABEL: test_mm_fmsubadd_ps
   // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   return _mm_fmsubadd_ps(a, b, c);
 }
 
 __m128d test_mm_fmsubadd_pd(__m128d a, __m128d b, __m128d c) {
   // CHECK-LABEL: test_mm_fmsubadd_pd
   // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x 
i32> <i32 0, i32 3>
   return _mm_fmsubadd_pd(a, b, c);
 }
 
@@ -241,36 +241,36 @@ __m256d test_mm256_fnmsub_pd(__m256d a,
 
 __m256 test_mm256_fmaddsub_ps(__m256 a, __m256 b, __m256 c) {
   // CHECK-LABEL: test_mm256_fmaddsub_ps
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm256_fmaddsub_ps(a, b, c);
 }
 
 __m256d test_mm256_fmaddsub_pd(__m256d a, __m256d b, __m256d c) {
   // CHECK-LABEL: test_mm256_fmaddsub_pd
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   return _mm256_fmaddsub_pd(a, b, c);
 }
 
 __m256 test_mm256_fmsubadd_ps(__m256 a, __m256 b, __m256 c) {
   // CHECK-LABEL: test_mm256_fmsubadd_ps
   // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm256_fmsubadd_ps(a, b, c);
 }
 
 __m256d test_mm256_fmsubadd_pd(__m256d a, __m256d b, __m256d c) {
   // CHECK-LABEL: test_mm256_fmsubadd_pd
   // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   return _mm256_fmsubadd_pd(a, b, c);
 }

Modified: cfe/trunk/test/CodeGen/fma4-builtins.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/fma4-builtins.c?rev=336388&r1=336387&r2=336388&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/fma4-builtins.c (original)
+++ cfe/trunk/test/CodeGen/fma4-builtins.c Thu Jul  5 13:38:31 2018
@@ -117,37 +117,37 @@ __m128d test_mm_nmsub_sd(__m128d a, __m1
 
 __m128 test_mm_maddsub_ps(__m128 a, __m128 b, __m128 c) {
   // CHECK-LABEL: test_mm_maddsub_ps
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: shufflevector <4 x float> [[SUB]], <4 x float> [[ADD]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   return _mm_maddsub_ps(a, b, c);
 }
 
 __m128d test_mm_maddsub_pd(__m128d a, __m128d b, __m128d c) {
   // CHECK-LABEL: test_mm_maddsub_pd
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: shufflevector <2 x double> [[SUB]], <2 x double> [[ADD]], <2 x 
i32> <i32 0, i32 3>
   return _mm_maddsub_pd(a, b, c);
 }
 
 __m128 test_mm_msubadd_ps(__m128 a, __m128 b, __m128 c) {
   // CHECK-LABEL: test_mm_msubadd_ps
   // CHECK: [[NEG:%.+]] = fsub <4 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> 
%{{.*}}, <4 x float> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
float> %{{.*}}, <4 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x float> @llvm.fma.v4f32(<4 x float> 
%{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}})
+  // CHECK: shufflevector <4 x float> [[ADD]], <4 x float> [[SUB]], <4 x i32> 
<i32 0, i32 5, i32 2, i32 7>
   return _mm_msubadd_ps(a, b, c);
 }
 
 __m128d test_mm_msubadd_pd(__m128d a, __m128d b, __m128d c) {
   // CHECK-LABEL: test_mm_msubadd_pd
   // CHECK: [[NEG:%.+]] = fsub <2 x double> <double -0.000000e+00, double 
-0.000000e+00>, %{{.+}}
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x 
double> %{{.*}}, <2 x double> %{{.*}})
-  // CHECK: select <2 x i1> <i1 true, i1 false>, <2 x double> %{{.*}}, <2 x 
double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <2 x double> @llvm.fma.v2f64(<2 x double> 
%{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}})
+  // CHECK: shufflevector <2 x double> [[ADD]], <2 x double> [[SUB]], <2 x 
i32> <i32 0, i32 3>
   return _mm_msubadd_pd(a, b, c);
 }
 
@@ -209,36 +209,36 @@ __m256d test_mm256_nmsub_pd(__m256d a, _
 
 __m256 test_mm256_maddsub_ps(__m256 a, __m256 b, __m256 c) {
   // CHECK-LABEL: test_mm256_maddsub_ps
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: shufflevector <8 x float> [[SUB]], <8 x float> [[ADD]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm256_maddsub_ps(a, b, c);
 }
 
 __m256d test_mm256_maddsub_pd(__m256d a, __m256d b, __m256d c) {
   // CHECK-LABEL: test_mm256_maddsub_pd
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
   // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[SUB]], <4 x double> [[ADD]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   return _mm256_maddsub_pd(a, b, c);
 }
 
 __m256 test_mm256_msubadd_ps(__m256 a, __m256 b, __m256 c) {
   // CHECK-LABEL: test_mm256_msubadd_ps
   // CHECK: [[NEG:%.+]] = fsub <8 x float> <float -0.000000e+00, float 
-0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, 
float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %{{.*}}
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> 
%{{.*}}, <8 x float> %{{.*}})
-  // CHECK: select <8 x i1> <i1 true, i1 false, i1 true, i1 false, i1 true, i1 
false, i1 true, i1 false>, <8 x float> %{{.*}}, <8 x float> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <8 x float> @llvm.fma.v8f32(<8 x float> 
%{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}})
+  // CHECK: shufflevector <8 x float> [[ADD]], <8 x float> [[SUB]], <8 x i32> 
<i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   return _mm256_msubadd_ps(a, b, c);
 }
 
 __m256d test_mm256_msubadd_pd(__m256d a, __m256d b, __m256d c) {
   // CHECK-LABEL: test_mm256_msubadd_pd
   // CHECK: [[NEG:%.+]] = fsub <4 x double> <double -0.000000e+00, double 
-0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %{{.+}}
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x 
double> %{{.*}}, <4 x double> %{{.*}})
-  // CHECK: select <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x 
double> %{{.*}}, <4 x double> %{{.*}}
+  // CHECK: [[SUB:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]
+  // CHECK: [[ADD:%.+]] = call <4 x double> @llvm.fma.v4f64(<4 x double> 
%{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}})
+  // CHECK: shufflevector <4 x double> [[ADD]], <4 x double> [[SUB]], <4 x 
i32> <i32 0, i32 5, i32 2, i32 7>
   return _mm256_msubadd_pd(a, b, c);
 }


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