Re: [coreboot] AMD A76M chipset?
Hi all, I'm CCing Bruce, maybe he knows. According to random googled page: The A76M FCH is an upgraded A70M FCH, or better yet A76M = Bolton M3 and A70M = Hudson M3. Does anyone know if there are public docs for the A76M (possibly under another name), and how feasible it is to drive it with current public (or to-be-released) AGESA? Anyway, how it looks with AMD/AGESA story? I think bolton should be very similar to Hudson, and googling for A88X its revision number starts at 16h (the hudson had 11-14h) There is a good chance that Bolton will somewhat work with current hudson I think - even PCI IDs match. Maybe we can try first to support some FM2+ board with bolton and see how it goes. I'm all for that considering the effort I put into the FCH/Trinity AGESA it would be a shame if it is wasted just with a single board ;) Possible candidates: Looks quite new (seems released this year) ASUS A88X-PLUS (Lunched 09/11/2013) ASUS A88X-PRO (Lunched in January?) A88XM-A (Lunched 07/29/2013) Most promising: ASUS A78M-E - AMD A78 (very new, microITX, cheap, ITE sio) Very similar: ASUS A78M-A (but more dimm slots, supported SIO, launched February?) Is here someone who wants to work on this perhaps together with me? (of course donations welcome ;) I will buy some / work on that only if someone else buys it too. Thanks Rudolf -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Errors in Memtest86 with 4 or 8GB memory
I noticed the MTRR(base:2944MB, range:64MB, type WB ) has covered the TSEG hole(Adding hole at 2992MB-3008MB), I can not remember if this will cause a problem or not. Anyone knows? BTW, what is the value of B0:D0:F0:REG70h? On Tue, May 27, 2014 at 9:30 AM, Krzysztof Pierwieniecki kpierwienie...@teldat.com.pl wrote: This is my coreboot log. Chris -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] AMD A76M chipset?
Hi Rudolf! Is here someone who wants to work on this perhaps together with me? (of course donations welcome ;) I will buy some / work on that only if someone else buys it too. I've started porting coreboot to the ASROCK FM2A88M-HD+ (A88X chipset) and have nearly finished the code for the SIO chip used on that board (NCT6776). Will upload that soon, but still have to do some cleanup and verify some stuff with the datasheet. If you'd like to help me with that board, I'd donate you a FM2A88M-HD+. But until august I sadly only have time for coreboot-related stuff on the weekends. The only downside of that board is that the PCIe x1 slot is located next to the PCIe x16 slot; so if you want to use a fast graphics card the only PCIe x1 slot gets blocked mechanically. Regards Felix -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Is there a proper way to skip a specific PCI device during PCI enumeration
Gents, What I'm doing is to avoid PCI enumeration code allocating/setting/configuring resource to a specific PCI device (Bus:Device:Function), is there a mechanism in coreboot to achieve this? I've achieved this by setting this specific PCI device's read_resources to NULL, just wondering what's the best way to get this done. Many thanks, -Fei -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Errors in Memtest86 with 4 or 8GB memory
I have a problem on Intel DQ77KB board. I have two the same boards and on every board Memtest86 reports a problem at 2990.8MB. That problem occur only if I use 4 or 8GB memory. With 2GB memory everything is OK. What may be causing errors in Test2 Address test, own address, Parallel in Memtest86? http://www.memtest86.com/technical.htm Chris -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Timeline for Bayley Bay Support
Hi all ( but Martin in particular! ) I can see support for Baytrail and Bayley Bay going in at the moment. I'm interested in this board, and was wondering what the timeline for support might be - is there much more to do? And when will we see it? Thanks, Mike. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] AMD A76M chipset?
Hi Rudolf! Is here someone who wants to work on this perhaps together with me? (of course donations welcome ;) I will buy some / work on that only if someone else buys it too. I've started porting coreboot to the ASROCK FM2A88M-HD+ (A88X chipset) and have nearly finished the code for the SIO chip used on that board (NCT6776). Will upload that soon, but still have to do some cleanup and verify some stuff with the datasheet. If you'd like to help me with that board, I'd donate you a FM2A88M-HD+. But until august I sadly only have time for coreboot-related stuff on the weekends. The only downside of that board is that the PCIe x1 slot is located next to the PCIe x16 slot; so if you want to use a fast graphics card the only PCIe x1 slot gets blocked mechanically. Regards Felix -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Errors in Memtest86 with 4 or 8GB memory
Krzysztof Pierwieniecki [mailto:kpierwienie...@teldat.com.pl] wrote: ]I have a problem on Intel DQ77KB board. I have two the same boards and ]on every board Memtest86 reports a problem at 2990.8MB. That problem ]occur only if I use 4 or 8GB memory. With 2GB memory everything is OK. ] ]What may be causing errors in Test2 Address test, own address, ]Parallel in Memtest86? ]http://www.memtest86.com/technical.htm ] ]Chris The USB controller might be using memory reported as free in the E820 map. The address 2990.8MB would be around BAECh. The log file shows that SeaBIOS uses memory around there for USB. Yet the SeaBIOS E820 map shows memory through BAEDCFFF as available RAM. I once debugged a problem like this. Dumping the failing address range with a DOS mode debugger showed a location that was constantly incrementing. That location turned out to be a periodic counter used by the USB controller. The problem was E820 reporting the USB memory as free, just like Wang Fei suggested. Thanks, Scott -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
