Re: [coreboot] New interface for I2C in coreboot
2015-02-19 21:12 GMT+01:00 Peter Stuge : >> I think the question is really what we would gain from this. > > I think it's less about performance and more about an accurate and > clean model being available to mainboard code when needed. From discussing things with Werner, one of his concerns (as I understood them) was higher stability in light of picky I2C devices: When you schedule the entire communication in one pass, the (sufficiently capable) controller makes sure that things happen in the right order and at the right time. If some of that is arbitrated by CPU code, there's more room for error. Even for the I2C controllers that essentially bitbang things with no help by the controller chip, that should help avoid mistakes, since all the nasty warts of I2C (of which were seem to be many) are managed in the bus driver, not in every single slave driver. Patrick -- Google Germany GmbH ABC-Str. 19 20354 Hamburg Registergericht und -nummer: Hamburg, HRB 86891 Sitz der Gesellschaft: Hamburg Geschäftsführer: Graham Law, Christine Elizabeth Flores -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Mohon Peak, Memtest86+ does not start
On Fri, Feb 20, 2015 at 02:45:42PM +0300, Kuzmichev Viktor wrote: > Yes, Martin Roth mentioned earlier about SeaBIOS not supporting serial > input. > > I've tried sgabios, but it looks like in order for it to work properly, I > should disable all serial debug which is not very convenient. To prevent the duplicate messages from SeaBIOS, one can set the SeaBIOS debug level to 1 and set the "etc/screen-and-debug" setting as described at: http://www.coreboot.org/SeaBIOS#Adding_sgabios_support This wont prevent duplicates from grub, but if sgabios works properly then you may be able to disable grub serial. > However, in one of my latest e-mails I suggested that SeaBIOS should not > control serial input in memtest since memtest has its own code for serial > input handling. And still, input via serial console does not work in > memtest. Any idea why that's the case? I'm not familiar with memtest internals, so I can't help here. -Kevin -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Mohon Peak, Memtest86+ does not start
Yes, Martin Roth mentioned earlier about SeaBIOS not supporting serial input. I've tried sgabios, but it looks like in order for it to work properly, I should disable all serial debug which is not very convenient. However, in one of my latest e-mails I suggested that SeaBIOS should not control serial input in memtest since memtest has its own code for serial input handling. And still, input via serial console does not work in memtest. Any idea why that's the case? -Viktor On 19.02.2015 18:28, Kevin O'Connor wrote: On Tue, Jan 27, 2015 at 03:59:27PM +0300, Kuzmichev Viktor wrote: Thank you very much, this helped a lot! Now memtest is loading and it successfully performs RAM tests. But there is another issue. Somehow, input via serial console does not work. And it seems like the problem is not in memtest, rather it's in SeaBIOS or coreboot. There is no any prompt for input in coreboot. But there is in SeaBIOS, and I was not able to enter boot menu since it did not respond to F12. Although, SeaBIOS responds to the keyboard that is directly connected to the board while memtest does not seem to respond at all (at least, I tried to hit Esc which should reboot the board). I've tried to search for this but so far found nothing. Will appreciate any help. I'm not sure if you found a solution to your issue. SeaBIOS only supports debug output on serial. For a serial console, one can use sgabios with seabios - there is a description on how one can do this at: http://www.coreboot.org/SeaBIOS#Adding_sgabios_support -Kevin -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
