[coreboot] How to read the gpio status?
Dear Sir.
I want to control the GPIO pin that pin number is 12, 13, 14
DataSheet(P 1909) and coreboot source
code(src/southbridge/intel/fsp_rangeley/gpio.c, gpio.h) is said to me
that "It is very easy"
If i want to set the HIGH to 12, 13, 14
Just setup the some register, is see below.
SC_USE_SEL = 0x7000(b0111 )
Is mean, the 12, 13, 14 is config to GPIO mode.(enable GPIO)
SC_IO_SEL = 0x00(b )
Is mean, the 12, 13, 14 is output mode
SC_GP_LVL = 0x7000(b0111 )
Is mean, the 12, 13, 14 is set to HIGH level(1)
src/southbridge/intel/fsp_rangeley/gpio.h
/* Core GPIO */
const struct soc_gpio soc_gpio_mode = {
.gpio12 = GPIO_MODE_GPIO, /* Board ID GPIO */
.gpio13 = GPIO_MODE_GPIO, /* Board ID GPIO */
.gpio14 = GPIO_MODE_GPIO, /* Board ID GPIO */
};
const struct soc_gpio soc_gpio_direction = {
.gpio12 = GPIO_DIR_OUTPUT,
.gpio13 = GPIO_DIR_OUTPUT,
.gpio14 = GPIO_DIR_OUTPUT,
};
const struct soc_gpio soc_gpio_level = {
.gpio12 = GPIO_LEVEL_HIGH,
.gpio13 = GPIO_LEVEL_HIGH,
.gpio14 = GPIO_LEVEL_HIGH,
};
Yes, It is perfectley running.
The 12, 13, 14 PIN is goto active-HIGH.(I was check this pin use by
oscilloscope.)
And I'm try to read the SC_GP_LVL register for check current
status/config of gpio pins
I was *respected* the read value is *0x7000*, because i was writed the
*0x7000* to SC_GP_LVL.
But, every time readed the *0x00* from SC_GP_LVL register.
_When write 0x7000 write to SC_USE_SEL, Can read the 0x7000 from
SC_USE_SEL._
_When write 0x00 write to SC_IO_SEL, Can read the 0x00 from SC_IO_SEL._
But,
*_When write 0x7000 write to SC_GP_LVL, Can read the 0x00 from
SC_GP_LVL. everytime._*
I don't understand this sistuation.
Please advise to me.
Thank you.
--
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Re: [coreboot] Help on setting clock speed in coreboot
Great to hear! Serial does give out some useful information too so it will be useful. Maybe try a different board if you have multiples. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Wednesday, 13 July 2016 8:21 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi We got some brkthru today. Though serial still shows garbage, we got bios up and then OS also. USB, display came up, but serial still no luck. We will continue debugging. Thanks for all support. We are using serial to USB, we tried putty as well as minicom. Regards Mayuri From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 12 July 2016 17:12 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot The only thing I can think of is to use an oscilloscope to see if the signal is clear. No changes were made to the USB as it just comes up to as a COM Port and I connect using putty at the required baud rate. Are you using a Serial to USB or a real RS232 serial port? On Windows there are setting for each serial port (where you can set its baud rate etc, but I think these are for default connection and do not affect most terminal software that connect using a particular baud rate. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Wednesday, 13 July 2016 2:18 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot
Re: [coreboot] Help on setting clock speed in coreboot
The only thing I can think of is to use an oscilloscope to see if the signal is clear. No changes were made to the USB as it just comes up to as a COM Port and I connect using putty at the required baud rate. Are you using a Serial to USB or a real RS232 serial port? On Windows there are setting for each serial port (where you can set its baud rate etc, but I think these are for default connection and do not affect most terminal software that connect using a particular baud rate. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Wednesday, 13 July 2016 2:18 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to de
Re: [coreboot] Help on setting clock speed in coreboot
Hi Minnowboard also uses the same pin BD14 (GPIO_S0_SC[57]) as TX and 61 as RX and baud rate 115200. We have not enabled post codes, but only enabled serial port console o/p. It works fine on Minnowboard, but not on this. So not getting any clue. Regards Mayuri From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 20:03 To: Mayuri Tendulkar ; coreboot Subject: Re: Help on setting clock speed in coreboot First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had to setup the full 8MB of flash using the FITC tool but this is probably not your issue since you probably have serial output already. All I can think of is baud rate setting under console in "make menuconfig". Also the output may be setup to output POST codes only in which case to a text terminal it will like only junk is coming out. Make sure console debug level is set to DEBUG or SPEW to get a lot more debug initially. Also Enable "Serial Port Console output" From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:53 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot We didn't change anything. Our base is valley island. As it was not having serial, we took tht part same as Minnowboard (PCU UART) Tried different rates but doesn't work. We checked TTL levels, so we were seeing freq as 38.4, so tried tht also. Somehow its stuck somewhere as we don't see USB and display also not coming, but nt able to get exact data due to serial prints. From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 19:48 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>> Subject: Re: Help on setting clock speed in coreboot Did you change anything? Is your base Bayley Bay? The default setting for it are 115200 with the output pin as per below. Check the console settings in the menuconfig. If you are getting junk then I assume it is already enabled but maybe just the baud is modified by mistake. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 10:45 AM To: Naveed Ghori Subject: Re: Help on setting clock speed in coreboot But what settings to be added in coreboot config? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:42 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot We take the pins direct off the E3845 (only really need the tx (pin BD14 (GPIO_S0_SC[57]))). The pins direct are TTL so we had to use a TTL-USB serial port converter. From: Mayuri Tendulkar [mailto:mayuri.tendul...@aricent.com] Sent: Tuesday, 12 July 2016 9:37 AM To: Naveed Ghori; coreboot Subject: Re: Help on setting clock speed in coreboot Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar mailto:mayuri.tendul...@aricent.com>>; coreboot mailto:coreboot@coreboot.org>> Subject: Re: Help on setting clock speed in coreboot Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember correctly (TTL-232RG) to convert the signal so I could read the output. Cheers, Naveed From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Mayuri Tendulkar Sent: Tuesday, 12 July 2016 8:27 AM To: coreboot Subject: [coreboot] Help on setting clock speed in coreboot Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add memory test as secondary payload, I cd see some operations happening on console but not able to decode it. Tried with all possible baud rates, but no success. USB and display also not enumerating. Can you please give some clue? Is it due to different core speed for E3835(1.33GHZ) vs E3845(1.91GHz). Where is the option to change this in coreboot? Appreciate your support. Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this messag
Re: [coreboot] RFC: implementing a way to force external EDID use.
Hi Arthur, * Arthur Heymans [160622 23:34]: > Hi > > In Linux it is possible to load an EDID externally. Coreboot can > currently not do this. Do you think it is worth implementing this > feature? So far we have not come across devices without an EDID or with a bad EDID, but if that is the case for you, you should implement this. What platform are you looking at? > An EDID file is a bit to big (128 bytes) to fit in nvram so it would have to > go in cbfs. Since the information is not going to change (for a mobile device, anyways), CBFS is the right place. > Where in the code do you think this setting should be implemented: > NB code, read_edid in drivers, decode_edid in lib, somewhere else? The code should probably live in lib, as it is not chip specific, and be called from the chip specific code, e.g. intel_gmbus_read_edid(pmmio + GMBUS0, 3, 0x50, edid_data, 128); decode_edid(edid_data, sizeof(edid_data), &edid); would become something like if (IS_ENABLED(CONFIG_OVERRIDE_EDID) cbfs_read_edid(edid_data, sizeof(edid_data)); else intel_gmbus_read_edid(pmmio + GMBUS0, 3, 0x50, edid_data, 128); decode_edid(edid_data, sizeof(edid_data), &edid); > How do you think this feature should be turned on: nvram option or build > option? This depends on your use case. Since this is not something that should be messed with in the field, I would suggest to make it a Kconfig option. Stefan -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] kgpe-d16
* ron minnich [160620 20:19]: > I have a kgpe-d16 with coreboot and it *was* working with linux. I now have a > linux kernel that won't boot on fuctory bios or coreboot. I can't recall > changing anything ... > > If somebody's got a known good .config for linux I could sure use it. I'm > booting stock tinycore and it seems to hang a lot. The Ubuntu 16.04 default config worked fine on the system. Stefan -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot
