Re: [coreboot] SMI handler for fsp_broadwell_de

2016-09-22 Thread Yang, York 
Fsp_broadwell_de do not implement the SMI support, but you may refer to 
soc/Broadwell as both are Intel architecture chipset.  The SMI support can be 
done purely in coreboot, but need to touch FSP.

/ YoRK

From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Watzlavick, 
Robert L
Sent: Thursday, September 22, 2016 4:28 PM
To: coreboot@coreboot.org
Subject: [coreboot] SMI handler for fsp_broadwell_de

I want to experiment with an SMI handler on the Camelback Mountain CRB (Xeon 
D-1500) but it appears that the fsp_broadwell_de changes removed SMM support.  
I'm browsing the coreboot-4.4 release.  Was there a reason it was removed?  It 
shows up in the soc/intel/Broadwell area so I suppose I could port over the 
original code.  I didn't see that the D_LCK bit was set anywhere so does that 
mean I can potentially let SeaBIOS install an SMI handler?  Or is it set in the 
FSP?  I also noticed the mainline has some new code under 
coreboot/src/soc/intel/sch but I'm not sure which processors that is for.

Thanks,
-Bob
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[coreboot] SMI handler for fsp_broadwell_de

2016-09-22 Thread Watzlavick, Robert L 
I want to experiment with an SMI handler on the Camelback Mountain CRB (Xeon 
D-1500) but it appears that the fsp_broadwell_de changes removed SMM support.  
I'm browsing the coreboot-4.4 release.  Was there a reason it was removed?  It 
shows up in the soc/intel/Broadwell area so I suppose I could port over the 
original code.  I didn't see that the D_LCK bit was set anywhere so does that 
mean I can potentially let SeaBIOS install an SMI handler?  Or is it set in the 
FSP?  I also noticed the mainline has some new code under 
coreboot/src/soc/intel/sch but I'm not sure which processors that is for.

Thanks,
-Bob
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[coreboot] Will coreboot work on my laptop?

2016-09-22 Thread MingHeng Wang 
Hello everyone,
I have a HP stream 11 x360 laptop. It has the following outputs
performing the commands listed in coreboot FAQ:

[ifoolb@192 ~]$ lspci -tvnn
-[:00]-+-00.0  Intel Corporation Atom Processor Z36xxx/Z37xxx
Series SoC Transaction Register [8086:0f00]
   +-02.0  Intel Corporation Atom Processor Z36xxx/Z37xxx
Series Graphics & Display [8086:0f31]
   +-14.0  Intel Corporation Atom Processor Z36xxx/Z37xxx,
Celeron N2000 Series USB xHCI [8086:0f35]
   +-1a.0  Intel Corporation Atom Processor Z36xxx/Z37xxx
Series Trusted Execution Engine [8086:0f18]
   +-1b.0  Intel Corporation Atom Processor Z36xxx/Z37xxx
Series High Definition Audio Controller [8086:0f04]
   +-1c.0-[01]--
   +-1c.1-[02]00.0  Broadcom Limited BCM43142 802.11b/g/n
[14e4:4365]
   +-1c.2-[03]00.0  Realtek Semiconductor Co., Ltd.
RTS5227 PCI Express Card Reader [10ec:5227]
   +-1c.3-[04]00.0  Realtek Semiconductor Co., Ltd.
RTL8101/2/6E PCI Express Fast/Gigabit Ethernet controller [10ec:8136]
   +-1f.0  Intel Corporation Atom Processor Z36xxx/Z37xxx
Series Power Control Unit [8086:0f1c]
   \-1f.3  Intel Corporation Atom Processor E3800 Series SMBus
Controller [8086:0f12]

superiotool reported no superio found.

[ifoolb@192 ~]$ sudo flashrom -p internal -V
flashrom v0.9.7-r1850 on Linux 4.7.3-200.fc24.x86_64 (x86_64)
flashrom is free software, get the source code at http://www.flashrom.org

flashrom was built with libpci 3.4.1, GCC 6.0.0 20160201 (Red Hat
6.0.0-0.9), little endian
Command line (3 args): flashrom -p internal -V
Calibrating delay loop... OS timer resolution is 1 usecs, 1364M loops
per second, 10 myus = 10 us, 100 myus = 99 us, 1000 myus = 1058 us,
1 myus = 10333 us, 4 myus = 5 us, OK.
Initializing internal programmer
No coreboot table found.
Using External DMI decoder.
DMI string chassis-type: "Notebook"
Laptop detected via DMI.
DMI string system-manufacturer: "Hewlett-Packard"
DMI string system-product-name: "HP Stream x360 Convertible PC 11"
DMI string system-version: "Type1 - ProductConfigId"
DMI string baseboard-manufacturer: "Hewlett-Packard"
DMI string baseboard-product-name: "802B"
DMI string baseboard-version: "57.16"

WARNING! You seem to be running flashrom on an unsupported laptop.
Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See the manpage and http://www.flashrom.org/Laptops for details.

If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.

Aborting.
Error: Programmer initialization failed.

Will coreboot work on it? Thanks in advance.

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[coreboot] Building Intel SoC Apollo Lake with DDR3L+PMIC

2016-09-22 Thread morris.wang 
Hello,

I am building coreboot image for Apollo Lake.
My designed mainboard comes with DDR3L SODIMMs + PMIC.

To my knowledge, 
RVP1 board is for DDR3L SODIMMs and discrete VRs.
RVP2 board is for LPDDR3 and PMIC.

If I selected under coreboot configuration:
Mainboard --> Mainboard vendor (Intel)
Mainboard model  (Apollolake DDR3 RVP1)

How to modify VR type from Discrete to PMIC???


Kind regards,
Morris
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