Re: [coreboot] Coreboot build unstable?

[Julius Werner]

[repost to list with the right sender address]


> I just had the following CL fail in Jenkins:
> https://review.coreboot.org/c/coreboot/+/25393
>
> It fails for GOOGLE_CHELL but the one file it touches doesn't even get
> compiled for that board. I'm not quite sure that to make of the error but
> it seems to be a problem with building the Chrome EC code in 3rdparty. (I
> guess we don't log the full build output for subinvocations of make in
> Jenkins?)
>
> I've rebased the CL so let's hope it works on the next attempt... but in
> the meantime, can anybody figure out what's wrong here and how we can fix
> it? (Maybe a flaky build failure related to parallel builds?)
>
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Re: [coreboot] Missing ACPI ASL code for Denverton GPIO controller

[Julien Viard de Galbert]

> Le 26 mars 2018 à 21:24, Sumo  a écrit :
> 
> Hi all,

Hi Sumo,

> 
> We have a kernel patch which adds pinctrl/GPIO support for Intel Denverton 
> SoC (https://patchwork.kernel.org/patch/9879473/ 
> ) to make possible to access the 
> GPIO from user space (via sysfs, i.e. /sys/kernel/debug/pinctrl/), however 
> this patch is expects a "INTC3000" GPIO controller definition in the ACPI 
> tables.
> I want to add/implement the INTC3000 in the ASL code, but since I don´t want 
> to reinvent the wheel I´m asking if such ASL code is already available 
> somewhere (at least in the Intel Pine Lake CRB there´s no such reference to 
> INTC3000 in the ACPI tables).
> 
I have a set of patches that still need some work 
(https://review.coreboot.org/c/coreboot/+/24928) that enable some shared code 
for GPIO; following I also have more patches to use the ACPI code from common 
block too (not published yet). I didn’t check but probably apollolake or 
cannonlake has the ACPI code for GPIO (using common block).
If you are interested I can probably work on adding the ACPI implementation to 
Gerrit sooner.

Best Regards,

Julien

> Thanks,
> Sumo
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